scsi: hisi_sas: add v2 hw DFX feature
Add DFX feature for v2 hw. We are adding support for the following errors: - loss_of_dword_sync_count - invalid_dword_count - phy_reset_problem_count - running_disparity_error_count Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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01b361fc90
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c52108c61b
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@ -193,6 +193,7 @@ struct hisi_sas_hw {
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void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
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void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
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void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
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void (*get_events)(struct hisi_hba *hisi_hba, int phy_no);
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void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no,
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struct sas_phy_linkrates *linkrates);
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enum sas_linkrate (*phy_get_max_linkrate)(void);
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@ -764,7 +764,12 @@ static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
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case PHY_FUNC_SET_LINK_RATE:
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hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, funcdata);
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break;
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case PHY_FUNC_GET_EVENTS:
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if (hisi_hba->hw->get_events) {
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hisi_hba->hw->get_events(hisi_hba, phy_no);
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break;
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}
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/* fallthru */
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case PHY_FUNC_RELEASE_SPINUP_HOLD:
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default:
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return -EOPNOTSUPP;
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@ -256,6 +256,8 @@
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#define LINK_DFX2_RCVR_HOLD_STS_MSK (0x1 << LINK_DFX2_RCVR_HOLD_STS_OFF)
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#define LINK_DFX2_SEND_HOLD_STS_OFF 10
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#define LINK_DFX2_SEND_HOLD_STS_MSK (0x1 << LINK_DFX2_SEND_HOLD_STS_OFF)
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#define SAS_ERR_CNT4_REG (PORT_BASE + 0x290)
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#define SAS_ERR_CNT6_REG (PORT_BASE + 0x298)
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#define PHY_CTRL_RDY_MSK (PORT_BASE + 0x2b0)
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#define PHYCTRL_NOT_RDY_MSK (PORT_BASE + 0x2b4)
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#define PHYCTRL_DWS_RESET_MSK (PORT_BASE + 0x2b8)
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@ -1360,6 +1362,25 @@ static void phy_hard_reset_v2_hw(struct hisi_hba *hisi_hba, int phy_no)
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start_phy_v2_hw(hisi_hba, phy_no);
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}
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static void phy_get_events_v2_hw(struct hisi_hba *hisi_hba, int phy_no)
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{
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struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
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struct asd_sas_phy *sas_phy = &phy->sas_phy;
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struct sas_phy *sphy = sas_phy->phy;
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u32 err4_reg_val, err6_reg_val;
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/* loss dword syn, phy reset problem */
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err4_reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, SAS_ERR_CNT4_REG);
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/* disparity err, invalid dword */
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err6_reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, SAS_ERR_CNT6_REG);
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sphy->loss_of_dword_sync_count += (err4_reg_val >> 16) & 0xFFFF;
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sphy->phy_reset_problem_count += err4_reg_val & 0xFFFF;
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sphy->invalid_dword_count += (err6_reg_val & 0xFF0000) >> 16;
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sphy->running_disparity_error_count += err6_reg_val & 0xFF;
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}
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static void start_phys_v2_hw(struct hisi_hba *hisi_hba)
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{
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int i;
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@ -3457,6 +3478,7 @@ static const struct hisi_sas_hw hisi_sas_v2_hw = {
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.phy_enable = enable_phy_v2_hw,
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.phy_disable = disable_phy_v2_hw,
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.phy_hard_reset = phy_hard_reset_v2_hw,
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.get_events = phy_get_events_v2_hw,
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.phy_set_linkrate = phy_set_linkrate_v2_hw,
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.phy_get_max_linkrate = phy_get_max_linkrate_v2_hw,
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.max_command_entries = HISI_SAS_COMMAND_ENTRIES_V2_HW,
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