lguest: send trap 13 through to userspace.
We copy 7 bytes at eip for userspace's instruction decode; we have to carefully handle the case where eip is at the end of a page. We can't leave this to userspace since kernel has all the page table decode logic. The decode logic moves to userspace, basically unchanged. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
This commit is contained in:
Rusty Russell
Родитель
c9e433e4b8
Коммит
c565650b10
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@ -314,95 +314,52 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
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* usually attached to a PC.
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*
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* When the Guest uses one of these instructions, we get a trap (General
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* Protection Fault) and come here. We see if it's one of those troublesome
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* instructions and skip over it. We return true if we did.
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* Protection Fault) and come here. We queue this to be sent out to the
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* Launcher to handle.
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*/
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static int emulate_insn(struct lg_cpu *cpu)
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/*
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* The eip contains the *virtual* address of the Guest's instruction:
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* we copy the instruction here so the Launcher doesn't have to walk
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* the page tables to decode it. We handle the case (eg. in a kernel
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* module) where the instruction is over two pages, and the pages are
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* virtually but not physically contiguous.
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*
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* The longest possible x86 instruction is 15 bytes, but we don't handle
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* anything that strange.
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*/
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static void copy_from_guest(struct lg_cpu *cpu,
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void *dst, unsigned long vaddr, size_t len)
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{
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u8 insn;
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unsigned int insnlen = 0, in = 0, small_operand = 0;
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/*
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* The eip contains the *virtual* address of the Guest's instruction:
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* walk the Guest's page tables to find the "physical" address.
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*/
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unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
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size_t to_page_end = PAGE_SIZE - (vaddr % PAGE_SIZE);
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unsigned long paddr;
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/*
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* This must be the Guest kernel trying to do something, not userspace!
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* The bottom two bits of the CS segment register are the privilege
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* level.
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*/
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if ((cpu->regs->cs & 3) != GUEST_PL)
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return 0;
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BUG_ON(len > PAGE_SIZE);
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/* Decoding x86 instructions is icky. */
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insn = lgread(cpu, physaddr, u8);
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/*
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* Around 2.6.33, the kernel started using an emulation for the
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* cmpxchg8b instruction in early boot on many configurations. This
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* code isn't paravirtualized, and it tries to disable interrupts.
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* Ignore it, which will Mostly Work.
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*/
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if (insn == 0xfa) {
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/* "cli", or Clear Interrupt Enable instruction. Skip it. */
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cpu->regs->eip++;
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return 1;
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/* If it goes over a page, copy in two parts. */
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if (len > to_page_end) {
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/* But make sure the next page is mapped! */
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if (__guest_pa(cpu, vaddr + to_page_end, &paddr))
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copy_from_guest(cpu, dst + to_page_end,
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vaddr + to_page_end,
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len - to_page_end);
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else
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/* Otherwise fill with zeroes. */
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memset(dst + to_page_end, 0, len - to_page_end);
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len = to_page_end;
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}
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/*
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* 0x66 is an "operand prefix". It means a 16, not 32 bit in/out.
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*/
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if (insn == 0x66) {
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small_operand = 1;
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/* The instruction is 1 byte so far, read the next byte. */
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insnlen = 1;
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insn = lgread(cpu, physaddr + insnlen, u8);
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}
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/* This will kill the guest if it isn't mapped, but that
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* shouldn't happen. */
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__lgread(cpu, dst, guest_pa(cpu, vaddr), len);
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}
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/*
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* We can ignore the lower bit for the moment and decode the 4 opcodes
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* we need to emulate.
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*/
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switch (insn & 0xFE) {
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case 0xE4: /* in <next byte>,%al */
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insnlen += 2;
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in = 1;
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break;
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case 0xEC: /* in (%dx),%al */
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insnlen += 1;
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in = 1;
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break;
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case 0xE6: /* out %al,<next byte> */
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insnlen += 2;
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break;
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case 0xEE: /* out %al,(%dx) */
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insnlen += 1;
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break;
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default:
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/* OK, we don't know what this is, can't emulate. */
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return 0;
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}
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/*
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* If it was an "IN" instruction, they expect the result to be read
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* into %eax, so we change %eax. We always return all-ones, which
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* traditionally means "there's nothing there".
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*/
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if (in) {
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/* Lower bit tells means it's a 32/16 bit access */
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if (insn & 0x1) {
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if (small_operand)
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cpu->regs->eax |= 0xFFFF;
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else
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cpu->regs->eax = 0xFFFFFFFF;
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} else
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cpu->regs->eax |= 0xFF;
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}
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/* Finally, we've "done" the instruction, so move past it. */
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cpu->regs->eip += insnlen;
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/* Success! */
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return 1;
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static void setup_emulate_insn(struct lg_cpu *cpu)
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{
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cpu->pending.trap = 13;
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copy_from_guest(cpu, cpu->pending.insn, cpu->regs->eip,
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sizeof(cpu->pending.insn));
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}
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/*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
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@ -410,14 +367,10 @@ void lguest_arch_handle_trap(struct lg_cpu *cpu)
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{
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switch (cpu->regs->trapnum) {
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case 13: /* We've intercepted a General Protection Fault. */
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/*
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* Check if this was one of those annoying IN or OUT
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* instructions which we need to emulate. If so, we just go
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* back into the Guest after we've done it.
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*/
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/* Hand to Launcher to emulate those pesky IN and OUT insns */
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if (cpu->regs->errcode == 0) {
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if (emulate_insn(cpu))
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return;
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setup_emulate_insn(cpu);
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return;
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}
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break;
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case 14: /* We've intercepted a Page Fault. */
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@ -41,6 +41,7 @@
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#include <signal.h>
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#include <pwd.h>
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#include <grp.h>
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#include <sys/user.h>
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#ifndef VIRTIO_F_ANY_LAYOUT
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#define VIRTIO_F_ANY_LAYOUT 27
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@ -1143,6 +1144,150 @@ static void handle_output(unsigned long addr)
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strnlen(from_guest_phys(addr), guest_limit - addr));
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}
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/*L:216
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* This is where we emulate a handful of Guest instructions. It's ugly
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* and we used to do it in the kernel but it grew over time.
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*/
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/*
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* We use the ptrace syscall's pt_regs struct to talk about registers
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* to lguest: these macros convert the names to the offsets.
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*/
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#define getreg(name) getreg_off(offsetof(struct user_regs_struct, name))
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#define setreg(name, val) \
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setreg_off(offsetof(struct user_regs_struct, name), (val))
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static u32 getreg_off(size_t offset)
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{
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u32 r;
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unsigned long args[] = { LHREQ_GETREG, offset };
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if (pwrite(lguest_fd, args, sizeof(args), cpu_id) < 0)
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err(1, "Getting register %u", offset);
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if (pread(lguest_fd, &r, sizeof(r), cpu_id) != sizeof(r))
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err(1, "Reading register %u", offset);
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return r;
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}
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static void setreg_off(size_t offset, u32 val)
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{
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unsigned long args[] = { LHREQ_SETREG, offset, val };
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if (pwrite(lguest_fd, args, sizeof(args), cpu_id) < 0)
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err(1, "Setting register %u", offset);
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}
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static void emulate_insn(const u8 insn[])
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{
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unsigned long args[] = { LHREQ_TRAP, 13 };
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unsigned int insnlen = 0, in = 0, small_operand = 0, byte_access;
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unsigned int eax, port, mask;
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/*
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* We always return all-ones on IO port reads, which traditionally
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* means "there's nothing there".
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*/
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u32 val = 0xFFFFFFFF;
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/*
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* This must be the Guest kernel trying to do something, not userspace!
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* The bottom two bits of the CS segment register are the privilege
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* level.
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*/
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if ((getreg(xcs) & 3) != 0x1)
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goto no_emulate;
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/* Decoding x86 instructions is icky. */
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/*
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* Around 2.6.33, the kernel started using an emulation for the
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* cmpxchg8b instruction in early boot on many configurations. This
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* code isn't paravirtualized, and it tries to disable interrupts.
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* Ignore it, which will Mostly Work.
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*/
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if (insn[insnlen] == 0xfa) {
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/* "cli", or Clear Interrupt Enable instruction. Skip it. */
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insnlen = 1;
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goto skip_insn;
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}
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/*
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* 0x66 is an "operand prefix". It means a 16, not 32 bit in/out.
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*/
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if (insn[insnlen] == 0x66) {
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small_operand = 1;
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/* The instruction is 1 byte so far, read the next byte. */
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insnlen = 1;
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}
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/* If the lower bit isn't set, it's a single byte access */
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byte_access = !(insn[insnlen] & 1);
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/*
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* Now we can ignore the lower bit and decode the 4 opcodes
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* we need to emulate.
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*/
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switch (insn[insnlen] & 0xFE) {
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case 0xE4: /* in <next byte>,%al */
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port = insn[insnlen+1];
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insnlen += 2;
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in = 1;
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break;
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case 0xEC: /* in (%dx),%al */
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port = getreg(edx) & 0xFFFF;
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insnlen += 1;
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in = 1;
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break;
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case 0xE6: /* out %al,<next byte> */
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port = insn[insnlen+1];
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insnlen += 2;
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break;
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case 0xEE: /* out %al,(%dx) */
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port = getreg(edx) & 0xFFFF;
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insnlen += 1;
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break;
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default:
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/* OK, we don't know what this is, can't emulate. */
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goto no_emulate;
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}
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/* Set a mask of the 1, 2 or 4 bytes, depending on size of IO */
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if (byte_access)
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mask = 0xFF;
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else if (small_operand)
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mask = 0xFFFF;
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else
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mask = 0xFFFFFFFF;
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/*
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* If it was an "IN" instruction, they expect the result to be read
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* into %eax, so we change %eax.
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*/
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eax = getreg(eax);
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if (in) {
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/* Clear the bits we're about to read */
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eax &= ~mask;
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/* Copy bits in from val. */
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eax |= val & mask;
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/* Now update the register. */
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setreg(eax, eax);
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}
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verbose("IO %s of %x to %u: %#08x\n",
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in ? "IN" : "OUT", mask, port, eax);
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skip_insn:
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/* Finally, we've "done" the instruction, so move past it. */
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setreg(eip, getreg(eip) + insnlen);
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return;
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no_emulate:
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/* Inject trap into Guest. */
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if (write(lguest_fd, args, sizeof(args)) < 0)
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err(1, "Reinjecting trap 13 for fault at %#x", getreg(eip));
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}
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/*L:190
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* Device Setup
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*
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@ -1832,6 +1977,10 @@ static void __attribute__((noreturn)) run_guest(void)
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verbose("Notify on address %#08x\n",
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notify.addr);
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handle_output(notify.addr);
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} else if (notify.trap == 13) {
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verbose("Emulating instruction at %#x\n",
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getreg(eip));
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emulate_insn(notify.insn);
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} else
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errx(1, "Unknown trap %i addr %#08x\n",
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notify.trap, notify.addr);
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