platform/x86: intel_pmc_core: Make pmc_core_substate_res_show() generic
Currently pmc_core_substate_res_show() uses array of char pointers i.e., lpm_modes for Tiger Lake directly to iterate through and to get the number of low power modes which is hardcoded and cannot be re-used for future platforms that support sub-states. To maintain readability, make pmc_core_substate_res_show() generic, so that it can re-used for future platforms. Cc: Chen Zhou <chenzhou10@huawei.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David E. Box <david.e.box@intel.com> Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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@ -567,6 +567,7 @@ static const struct pmc_reg_map tgl_reg_map = {
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.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
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.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
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.ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED,
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.lpm_modes = tgl_lpm_modes,
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.lpm_en_offset = TGL_LPM_EN_OFFSET,
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.lpm_residency_offset = TGL_LPM_RESIDENCY_OFFSET,
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.lpm_sts = tgl_lpm_maps,
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@ -1009,6 +1010,7 @@ DEFINE_SHOW_ATTRIBUTE(pmc_core_ltr);
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static int pmc_core_substate_res_show(struct seq_file *s, void *unused)
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{
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struct pmc_dev *pmcdev = s->private;
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const char **lpm_modes = pmcdev->map->lpm_modes;
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u32 offset = pmcdev->map->lpm_residency_offset;
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u32 lpm_en;
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int index;
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@ -198,7 +198,7 @@ enum ppfear_regs {
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#define TGL_LPM_STATUS_OFFSET 0x1C3C
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#define TGL_LPM_LIVE_STATUS_OFFSET 0x1C5C
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const char *lpm_modes[] = {
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const char *tgl_lpm_modes[] = {
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"S0i2.0",
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"S0i2.1",
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"S0i2.2",
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@ -255,6 +255,7 @@ struct pmc_reg_map {
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const u32 ltr_ignore_max;
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const u32 pm_vric1_offset;
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/* Low Power Mode registers */
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const char **lpm_modes;
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const u32 lpm_en_offset;
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const u32 lpm_residency_offset;
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const u32 lpm_status_offset;
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