V4L/DVB (5502): Sn9c102: more efficient register writing code
There were many places in the driver which had long sequences of constant register initializations. These were done with one function call per register. The register address and value were immediate values in the function calls. This is very inefficient, as each register and value take twice the space when they are code, as each includes a push instruction to put it on the stack. There there is the overhead, both size and time, for a function call for each register. It's also quite a few lines of C code to do this. The patch creates a function that writes multiple registers from a list, and a macro that makes it easy to construct a such a list as a const static local to send to the function. This gets rid of quite a bit of C code, and shrinks the driver by around 8k, while at the same time being more efficient. Acked-by: Luca Risolia <luca.risolia@studio.unibo.it> Signed-off-by: Trent Piepho <xyzzy@speakeasy.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
Trent Piepho
Mauro Carvalho Chehab
Родитель
0ee32871c1
Коммит
c680dd6038
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@ -209,27 +209,40 @@ static void sn9c102_queue_unusedframes(struct sn9c102_device* cam)
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}
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/*****************************************************************************/
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int sn9c102_write_regs(struct sn9c102_device* cam, u8* buff, u16 index)
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/*
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* Write a sequence of count value/register pairs. Returns -1 after the
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* first failed write, or 0 for no errors.
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*/
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int sn9c102_write_regs(struct sn9c102_device* cam, const u8 valreg[][2],
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int count)
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{
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struct usb_device* udev = cam->usbdev;
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u8* value = cam->control_buffer; /* Needed for DMA'able memory */
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int i, res;
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if (index + sizeof(buff) >= ARRAY_SIZE(cam->reg))
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return -1;
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for (i = 0; i < count; i++) {
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u8 index = valreg[i][1];
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res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x08, 0x41,
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index, 0, buff, sizeof(buff),
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SN9C102_CTRL_TIMEOUT*sizeof(buff));
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if (res < 0) {
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DBG(3, "Failed to write registers (index 0x%02X, error %d)",
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index, res);
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return -1;
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/*
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* index is a u8, so it must be <256 and can't be out of range.
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* If we put in a check anyway, gcc annoys us with a warning
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* that our check is useless. People get all uppity when they
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* see warnings in the kernel compile.
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*/
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*value = valreg[i][0];
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res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
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0x08, 0x41, index, 0,
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value, 1, SN9C102_CTRL_TIMEOUT);
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if (res < 0) {
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DBG(3, "Failed to write a register (value 0x%02X, "
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"index 0x%02X, error %d)", *value, index, res);
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return -1;
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}
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cam->reg[index] = *value;
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}
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for (i = 0; i < sizeof(buff); i++)
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cam->reg[index+i] = buff[i];
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return 0;
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}
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@ -24,14 +24,11 @@
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static int hv7131d_init(struct sn9c102_device* cam)
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{
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int err = 0;
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int err;
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err += sn9c102_write_reg(cam, 0x00, 0x10);
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err += sn9c102_write_reg(cam, 0x00, 0x11);
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err += sn9c102_write_reg(cam, 0x00, 0x14);
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err += sn9c102_write_reg(cam, 0x60, 0x17);
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err += sn9c102_write_reg(cam, 0x0e, 0x18);
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err += sn9c102_write_reg(cam, 0xf2, 0x19);
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err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11},
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{0x00, 0x14}, {0x60, 0x17},
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{0x0e, 0x18}, {0xf2, 0x19});
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err += sn9c102_i2c_write(cam, 0x01, 0x04);
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err += sn9c102_i2c_write(cam, 0x02, 0x00);
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@ -247,11 +244,10 @@ static struct sn9c102_sensor hv7131d = {
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int sn9c102_probe_hv7131d(struct sn9c102_device* cam)
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{
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int r0 = 0, r1 = 0, err = 0;
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int r0 = 0, r1 = 0, err;
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err += sn9c102_write_reg(cam, 0x01, 0x01);
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err += sn9c102_write_reg(cam, 0x00, 0x01);
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err += sn9c102_write_reg(cam, 0x28, 0x17);
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err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01},
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{0x28, 0x17});
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if (err)
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return -EIO;
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@ -28,192 +28,102 @@ static int hv7131r_init(struct sn9c102_device* cam)
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switch (sn9c102_get_bridge(cam)) {
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case BRIDGE_SN9C103:
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err += sn9c102_write_reg(cam, 0x00, 0x03);
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err += sn9c102_write_reg(cam, 0x1a, 0x04);
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err += sn9c102_write_reg(cam, 0x20, 0x05);
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err += sn9c102_write_reg(cam, 0x20, 0x06);
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err += sn9c102_write_reg(cam, 0x03, 0x10);
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err += sn9c102_write_reg(cam, 0x00, 0x14);
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err += sn9c102_write_reg(cam, 0x60, 0x17);
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err += sn9c102_write_reg(cam, 0x0a, 0x18);
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err += sn9c102_write_reg(cam, 0xf0, 0x19);
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err += sn9c102_write_reg(cam, 0x1d, 0x1a);
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err += sn9c102_write_reg(cam, 0x10, 0x1b);
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err += sn9c102_write_reg(cam, 0x02, 0x1c);
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err += sn9c102_write_reg(cam, 0x03, 0x1d);
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err += sn9c102_write_reg(cam, 0x0f, 0x1e);
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err += sn9c102_write_reg(cam, 0x0c, 0x1f);
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err += sn9c102_write_reg(cam, 0x00, 0x20);
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err += sn9c102_write_reg(cam, 0x10, 0x21);
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err += sn9c102_write_reg(cam, 0x20, 0x22);
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err += sn9c102_write_reg(cam, 0x30, 0x23);
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err += sn9c102_write_reg(cam, 0x40, 0x24);
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err += sn9c102_write_reg(cam, 0x50, 0x25);
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err += sn9c102_write_reg(cam, 0x60, 0x26);
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err += sn9c102_write_reg(cam, 0x70, 0x27);
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err += sn9c102_write_reg(cam, 0x80, 0x28);
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err += sn9c102_write_reg(cam, 0x90, 0x29);
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err += sn9c102_write_reg(cam, 0xa0, 0x2a);
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err += sn9c102_write_reg(cam, 0xb0, 0x2b);
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err += sn9c102_write_reg(cam, 0xc0, 0x2c);
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err += sn9c102_write_reg(cam, 0xd0, 0x2d);
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err += sn9c102_write_reg(cam, 0xe0, 0x2e);
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err += sn9c102_write_reg(cam, 0xf0, 0x2f);
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err += sn9c102_write_reg(cam, 0xff, 0x30);
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err = sn9c102_write_const_regs(cam, {0x00, 0x03}, {0x1a, 0x04},
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{0x20, 0x05}, {0x20, 0x06},
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{0x03, 0x10}, {0x00, 0x14},
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{0x60, 0x17}, {0x0a, 0x18},
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{0xf0, 0x19}, {0x1d, 0x1a},
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{0x10, 0x1b}, {0x02, 0x1c},
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{0x03, 0x1d}, {0x0f, 0x1e},
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{0x0c, 0x1f}, {0x00, 0x20},
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{0x10, 0x21}, {0x20, 0x22},
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{0x30, 0x23}, {0x40, 0x24},
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{0x50, 0x25}, {0x60, 0x26},
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{0x70, 0x27}, {0x80, 0x28},
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{0x90, 0x29}, {0xa0, 0x2a},
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{0xb0, 0x2b}, {0xc0, 0x2c},
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{0xd0, 0x2d}, {0xe0, 0x2e},
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{0xf0, 0x2f}, {0xff, 0x30});
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break;
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case BRIDGE_SN9C105:
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case BRIDGE_SN9C120:
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err += sn9c102_write_reg(cam, 0x44, 0x01);
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err += sn9c102_write_reg(cam, 0x40, 0x02);
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err += sn9c102_write_reg(cam, 0x00, 0x03);
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err += sn9c102_write_reg(cam, 0x1a, 0x04);
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err += sn9c102_write_reg(cam, 0x44, 0x05);
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err += sn9c102_write_reg(cam, 0x3e, 0x06);
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err += sn9c102_write_reg(cam, 0x1a, 0x07);
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err += sn9c102_write_reg(cam, 0x03, 0x10);
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err += sn9c102_write_reg(cam, 0x08, 0x14);
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err += sn9c102_write_reg(cam, 0xa3, 0x17);
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err += sn9c102_write_reg(cam, 0x4b, 0x18);
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err += sn9c102_write_reg(cam, 0x00, 0x19);
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err += sn9c102_write_reg(cam, 0x1d, 0x1a);
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err += sn9c102_write_reg(cam, 0x10, 0x1b);
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err += sn9c102_write_reg(cam, 0x02, 0x1c);
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err += sn9c102_write_reg(cam, 0x03, 0x1d);
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err += sn9c102_write_reg(cam, 0x0f, 0x1e);
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err += sn9c102_write_reg(cam, 0x0c, 0x1f);
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err += sn9c102_write_reg(cam, 0x00, 0x20);
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err += sn9c102_write_reg(cam, 0x29, 0x21);
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err += sn9c102_write_reg(cam, 0x40, 0x22);
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err += sn9c102_write_reg(cam, 0x54, 0x23);
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err += sn9c102_write_reg(cam, 0x66, 0x24);
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err += sn9c102_write_reg(cam, 0x76, 0x25);
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err += sn9c102_write_reg(cam, 0x85, 0x26);
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err += sn9c102_write_reg(cam, 0x94, 0x27);
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err += sn9c102_write_reg(cam, 0xa1, 0x28);
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err += sn9c102_write_reg(cam, 0xae, 0x29);
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err += sn9c102_write_reg(cam, 0xbb, 0x2a);
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err += sn9c102_write_reg(cam, 0xc7, 0x2b);
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err += sn9c102_write_reg(cam, 0xd3, 0x2c);
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err += sn9c102_write_reg(cam, 0xde, 0x2d);
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err += sn9c102_write_reg(cam, 0xea, 0x2e);
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err += sn9c102_write_reg(cam, 0xf4, 0x2f);
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err += sn9c102_write_reg(cam, 0xff, 0x30);
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err += sn9c102_write_reg(cam, 0x00, 0x3F);
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err += sn9c102_write_reg(cam, 0xC7, 0x40);
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err += sn9c102_write_reg(cam, 0x01, 0x41);
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err += sn9c102_write_reg(cam, 0x44, 0x42);
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err += sn9c102_write_reg(cam, 0x00, 0x43);
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err += sn9c102_write_reg(cam, 0x44, 0x44);
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err += sn9c102_write_reg(cam, 0x00, 0x45);
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err += sn9c102_write_reg(cam, 0x44, 0x46);
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err += sn9c102_write_reg(cam, 0x00, 0x47);
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err += sn9c102_write_reg(cam, 0xC7, 0x48);
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err += sn9c102_write_reg(cam, 0x01, 0x49);
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err += sn9c102_write_reg(cam, 0xC7, 0x4A);
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err += sn9c102_write_reg(cam, 0x01, 0x4B);
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err += sn9c102_write_reg(cam, 0xC7, 0x4C);
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err += sn9c102_write_reg(cam, 0x01, 0x4D);
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err += sn9c102_write_reg(cam, 0x44, 0x4E);
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err += sn9c102_write_reg(cam, 0x00, 0x4F);
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err += sn9c102_write_reg(cam, 0x44, 0x50);
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err += sn9c102_write_reg(cam, 0x00, 0x51);
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err += sn9c102_write_reg(cam, 0x44, 0x52);
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err += sn9c102_write_reg(cam, 0x00, 0x53);
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err += sn9c102_write_reg(cam, 0xC7, 0x54);
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err += sn9c102_write_reg(cam, 0x01, 0x55);
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err += sn9c102_write_reg(cam, 0xC7, 0x56);
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err += sn9c102_write_reg(cam, 0x01, 0x57);
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err += sn9c102_write_reg(cam, 0xC7, 0x58);
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err += sn9c102_write_reg(cam, 0x01, 0x59);
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err += sn9c102_write_reg(cam, 0x44, 0x5A);
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err += sn9c102_write_reg(cam, 0x00, 0x5B);
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err += sn9c102_write_reg(cam, 0x44, 0x5C);
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err += sn9c102_write_reg(cam, 0x00, 0x5D);
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err += sn9c102_write_reg(cam, 0x44, 0x5E);
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err += sn9c102_write_reg(cam, 0x00, 0x5F);
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err += sn9c102_write_reg(cam, 0xC7, 0x60);
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err += sn9c102_write_reg(cam, 0x01, 0x61);
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err += sn9c102_write_reg(cam, 0xC7, 0x62);
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err += sn9c102_write_reg(cam, 0x01, 0x63);
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err += sn9c102_write_reg(cam, 0xC7, 0x64);
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err += sn9c102_write_reg(cam, 0x01, 0x65);
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err += sn9c102_write_reg(cam, 0x44, 0x66);
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err += sn9c102_write_reg(cam, 0x00, 0x67);
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err += sn9c102_write_reg(cam, 0x44, 0x68);
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err += sn9c102_write_reg(cam, 0x00, 0x69);
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err += sn9c102_write_reg(cam, 0x44, 0x6A);
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err += sn9c102_write_reg(cam, 0x00, 0x6B);
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err += sn9c102_write_reg(cam, 0xC7, 0x6C);
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err += sn9c102_write_reg(cam, 0x01, 0x6D);
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err += sn9c102_write_reg(cam, 0xC7, 0x6E);
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err += sn9c102_write_reg(cam, 0x01, 0x6F);
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err += sn9c102_write_reg(cam, 0xC7, 0x70);
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err += sn9c102_write_reg(cam, 0x01, 0x71);
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err += sn9c102_write_reg(cam, 0x44, 0x72);
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err += sn9c102_write_reg(cam, 0x00, 0x73);
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err += sn9c102_write_reg(cam, 0x44, 0x74);
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err += sn9c102_write_reg(cam, 0x00, 0x75);
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err += sn9c102_write_reg(cam, 0x44, 0x76);
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err += sn9c102_write_reg(cam, 0x00, 0x77);
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err += sn9c102_write_reg(cam, 0xC7, 0x78);
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err += sn9c102_write_reg(cam, 0x01, 0x79);
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err += sn9c102_write_reg(cam, 0xC7, 0x7A);
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err += sn9c102_write_reg(cam, 0x01, 0x7B);
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err += sn9c102_write_reg(cam, 0xC7, 0x7C);
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err += sn9c102_write_reg(cam, 0x01, 0x7D);
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err += sn9c102_write_reg(cam, 0x44, 0x7E);
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err += sn9c102_write_reg(cam, 0x00, 0x7F);
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err += sn9c102_write_reg(cam, 0x14, 0x84);
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err += sn9c102_write_reg(cam, 0x00, 0x85);
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err += sn9c102_write_reg(cam, 0x27, 0x86);
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err += sn9c102_write_reg(cam, 0x00, 0x87);
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err += sn9c102_write_reg(cam, 0x07, 0x88);
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err += sn9c102_write_reg(cam, 0x00, 0x89);
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err += sn9c102_write_reg(cam, 0xEC, 0x8A);
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err += sn9c102_write_reg(cam, 0x0f, 0x8B);
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err += sn9c102_write_reg(cam, 0xD8, 0x8C);
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err += sn9c102_write_reg(cam, 0x0f, 0x8D);
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err += sn9c102_write_reg(cam, 0x3D, 0x8E);
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err += sn9c102_write_reg(cam, 0x00, 0x8F);
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err += sn9c102_write_reg(cam, 0x3D, 0x90);
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err += sn9c102_write_reg(cam, 0x00, 0x91);
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err += sn9c102_write_reg(cam, 0xCD, 0x92);
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err += sn9c102_write_reg(cam, 0x0f, 0x93);
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err += sn9c102_write_reg(cam, 0xf7, 0x94);
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err += sn9c102_write_reg(cam, 0x0f, 0x95);
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err += sn9c102_write_reg(cam, 0x0C, 0x96);
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err += sn9c102_write_reg(cam, 0x00, 0x97);
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err += sn9c102_write_reg(cam, 0x00, 0x98);
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err += sn9c102_write_reg(cam, 0x66, 0x99);
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err += sn9c102_write_reg(cam, 0x05, 0x9A);
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err += sn9c102_write_reg(cam, 0x00, 0x9B);
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err += sn9c102_write_reg(cam, 0x04, 0x9C);
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err += sn9c102_write_reg(cam, 0x00, 0x9D);
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err += sn9c102_write_reg(cam, 0x08, 0x9E);
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err += sn9c102_write_reg(cam, 0x00, 0x9F);
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err += sn9c102_write_reg(cam, 0x2D, 0xC0);
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err += sn9c102_write_reg(cam, 0x2D, 0xC1);
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err += sn9c102_write_reg(cam, 0x3A, 0xC2);
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err += sn9c102_write_reg(cam, 0x05, 0xC3);
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err += sn9c102_write_reg(cam, 0x04, 0xC4);
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err += sn9c102_write_reg(cam, 0x3F, 0xC5);
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err += sn9c102_write_reg(cam, 0x00, 0xC6);
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err += sn9c102_write_reg(cam, 0x00, 0xC7);
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err += sn9c102_write_reg(cam, 0x50, 0xC8);
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err += sn9c102_write_reg(cam, 0x3C, 0xC9);
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err += sn9c102_write_reg(cam, 0x28, 0xCA);
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err += sn9c102_write_reg(cam, 0xD8, 0xCB);
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err += sn9c102_write_reg(cam, 0x14, 0xCC);
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err += sn9c102_write_reg(cam, 0xEC, 0xCD);
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err += sn9c102_write_reg(cam, 0x32, 0xCE);
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err += sn9c102_write_reg(cam, 0xDD, 0xCF);
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err += sn9c102_write_reg(cam, 0x32, 0xD0);
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err += sn9c102_write_reg(cam, 0xDD, 0xD1);
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err += sn9c102_write_reg(cam, 0x6A, 0xD2);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0xD3);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xD4);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xD5);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xD6);
|
||||
err = sn9c102_write_const_regs(cam, {0x44, 0x01}, {0x40, 0x02},
|
||||
{0x00, 0x03}, {0x1a, 0x04},
|
||||
{0x44, 0x05}, {0x3e, 0x06},
|
||||
{0x1a, 0x07}, {0x03, 0x10},
|
||||
{0x08, 0x14}, {0xa3, 0x17},
|
||||
{0x4b, 0x18}, {0x00, 0x19},
|
||||
{0x1d, 0x1a}, {0x10, 0x1b},
|
||||
{0x02, 0x1c}, {0x03, 0x1d},
|
||||
{0x0f, 0x1e}, {0x0c, 0x1f},
|
||||
{0x00, 0x20}, {0x29, 0x21},
|
||||
{0x40, 0x22}, {0x54, 0x23},
|
||||
{0x66, 0x24}, {0x76, 0x25},
|
||||
{0x85, 0x26}, {0x94, 0x27},
|
||||
{0xa1, 0x28}, {0xae, 0x29},
|
||||
{0xbb, 0x2a}, {0xc7, 0x2b},
|
||||
{0xd3, 0x2c}, {0xde, 0x2d},
|
||||
{0xea, 0x2e}, {0xf4, 0x2f},
|
||||
{0xff, 0x30}, {0x00, 0x3F},
|
||||
{0xC7, 0x40}, {0x01, 0x41},
|
||||
{0x44, 0x42}, {0x00, 0x43},
|
||||
{0x44, 0x44}, {0x00, 0x45},
|
||||
{0x44, 0x46}, {0x00, 0x47},
|
||||
{0xC7, 0x48}, {0x01, 0x49},
|
||||
{0xC7, 0x4A}, {0x01, 0x4B},
|
||||
{0xC7, 0x4C}, {0x01, 0x4D},
|
||||
{0x44, 0x4E}, {0x00, 0x4F},
|
||||
{0x44, 0x50}, {0x00, 0x51},
|
||||
{0x44, 0x52}, {0x00, 0x53},
|
||||
{0xC7, 0x54}, {0x01, 0x55},
|
||||
{0xC7, 0x56}, {0x01, 0x57},
|
||||
{0xC7, 0x58}, {0x01, 0x59},
|
||||
{0x44, 0x5A}, {0x00, 0x5B},
|
||||
{0x44, 0x5C}, {0x00, 0x5D},
|
||||
{0x44, 0x5E}, {0x00, 0x5F},
|
||||
{0xC7, 0x60}, {0x01, 0x61},
|
||||
{0xC7, 0x62}, {0x01, 0x63},
|
||||
{0xC7, 0x64}, {0x01, 0x65},
|
||||
{0x44, 0x66}, {0x00, 0x67},
|
||||
{0x44, 0x68}, {0x00, 0x69},
|
||||
{0x44, 0x6A}, {0x00, 0x6B},
|
||||
{0xC7, 0x6C}, {0x01, 0x6D},
|
||||
{0xC7, 0x6E}, {0x01, 0x6F},
|
||||
{0xC7, 0x70}, {0x01, 0x71},
|
||||
{0x44, 0x72}, {0x00, 0x73},
|
||||
{0x44, 0x74}, {0x00, 0x75},
|
||||
{0x44, 0x76}, {0x00, 0x77},
|
||||
{0xC7, 0x78}, {0x01, 0x79},
|
||||
{0xC7, 0x7A}, {0x01, 0x7B},
|
||||
{0xC7, 0x7C}, {0x01, 0x7D},
|
||||
{0x44, 0x7E}, {0x00, 0x7F},
|
||||
{0x14, 0x84}, {0x00, 0x85},
|
||||
{0x27, 0x86}, {0x00, 0x87},
|
||||
{0x07, 0x88}, {0x00, 0x89},
|
||||
{0xEC, 0x8A}, {0x0f, 0x8B},
|
||||
{0xD8, 0x8C}, {0x0f, 0x8D},
|
||||
{0x3D, 0x8E}, {0x00, 0x8F},
|
||||
{0x3D, 0x90}, {0x00, 0x91},
|
||||
{0xCD, 0x92}, {0x0f, 0x93},
|
||||
{0xf7, 0x94}, {0x0f, 0x95},
|
||||
{0x0C, 0x96}, {0x00, 0x97},
|
||||
{0x00, 0x98}, {0x66, 0x99},
|
||||
{0x05, 0x9A}, {0x00, 0x9B},
|
||||
{0x04, 0x9C}, {0x00, 0x9D},
|
||||
{0x08, 0x9E}, {0x00, 0x9F},
|
||||
{0x2D, 0xC0}, {0x2D, 0xC1},
|
||||
{0x3A, 0xC2}, {0x05, 0xC3},
|
||||
{0x04, 0xC4}, {0x3F, 0xC5},
|
||||
{0x00, 0xC6}, {0x00, 0xC7},
|
||||
{0x50, 0xC8}, {0x3C, 0xC9},
|
||||
{0x28, 0xCA}, {0xD8, 0xCB},
|
||||
{0x14, 0xCC}, {0xEC, 0xCD},
|
||||
{0x32, 0xCE}, {0xDD, 0xCF},
|
||||
{0x32, 0xD0}, {0xDD, 0xD1},
|
||||
{0x6A, 0xD2}, {0x50, 0xD3},
|
||||
{0x00, 0xD4}, {0x00, 0xD5},
|
||||
{0x00, 0xD6});
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
@ -434,14 +344,12 @@ static struct sn9c102_sensor hv7131r = {
|
|||
|
||||
int sn9c102_probe_hv7131r(struct sn9c102_device* cam)
|
||||
{
|
||||
int devid, err = 0;
|
||||
int devid, err;
|
||||
|
||||
err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x44, 0x02},
|
||||
{0x34, 0x01}, {0x20, 0x17},
|
||||
{0x34, 0x01}, {0x46, 0x01});
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x09, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x02);
|
||||
err += sn9c102_write_reg(cam, 0x34, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x34, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x46, 0x01);
|
||||
if (err)
|
||||
return -EIO;
|
||||
|
||||
|
|
|
|||
|
|
@ -27,13 +27,10 @@ static int mi0343_init(struct sn9c102_device* cam)
|
|||
struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
|
||||
int err = 0;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x11);
|
||||
err += sn9c102_write_reg(cam, 0x0a, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x07, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0xa0, 0x19);
|
||||
err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11},
|
||||
{0x0a, 0x14}, {0x40, 0x01},
|
||||
{0x20, 0x17}, {0x07, 0x18},
|
||||
{0xa0, 0x19});
|
||||
|
||||
err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d,
|
||||
0x00, 0x01, 0, 0);
|
||||
|
|
@ -338,9 +335,9 @@ int sn9c102_probe_mi0343(struct sn9c102_device* cam)
|
|||
u8 data[5+1];
|
||||
int err = 0;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x28, 0x17);
|
||||
err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01},
|
||||
{0x28, 0x17});
|
||||
|
||||
if (err)
|
||||
return -EIO;
|
||||
|
||||
|
|
|
|||
|
|
@ -27,34 +27,20 @@ static int mi0360_init(struct sn9c102_device* cam)
|
|||
struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
|
||||
int err = 0;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x11);
|
||||
err += sn9c102_write_reg(cam, 0x0a, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x07, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0xa0, 0x19);
|
||||
err += sn9c102_write_reg(cam, 0x02, 0x1c);
|
||||
err += sn9c102_write_reg(cam, 0x03, 0x1d);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x1e);
|
||||
err += sn9c102_write_reg(cam, 0x0c, 0x1f);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x20);
|
||||
err += sn9c102_write_reg(cam, 0x10, 0x21);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x22);
|
||||
err += sn9c102_write_reg(cam, 0x30, 0x23);
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x24);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0x25);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x26);
|
||||
err += sn9c102_write_reg(cam, 0x70, 0x27);
|
||||
err += sn9c102_write_reg(cam, 0x80, 0x28);
|
||||
err += sn9c102_write_reg(cam, 0x90, 0x29);
|
||||
err += sn9c102_write_reg(cam, 0xa0, 0x2a);
|
||||
err += sn9c102_write_reg(cam, 0xb0, 0x2b);
|
||||
err += sn9c102_write_reg(cam, 0xc0, 0x2c);
|
||||
err += sn9c102_write_reg(cam, 0xd0, 0x2d);
|
||||
err += sn9c102_write_reg(cam, 0xe0, 0x2e);
|
||||
err += sn9c102_write_reg(cam, 0xf0, 0x2f);
|
||||
err += sn9c102_write_reg(cam, 0xff, 0x30);
|
||||
err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11},
|
||||
{0x0a, 0x14}, {0x40, 0x01},
|
||||
{0x20, 0x17}, {0x07, 0x18},
|
||||
{0xa0, 0x19}, {0x02, 0x1c},
|
||||
{0x03, 0x1d}, {0x0f, 0x1e},
|
||||
{0x0c, 0x1f}, {0x00, 0x20},
|
||||
{0x10, 0x21}, {0x20, 0x22},
|
||||
{0x30, 0x23}, {0x40, 0x24},
|
||||
{0x50, 0x25}, {0x60, 0x26},
|
||||
{0x70, 0x27}, {0x80, 0x28},
|
||||
{0x90, 0x29}, {0xa0, 0x2a},
|
||||
{0xb0, 0x2b}, {0xc0, 0x2c},
|
||||
{0xd0, 0x2d}, {0xe0, 0x2e},
|
||||
{0xf0, 0x2f}, {0xff, 0x30});
|
||||
|
||||
err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d,
|
||||
0x00, 0x01, 0, 0);
|
||||
|
|
@ -332,11 +318,10 @@ static struct sn9c102_sensor mi0360 = {
|
|||
int sn9c102_probe_mi0360(struct sn9c102_device* cam)
|
||||
{
|
||||
u8 data[5+1];
|
||||
int err = 0;
|
||||
int err;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x28, 0x17);
|
||||
err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01},
|
||||
{0x28, 0x17});
|
||||
if (err)
|
||||
return -EIO;
|
||||
|
||||
|
|
|
|||
|
|
@ -29,10 +29,9 @@ static int ov7630_init(struct sn9c102_device* cam)
|
|||
switch (sn9c102_get_bridge(cam)) {
|
||||
case BRIDGE_SN9C101:
|
||||
case BRIDGE_SN9C102:
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0x19);
|
||||
err = sn9c102_write_const_regs(cam, {0x00, 0x14},
|
||||
{0x60, 0x17}, {0x0f, 0x18},
|
||||
{0x50, 0x19});
|
||||
|
||||
err += sn9c102_i2c_write(cam, 0x12, 0x8d);
|
||||
err += sn9c102_i2c_write(cam, 0x12, 0x0d);
|
||||
|
|
@ -62,42 +61,26 @@ static int ov7630_init(struct sn9c102_device* cam)
|
|||
err += sn9c102_i2c_write(cam, 0x71, 0x00);
|
||||
err += sn9c102_i2c_write(cam, 0x74, 0x21);
|
||||
err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
|
||||
|
||||
break;
|
||||
case BRIDGE_SN9C103:
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x02);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x03);
|
||||
err += sn9c102_write_reg(cam, 0x1a, 0x04);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x05);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x06);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x07);
|
||||
err += sn9c102_write_reg(cam, 0x03, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x0a, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0x19);
|
||||
err += sn9c102_write_reg(cam, 0x1d, 0x1a);
|
||||
err += sn9c102_write_reg(cam, 0x10, 0x1b);
|
||||
err += sn9c102_write_reg(cam, 0x02, 0x1c);
|
||||
err += sn9c102_write_reg(cam, 0x03, 0x1d);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x1e);
|
||||
err += sn9c102_write_reg(cam, 0x0c, 0x1f);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x20);
|
||||
err += sn9c102_write_reg(cam, 0x10, 0x21);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x22);
|
||||
err += sn9c102_write_reg(cam, 0x30, 0x23);
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x24);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0x25);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x26);
|
||||
err += sn9c102_write_reg(cam, 0x70, 0x27);
|
||||
err += sn9c102_write_reg(cam, 0x80, 0x28);
|
||||
err += sn9c102_write_reg(cam, 0x90, 0x29);
|
||||
err += sn9c102_write_reg(cam, 0xa0, 0x2a);
|
||||
err += sn9c102_write_reg(cam, 0xb0, 0x2b);
|
||||
err += sn9c102_write_reg(cam, 0xc0, 0x2c);
|
||||
err += sn9c102_write_reg(cam, 0xd0, 0x2d);
|
||||
err += sn9c102_write_reg(cam, 0xe0, 0x2e);
|
||||
err += sn9c102_write_reg(cam, 0xf0, 0x2f);
|
||||
err += sn9c102_write_reg(cam, 0xff, 0x30);
|
||||
err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03},
|
||||
{0x1a, 0x04}, {0x20, 0x05},
|
||||
{0x20, 0x06}, {0x20, 0x07},
|
||||
{0x03, 0x10}, {0x0a, 0x14},
|
||||
{0x60, 0x17}, {0x0f, 0x18},
|
||||
{0x50, 0x19}, {0x1d, 0x1a},
|
||||
{0x10, 0x1b}, {0x02, 0x1c},
|
||||
{0x03, 0x1d}, {0x0f, 0x1e},
|
||||
{0x0c, 0x1f}, {0x00, 0x20},
|
||||
{0x10, 0x21}, {0x20, 0x22},
|
||||
{0x30, 0x23}, {0x40, 0x24},
|
||||
{0x50, 0x25}, {0x60, 0x26},
|
||||
{0x70, 0x27}, {0x80, 0x28},
|
||||
{0x90, 0x29}, {0xa0, 0x2a},
|
||||
{0xb0, 0x2b}, {0xc0, 0x2c},
|
||||
{0xd0, 0x2d}, {0xe0, 0x2e},
|
||||
{0xf0, 0x2f}, {0xff, 0x30});
|
||||
|
||||
err += sn9c102_i2c_write(cam, 0x12, 0x8d);
|
||||
err += sn9c102_i2c_write(cam, 0x12, 0x0d);
|
||||
|
|
@ -425,15 +408,14 @@ int sn9c102_probe_ov7630(struct sn9c102_device* cam)
|
|||
switch (sn9c102_get_bridge(cam)) {
|
||||
case BRIDGE_SN9C101:
|
||||
case BRIDGE_SN9C102:
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x28, 0x17);
|
||||
err = sn9c102_write_const_regs(cam, {0x01, 0x01},
|
||||
{0x00, 0x01}, {0x28, 0x17});
|
||||
|
||||
break;
|
||||
case BRIDGE_SN9C103: /* do _not_ change anything! */
|
||||
err += sn9c102_write_reg(cam, 0x09, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x42, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x28, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x02);
|
||||
err = sn9c102_write_const_regs(cam, {0x09, 0x01},
|
||||
{0x42, 0x01}, {0x28, 0x17},
|
||||
{0x44, 0x02});
|
||||
pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
|
||||
if (err || pid < 0) { /* try a different initialization */
|
||||
err = sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
|
|
|
|||
|
|
@ -26,153 +26,80 @@ static int ov7660_init(struct sn9c102_device* cam)
|
|||
{
|
||||
int err = 0;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x02);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x03);
|
||||
err += sn9c102_write_reg(cam, 0x1a, 0x04);
|
||||
err += sn9c102_write_reg(cam, 0x03, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x08, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x8b, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x19);
|
||||
err += sn9c102_write_reg(cam, 0x1d, 0x1a);
|
||||
err += sn9c102_write_reg(cam, 0x10, 0x1b);
|
||||
err += sn9c102_write_reg(cam, 0x02, 0x1c);
|
||||
err += sn9c102_write_reg(cam, 0x03, 0x1d);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x1e);
|
||||
err += sn9c102_write_reg(cam, 0x0c, 0x1f);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x20);
|
||||
err += sn9c102_write_reg(cam, 0x29, 0x21);
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x22);
|
||||
err += sn9c102_write_reg(cam, 0x54, 0x23);
|
||||
err += sn9c102_write_reg(cam, 0x66, 0x24);
|
||||
err += sn9c102_write_reg(cam, 0x76, 0x25);
|
||||
err += sn9c102_write_reg(cam, 0x85, 0x26);
|
||||
err += sn9c102_write_reg(cam, 0x94, 0x27);
|
||||
err += sn9c102_write_reg(cam, 0xa1, 0x28);
|
||||
err += sn9c102_write_reg(cam, 0xae, 0x29);
|
||||
err += sn9c102_write_reg(cam, 0xbb, 0x2a);
|
||||
err += sn9c102_write_reg(cam, 0xc7, 0x2b);
|
||||
err += sn9c102_write_reg(cam, 0xd3, 0x2c);
|
||||
err += sn9c102_write_reg(cam, 0xde, 0x2d);
|
||||
err += sn9c102_write_reg(cam, 0xea, 0x2e);
|
||||
err += sn9c102_write_reg(cam, 0xf4, 0x2f);
|
||||
err += sn9c102_write_reg(cam, 0xff, 0x30);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x3F);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x40);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x41);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x42);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x43);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x44);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x45);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x46);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x47);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x48);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x49);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x4A);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x4B);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x4C);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x4D);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x4E);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x4F);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x50);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x51);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x52);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x53);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x54);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x55);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x56);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x57);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x58);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x59);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x5A);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x5B);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x5C);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x5D);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x5E);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x5F);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x60);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x61);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x62);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x63);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x64);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x65);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x66);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x67);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x68);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x69);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x6A);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x6B);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x6C);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x6D);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x6E);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x6F);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x70);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x71);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x72);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x73);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x74);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x75);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x76);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x77);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x78);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x79);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x7A);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x7B);
|
||||
err += sn9c102_write_reg(cam, 0xC7, 0x7C);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x7D);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x7E);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x7F);
|
||||
err += sn9c102_write_reg(cam, 0x14, 0x84);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x85);
|
||||
err += sn9c102_write_reg(cam, 0x27, 0x86);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x87);
|
||||
err += sn9c102_write_reg(cam, 0x07, 0x88);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x89);
|
||||
err += sn9c102_write_reg(cam, 0xEC, 0x8A);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x8B);
|
||||
err += sn9c102_write_reg(cam, 0xD8, 0x8C);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x8D);
|
||||
err += sn9c102_write_reg(cam, 0x3D, 0x8E);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x8F);
|
||||
err += sn9c102_write_reg(cam, 0x3D, 0x90);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x91);
|
||||
err += sn9c102_write_reg(cam, 0xCD, 0x92);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x93);
|
||||
err += sn9c102_write_reg(cam, 0xf7, 0x94);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x95);
|
||||
err += sn9c102_write_reg(cam, 0x0C, 0x96);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x97);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x98);
|
||||
err += sn9c102_write_reg(cam, 0x66, 0x99);
|
||||
err += sn9c102_write_reg(cam, 0x05, 0x9A);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x9B);
|
||||
err += sn9c102_write_reg(cam, 0x04, 0x9C);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x9D);
|
||||
err += sn9c102_write_reg(cam, 0x08, 0x9E);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x9F);
|
||||
err += sn9c102_write_reg(cam, 0x2D, 0xC0);
|
||||
err += sn9c102_write_reg(cam, 0x2D, 0xC1);
|
||||
err += sn9c102_write_reg(cam, 0x3A, 0xC2);
|
||||
err += sn9c102_write_reg(cam, 0x05, 0xC3);
|
||||
err += sn9c102_write_reg(cam, 0x04, 0xC4);
|
||||
err += sn9c102_write_reg(cam, 0x3F, 0xC5);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xC6);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xC7);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0xC8);
|
||||
err += sn9c102_write_reg(cam, 0x3C, 0xC9);
|
||||
err += sn9c102_write_reg(cam, 0x28, 0xCA);
|
||||
err += sn9c102_write_reg(cam, 0xD8, 0xCB);
|
||||
err += sn9c102_write_reg(cam, 0x14, 0xCC);
|
||||
err += sn9c102_write_reg(cam, 0xEC, 0xCD);
|
||||
err += sn9c102_write_reg(cam, 0x32, 0xCE);
|
||||
err += sn9c102_write_reg(cam, 0xDD, 0xCF);
|
||||
err += sn9c102_write_reg(cam, 0x32, 0xD0);
|
||||
err += sn9c102_write_reg(cam, 0xDD, 0xD1);
|
||||
err += sn9c102_write_reg(cam, 0x6A, 0xD2);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0xD3);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xD4);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xD5);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xD6);
|
||||
err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03},
|
||||
{0x1a, 0x04}, {0x03, 0x10},
|
||||
{0x08, 0x14}, {0x20, 0x17},
|
||||
{0x8b, 0x18}, {0x00, 0x19},
|
||||
{0x1d, 0x1a}, {0x10, 0x1b},
|
||||
{0x02, 0x1c}, {0x03, 0x1d},
|
||||
{0x0f, 0x1e}, {0x0c, 0x1f},
|
||||
{0x00, 0x20}, {0x29, 0x21},
|
||||
{0x40, 0x22}, {0x54, 0x23},
|
||||
{0x66, 0x24}, {0x76, 0x25},
|
||||
{0x85, 0x26}, {0x94, 0x27},
|
||||
{0xa1, 0x28}, {0xae, 0x29},
|
||||
{0xbb, 0x2a}, {0xc7, 0x2b},
|
||||
{0xd3, 0x2c}, {0xde, 0x2d},
|
||||
{0xea, 0x2e}, {0xf4, 0x2f},
|
||||
{0xff, 0x30}, {0x00, 0x3F},
|
||||
{0xC7, 0x40}, {0x01, 0x41},
|
||||
{0x44, 0x42}, {0x00, 0x43},
|
||||
{0x44, 0x44}, {0x00, 0x45},
|
||||
{0x44, 0x46}, {0x00, 0x47},
|
||||
{0xC7, 0x48}, {0x01, 0x49},
|
||||
{0xC7, 0x4A}, {0x01, 0x4B},
|
||||
{0xC7, 0x4C}, {0x01, 0x4D},
|
||||
{0x44, 0x4E}, {0x00, 0x4F},
|
||||
{0x44, 0x50}, {0x00, 0x51},
|
||||
{0x44, 0x52}, {0x00, 0x53},
|
||||
{0xC7, 0x54}, {0x01, 0x55},
|
||||
{0xC7, 0x56}, {0x01, 0x57},
|
||||
{0xC7, 0x58}, {0x01, 0x59},
|
||||
{0x44, 0x5A}, {0x00, 0x5B},
|
||||
{0x44, 0x5C}, {0x00, 0x5D},
|
||||
{0x44, 0x5E}, {0x00, 0x5F},
|
||||
{0xC7, 0x60}, {0x01, 0x61},
|
||||
{0xC7, 0x62}, {0x01, 0x63},
|
||||
{0xC7, 0x64}, {0x01, 0x65},
|
||||
{0x44, 0x66}, {0x00, 0x67},
|
||||
{0x44, 0x68}, {0x00, 0x69},
|
||||
{0x44, 0x6A}, {0x00, 0x6B},
|
||||
{0xC7, 0x6C}, {0x01, 0x6D},
|
||||
{0xC7, 0x6E}, {0x01, 0x6F},
|
||||
{0xC7, 0x70}, {0x01, 0x71},
|
||||
{0x44, 0x72}, {0x00, 0x73},
|
||||
{0x44, 0x74}, {0x00, 0x75},
|
||||
{0x44, 0x76}, {0x00, 0x77},
|
||||
{0xC7, 0x78}, {0x01, 0x79},
|
||||
{0xC7, 0x7A}, {0x01, 0x7B},
|
||||
{0xC7, 0x7C}, {0x01, 0x7D},
|
||||
{0x44, 0x7E}, {0x00, 0x7F},
|
||||
{0x14, 0x84}, {0x00, 0x85},
|
||||
{0x27, 0x86}, {0x00, 0x87},
|
||||
{0x07, 0x88}, {0x00, 0x89},
|
||||
{0xEC, 0x8A}, {0x0f, 0x8B},
|
||||
{0xD8, 0x8C}, {0x0f, 0x8D},
|
||||
{0x3D, 0x8E}, {0x00, 0x8F},
|
||||
{0x3D, 0x90}, {0x00, 0x91},
|
||||
{0xCD, 0x92}, {0x0f, 0x93},
|
||||
{0xf7, 0x94}, {0x0f, 0x95},
|
||||
{0x0C, 0x96}, {0x00, 0x97},
|
||||
{0x00, 0x98}, {0x66, 0x99},
|
||||
{0x05, 0x9A}, {0x00, 0x9B},
|
||||
{0x04, 0x9C}, {0x00, 0x9D},
|
||||
{0x08, 0x9E}, {0x00, 0x9F},
|
||||
{0x2D, 0xC0}, {0x2D, 0xC1},
|
||||
{0x3A, 0xC2}, {0x05, 0xC3},
|
||||
{0x04, 0xC4}, {0x3F, 0xC5},
|
||||
{0x00, 0xC6}, {0x00, 0xC7},
|
||||
{0x50, 0xC8}, {0x3C, 0xC9},
|
||||
{0x28, 0xCA}, {0xD8, 0xCB},
|
||||
{0x14, 0xCC}, {0xEC, 0xCD},
|
||||
{0x32, 0xCE}, {0xDD, 0xCF},
|
||||
{0x32, 0xD0}, {0xDD, 0xD1},
|
||||
{0x6A, 0xD2}, {0x50, 0xD3},
|
||||
{0x00, 0xD4}, {0x00, 0xD5},
|
||||
{0x00, 0xD6});
|
||||
|
||||
err += sn9c102_i2c_write(cam, 0x12, 0x80);
|
||||
err += sn9c102_i2c_write(cam, 0x11, 0x09);
|
||||
|
|
@ -569,13 +496,11 @@ static struct sn9c102_sensor ov7660 = {
|
|||
|
||||
int sn9c102_probe_ov7660(struct sn9c102_device* cam)
|
||||
{
|
||||
int pid, ver, err = 0;
|
||||
int pid, ver, err;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x01, 0xf1);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0xf1);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x28, 0x17);
|
||||
err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1},
|
||||
{0x01, 0x01}, {0x00, 0x01},
|
||||
{0x28, 0x17});
|
||||
|
||||
pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a);
|
||||
ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b);
|
||||
|
|
|
|||
|
|
@ -27,12 +27,9 @@ static int pas106b_init(struct sn9c102_device* cam)
|
|||
{
|
||||
int err = 0;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x11);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x19);
|
||||
err += sn9c102_write_reg(cam, 0x09, 0x18);
|
||||
err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11},
|
||||
{0x00, 0x14}, {0x20, 0x17},
|
||||
{0x20, 0x19}, {0x09, 0x18});
|
||||
|
||||
err += sn9c102_i2c_write(cam, 0x02, 0x0c);
|
||||
err += sn9c102_i2c_write(cam, 0x05, 0x5a);
|
||||
|
|
@ -276,16 +273,17 @@ static struct sn9c102_sensor pas106b = {
|
|||
|
||||
int sn9c102_probe_pas106b(struct sn9c102_device* cam)
|
||||
{
|
||||
int r0 = 0, r1 = 0, err = 0;
|
||||
int r0 = 0, r1 = 0, err;
|
||||
unsigned int pid = 0;
|
||||
|
||||
/*
|
||||
Minimal initialization to enable the I2C communication
|
||||
NOTE: do NOT change the values!
|
||||
*/
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01); /* sensor power down */
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x01); /* sensor power on */
|
||||
err += sn9c102_write_reg(cam, 0x28, 0x17); /* sensor clock at 24 MHz */
|
||||
err = sn9c102_write_const_regs(cam,
|
||||
{0x01, 0x01}, /* sensor power down */
|
||||
{0x00, 0x01}, /* sensor power on */
|
||||
{0x28, 0x17});/* sensor clock 24 MHz */
|
||||
if (err)
|
||||
return -EIO;
|
||||
|
||||
|
|
|
|||
|
|
@ -35,47 +35,29 @@ static int pas202bcb_init(struct sn9c102_device* cam)
|
|||
switch (sn9c102_get_bridge(cam)) {
|
||||
case BRIDGE_SN9C101:
|
||||
case BRIDGE_SN9C102:
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x11);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x30, 0x19);
|
||||
err += sn9c102_write_reg(cam, 0x09, 0x18);
|
||||
err = sn9c102_write_const_regs(cam, {0x00, 0x10},
|
||||
{0x00, 0x11}, {0x00, 0x14},
|
||||
{0x20, 0x17}, {0x30, 0x19},
|
||||
{0x09, 0x18});
|
||||
break;
|
||||
case BRIDGE_SN9C103:
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x02);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x03);
|
||||
err += sn9c102_write_reg(cam, 0x1a, 0x04);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x05);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x06);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x07);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x11);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x30, 0x19);
|
||||
err += sn9c102_write_reg(cam, 0x09, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0x02, 0x1c);
|
||||
err += sn9c102_write_reg(cam, 0x03, 0x1d);
|
||||
err += sn9c102_write_reg(cam, 0x0f, 0x1e);
|
||||
err += sn9c102_write_reg(cam, 0x0c, 0x1f);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x20);
|
||||
err += sn9c102_write_reg(cam, 0x10, 0x21);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x22);
|
||||
err += sn9c102_write_reg(cam, 0x30, 0x23);
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x24);
|
||||
err += sn9c102_write_reg(cam, 0x50, 0x25);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x26);
|
||||
err += sn9c102_write_reg(cam, 0x70, 0x27);
|
||||
err += sn9c102_write_reg(cam, 0x80, 0x28);
|
||||
err += sn9c102_write_reg(cam, 0x90, 0x29);
|
||||
err += sn9c102_write_reg(cam, 0xa0, 0x2a);
|
||||
err += sn9c102_write_reg(cam, 0xb0, 0x2b);
|
||||
err += sn9c102_write_reg(cam, 0xc0, 0x2c);
|
||||
err += sn9c102_write_reg(cam, 0xd0, 0x2d);
|
||||
err += sn9c102_write_reg(cam, 0xe0, 0x2e);
|
||||
err += sn9c102_write_reg(cam, 0xf0, 0x2f);
|
||||
err += sn9c102_write_reg(cam, 0xff, 0x30);
|
||||
err = sn9c102_write_const_regs(cam, {0x00, 0x02},
|
||||
{0x00, 0x03}, {0x1a, 0x04},
|
||||
{0x20, 0x05}, {0x20, 0x06},
|
||||
{0x20, 0x07}, {0x00, 0x10},
|
||||
{0x00, 0x11}, {0x00, 0x14},
|
||||
{0x20, 0x17}, {0x30, 0x19},
|
||||
{0x09, 0x18}, {0x02, 0x1c},
|
||||
{0x03, 0x1d}, {0x0f, 0x1e},
|
||||
{0x0c, 0x1f}, {0x00, 0x20},
|
||||
{0x10, 0x21}, {0x20, 0x22},
|
||||
{0x30, 0x23}, {0x40, 0x24},
|
||||
{0x50, 0x25}, {0x60, 0x26},
|
||||
{0x70, 0x27}, {0x80, 0x28},
|
||||
{0x90, 0x29}, {0xa0, 0x2a},
|
||||
{0xb0, 0x2b}, {0xc0, 0x2c},
|
||||
{0xd0, 0x2d}, {0xe0, 0x2e},
|
||||
{0xf0, 0x2f}, {0xff, 0x30});
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
@ -325,15 +307,15 @@ int sn9c102_probe_pas202bcb(struct sn9c102_device* cam)
|
|||
switch (sn9c102_get_bridge(cam)) {
|
||||
case BRIDGE_SN9C101:
|
||||
case BRIDGE_SN9C102:
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01); /* power down */
|
||||
err += sn9c102_write_reg(cam, 0x40, 0x01); /* power on */
|
||||
err += sn9c102_write_reg(cam, 0x28, 0x17); /* clock 24 MHz */
|
||||
err = sn9c102_write_const_regs(cam,
|
||||
{0x01, 0x01}, /* power down */
|
||||
{0x40, 0x01}, /* power on */
|
||||
{0x28, 0x17});/* clock 24 MHz */
|
||||
break;
|
||||
case BRIDGE_SN9C103: /* do _not_ change anything! */
|
||||
err += sn9c102_write_reg(cam, 0x09, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x02);
|
||||
err += sn9c102_write_reg(cam, 0x29, 0x17);
|
||||
err = sn9c102_write_const_regs(cam, {0x09, 0x01},
|
||||
{0x44, 0x01}, {0x44, 0x02},
|
||||
{0x29, 0x17});
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -114,9 +114,17 @@ extern int sn9c102_i2c_write(struct sn9c102_device*, u8 address, u8 value);
|
|||
extern int sn9c102_i2c_read(struct sn9c102_device*, u8 address);
|
||||
|
||||
/* I/O on registers in the bridge. Could be used by the sensor methods too */
|
||||
extern int sn9c102_write_regs(struct sn9c102_device*, u8* buff, u16 index);
|
||||
extern int sn9c102_write_reg(struct sn9c102_device*, u8 value, u16 index);
|
||||
extern int sn9c102_pread_reg(struct sn9c102_device*, u16 index);
|
||||
extern int sn9c102_write_reg(struct sn9c102_device*, u8 value, u16 index);
|
||||
extern int sn9c102_write_regs(struct sn9c102_device*, const u8 valreg[][2],
|
||||
int count);
|
||||
/*
|
||||
* Write multiple registers with constant values. For example:
|
||||
* sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17}, {0x0f, 0x18});
|
||||
*/
|
||||
#define sn9c102_write_const_regs(device, data...) \
|
||||
({ const static u8 _data[][2] = {data}; \
|
||||
sn9c102_write_regs(device, _data, ARRAY_SIZE(_data)); })
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
|
|
|
|||
|
|
@ -26,14 +26,10 @@ static int tas5110c1b_init(struct sn9c102_device* cam)
|
|||
{
|
||||
int err = 0;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x44, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x11);
|
||||
err += sn9c102_write_reg(cam, 0x0a, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x06, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0xfb, 0x19);
|
||||
err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x44, 0x01},
|
||||
{0x00, 0x10}, {0x00, 0x11},
|
||||
{0x0a, 0x14}, {0x60, 0x17},
|
||||
{0x06, 0x18}, {0xfb, 0x19});
|
||||
|
||||
err += sn9c102_i2c_write(cam, 0xc0, 0x80);
|
||||
|
||||
|
|
|
|||
|
|
@ -24,14 +24,11 @@
|
|||
|
||||
static int tas5110d_init(struct sn9c102_device* cam)
|
||||
{
|
||||
int err = 0;
|
||||
int err;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x04, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x0a, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x06, 0x18);
|
||||
err += sn9c102_write_reg(cam, 0xfb, 0x19);
|
||||
err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x04, 0x01},
|
||||
{0x0a, 0x14}, {0x60, 0x17},
|
||||
{0x06, 0x18}, {0xfb, 0x19});
|
||||
|
||||
err += sn9c102_i2c_write(cam, 0x9a, 0xca);
|
||||
|
||||
|
|
|
|||
|
|
@ -24,16 +24,12 @@
|
|||
|
||||
static int tas5130d1b_init(struct sn9c102_device* cam)
|
||||
{
|
||||
int err = 0;
|
||||
int err;
|
||||
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x20, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x04, 0x01);
|
||||
err += sn9c102_write_reg(cam, 0x01, 0x10);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x11);
|
||||
err += sn9c102_write_reg(cam, 0x00, 0x14);
|
||||
err += sn9c102_write_reg(cam, 0x60, 0x17);
|
||||
err += sn9c102_write_reg(cam, 0x07, 0x18);
|
||||
err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x20, 0x17},
|
||||
{0x04, 0x01}, {0x01, 0x10},
|
||||
{0x00, 0x11}, {0x00, 0x14},
|
||||
{0x60, 0x17}, {0x07, 0x18});
|
||||
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
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