drm/i915: split power well 'set' handler to separate enable/disable/sync_hw
Split the 'set' power well handler into an 'enable', 'disable' and 'sync_hw' handler. This maps more conveniently to higher level operations, for example it allows us to push the hsw package c8 handling into the corresponding hsw/bdw enable/disable handlers and the hsw BIOS hand-over setting into the hsw/bdw sync_hw handler. No functional change. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: Appease checkpatch's whitespace complaints.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Imre Deak
Daniel Vetter
Родитель
f5938f3635
Коммит
c6cb582e6c
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@ -1014,6 +1014,36 @@ struct intel_ilk_power_mgmt {
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struct drm_i915_gem_object *renderctx;
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};
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struct drm_i915_private;
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struct i915_power_well;
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struct i915_power_well_ops {
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/*
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* Synchronize the well's hw state to match the current sw state, for
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* example enable/disable it based on the current refcount. Called
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* during driver init and resume time, possibly after first calling
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* the enable/disable handlers.
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*/
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void (*sync_hw)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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/*
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* Enable the well and resources that depend on it (for example
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* interrupts located on the well). Called after the 0->1 refcount
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* transition.
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*/
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void (*enable)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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/*
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* Disable the well and resources that depend on it. Called after
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* the 1->0 refcount transition.
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*/
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void (*disable)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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/* Returns the hw enabled state. */
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bool (*is_enabled)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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};
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/* Power well structure for haswell */
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struct i915_power_well {
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const char *name;
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@ -1022,10 +1052,7 @@ struct i915_power_well {
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int count;
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unsigned long domains;
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void *data;
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void (*set)(struct drm_i915_private *dev_priv, struct i915_power_well *power_well,
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bool enable);
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bool (*is_enabled)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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const struct i915_power_well_ops *ops;
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};
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struct i915_power_domains {
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@ -5258,7 +5258,7 @@ bool intel_display_power_enabled(struct drm_i915_private *dev_priv,
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if (power_well->always_on)
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continue;
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if (!power_well->is_enabled(dev_priv, power_well)) {
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if (!power_well->ops->is_enabled(dev_priv, power_well)) {
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is_enabled = false;
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break;
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}
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@ -5366,6 +5366,33 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
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}
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}
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static void hsw_power_well_sync_hw(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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hsw_set_power_well(dev_priv, power_well, power_well->count > 0);
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/*
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* We're taking over the BIOS, so clear any requests made by it since
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* the driver is in charge now.
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*/
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if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE_REQUEST)
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I915_WRITE(HSW_PWR_WELL_BIOS, 0);
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}
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static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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hsw_disable_package_c8(dev_priv);
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hsw_set_power_well(dev_priv, power_well, true);
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}
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static void hsw_power_well_disable(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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hsw_set_power_well(dev_priv, power_well, false);
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hsw_enable_package_c8(dev_priv);
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}
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void intel_display_power_get(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain)
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{
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@ -5378,10 +5405,8 @@ void intel_display_power_get(struct drm_i915_private *dev_priv,
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mutex_lock(&power_domains->lock);
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for_each_power_well(i, power_well, BIT(domain), power_domains)
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if (!power_well->count++ && power_well->set) {
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hsw_disable_package_c8(dev_priv);
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power_well->set(dev_priv, power_well, true);
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}
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if (!power_well->count++ && power_well->ops->enable)
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power_well->ops->enable(dev_priv, power_well);
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power_domains->domain_use_count[domain]++;
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@ -5405,11 +5430,9 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
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for_each_power_well_rev(i, power_well, BIT(domain), power_domains) {
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WARN_ON(!power_well->count);
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if (!--power_well->count && power_well->set &&
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i915.disable_power_well) {
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power_well->set(dev_priv, power_well, false);
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hsw_enable_package_c8(dev_priv);
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}
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if (!--power_well->count && power_well->ops->disable &&
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i915.disable_power_well)
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power_well->ops->disable(dev_priv, power_well);
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}
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mutex_unlock(&power_domains->lock);
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@ -5462,25 +5485,35 @@ EXPORT_SYMBOL_GPL(i915_release_power_well);
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(POWER_DOMAIN_MASK & ~BDW_ALWAYS_ON_POWER_DOMAINS) | \
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BIT(POWER_DOMAIN_INIT))
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static const struct i915_power_well_ops i9xx_always_on_power_well_ops = { };
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static struct i915_power_well i9xx_always_on_power_well[] = {
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{
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.name = "always-on",
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.always_on = 1,
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.domains = POWER_DOMAIN_MASK,
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.ops = &i9xx_always_on_power_well_ops,
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},
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};
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static const struct i915_power_well_ops hsw_power_well_ops = {
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.sync_hw = hsw_power_well_sync_hw,
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.enable = hsw_power_well_enable,
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.disable = hsw_power_well_disable,
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.is_enabled = hsw_power_well_enabled,
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};
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static struct i915_power_well hsw_power_wells[] = {
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{
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.name = "always-on",
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.always_on = 1,
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.domains = HSW_ALWAYS_ON_POWER_DOMAINS,
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.ops = &i9xx_always_on_power_well_ops,
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},
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{
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.name = "display",
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.domains = HSW_DISPLAY_POWER_DOMAINS,
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.is_enabled = hsw_power_well_enabled,
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.set = hsw_set_power_well,
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.ops = &hsw_power_well_ops,
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},
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};
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@ -5489,12 +5522,12 @@ static struct i915_power_well bdw_power_wells[] = {
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.name = "always-on",
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.always_on = 1,
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.domains = BDW_ALWAYS_ON_POWER_DOMAINS,
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.ops = &i9xx_always_on_power_well_ops,
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},
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{
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.name = "display",
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.domains = BDW_DISPLAY_POWER_DOMAINS,
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.is_enabled = hsw_power_well_enabled,
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.set = hsw_set_power_well,
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.ops = &hsw_power_well_ops,
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},
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};
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@ -5539,8 +5572,8 @@ static void intel_power_domains_resume(struct drm_i915_private *dev_priv)
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mutex_lock(&power_domains->lock);
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for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) {
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if (power_well->set)
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power_well->set(dev_priv, power_well, power_well->count > 0);
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if (power_well->ops->sync_hw)
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power_well->ops->sync_hw(dev_priv, power_well);
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}
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mutex_unlock(&power_domains->lock);
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}
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@ -5550,14 +5583,6 @@ void intel_power_domains_init_hw(struct drm_i915_private *dev_priv)
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/* For now, we need the power well to be always enabled. */
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intel_display_set_init_power(dev_priv, true);
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intel_power_domains_resume(dev_priv);
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if (!(IS_HASWELL(dev_priv->dev) || IS_BROADWELL(dev_priv->dev)))
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return;
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/* We're taking over the BIOS, so clear any requests made by it since
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* the driver is in charge now. */
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if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE_REQUEST)
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I915_WRITE(HSW_PWR_WELL_BIOS, 0);
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}
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/* Disables PC8 so we can use the GMBUS and DP AUX interrupts. */
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