V4L/DVB: vpfe-capture - converting dm355 ccdc driver to a platform driver
1) clocks are configured using generic clock names; 2) converts the driver to a platform driver; 3) cleanup - consolidate all static variables inside a structure, ccdc_cfg; The ccdc now uses a generic name for clocks. "master" and "slave". On individual platforms these clocks will inherit from the platform specific clock. This will allow re-use of the driver for the same IP across different SoCs. Updated based on Kevin's comments on clock configuration and error code (v3, v4). Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Родитель
51444ea3d4
Коммит
c70fc2d2cc
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@ -37,8 +37,12 @@
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/uaccess.h>
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#include <linux/uaccess.h>
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#include <linux/videodev2.h>
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#include <linux/videodev2.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <media/davinci/dm355_ccdc.h>
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#include <media/davinci/dm355_ccdc.h>
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#include <media/davinci/vpss.h>
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#include <media/davinci/vpss.h>
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#include "dm355_ccdc_regs.h"
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#include "dm355_ccdc_regs.h"
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#include "ccdc_hw_device.h"
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#include "ccdc_hw_device.h"
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@ -46,67 +50,75 @@ MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("CCDC Driver for DM355");
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MODULE_DESCRIPTION("CCDC Driver for DM355");
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MODULE_AUTHOR("Texas Instruments");
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MODULE_AUTHOR("Texas Instruments");
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static struct device *dev;
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static struct ccdc_oper_config {
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struct device *dev;
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/* Object for CCDC raw mode */
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/* CCDC interface type */
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static struct ccdc_params_raw ccdc_hw_params_raw = {
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enum vpfe_hw_if_type if_type;
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.pix_fmt = CCDC_PIXFMT_RAW,
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/* Raw Bayer configuration */
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.frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
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struct ccdc_params_raw bayer;
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.win = CCDC_WIN_VGA,
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/* YCbCr configuration */
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.fid_pol = VPFE_PINPOL_POSITIVE,
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struct ccdc_params_ycbcr ycbcr;
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.vd_pol = VPFE_PINPOL_POSITIVE,
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/* Master clock */
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.hd_pol = VPFE_PINPOL_POSITIVE,
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struct clk *mclk;
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.gain = {
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/* slave clock */
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.r_ye = 256,
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struct clk *sclk;
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.gb_g = 256,
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/* ccdc base address */
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.gr_cy = 256,
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void __iomem *base_addr;
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.b_mg = 256
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} ccdc_cfg = {
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/* Raw configurations */
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.bayer = {
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.pix_fmt = CCDC_PIXFMT_RAW,
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.frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
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.win = CCDC_WIN_VGA,
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.fid_pol = VPFE_PINPOL_POSITIVE,
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.vd_pol = VPFE_PINPOL_POSITIVE,
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.hd_pol = VPFE_PINPOL_POSITIVE,
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.gain = {
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.r_ye = 256,
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.gb_g = 256,
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.gr_cy = 256,
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.b_mg = 256
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},
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.config_params = {
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.datasft = 2,
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.mfilt1 = CCDC_NO_MEDIAN_FILTER1,
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.mfilt2 = CCDC_NO_MEDIAN_FILTER2,
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.alaw = {
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.gama_wd = 2,
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},
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.blk_clamp = {
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.sample_pixel = 1,
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.dc_sub = 25
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},
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.col_pat_field0 = {
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.olop = CCDC_GREEN_BLUE,
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.olep = CCDC_BLUE,
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.elop = CCDC_RED,
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.elep = CCDC_GREEN_RED
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},
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.col_pat_field1 = {
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.olop = CCDC_GREEN_BLUE,
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.olep = CCDC_BLUE,
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.elop = CCDC_RED,
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.elep = CCDC_GREEN_RED
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},
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},
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},
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},
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.config_params = {
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/* YCbCr configuration */
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.datasft = 2,
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.ycbcr = {
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.data_sz = CCDC_DATA_10BITS,
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.win = CCDC_WIN_PAL,
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.mfilt1 = CCDC_NO_MEDIAN_FILTER1,
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.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
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.mfilt2 = CCDC_NO_MEDIAN_FILTER2,
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.frm_fmt = CCDC_FRMFMT_INTERLACED,
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.alaw = {
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.fid_pol = VPFE_PINPOL_POSITIVE,
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.gama_wd = 2,
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.vd_pol = VPFE_PINPOL_POSITIVE,
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},
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.hd_pol = VPFE_PINPOL_POSITIVE,
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.blk_clamp = {
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.bt656_enable = 1,
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.sample_pixel = 1,
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.pix_order = CCDC_PIXORDER_CBYCRY,
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.dc_sub = 25
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.buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
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},
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.col_pat_field0 = {
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.olop = CCDC_GREEN_BLUE,
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.olep = CCDC_BLUE,
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.elop = CCDC_RED,
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.elep = CCDC_GREEN_RED
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},
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.col_pat_field1 = {
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.olop = CCDC_GREEN_BLUE,
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.olep = CCDC_BLUE,
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.elop = CCDC_RED,
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.elep = CCDC_GREEN_RED
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},
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},
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},
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};
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};
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/* Object for CCDC ycbcr mode */
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static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
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.win = CCDC_WIN_PAL,
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.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
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.frm_fmt = CCDC_FRMFMT_INTERLACED,
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.fid_pol = VPFE_PINPOL_POSITIVE,
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.vd_pol = VPFE_PINPOL_POSITIVE,
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.hd_pol = VPFE_PINPOL_POSITIVE,
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.bt656_enable = 1,
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.pix_order = CCDC_PIXORDER_CBYCRY,
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.buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
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};
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static enum vpfe_hw_if_type ccdc_if_type;
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static void *__iomem ccdc_base_addr;
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static int ccdc_addr_size;
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/* Raw Bayer formats */
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/* Raw Bayer formats */
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static u32 ccdc_raw_bayer_pix_formats[] =
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static u32 ccdc_raw_bayer_pix_formats[] =
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{V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
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{V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
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@ -118,18 +130,12 @@ static u32 ccdc_raw_yuv_pix_formats[] =
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/* register access routines */
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/* register access routines */
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static inline u32 regr(u32 offset)
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static inline u32 regr(u32 offset)
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{
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{
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return __raw_readl(ccdc_base_addr + offset);
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return __raw_readl(ccdc_cfg.base_addr + offset);
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}
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}
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static inline void regw(u32 val, u32 offset)
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static inline void regw(u32 val, u32 offset)
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{
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{
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__raw_writel(val, ccdc_base_addr + offset);
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__raw_writel(val, ccdc_cfg.base_addr + offset);
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}
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static void ccdc_set_ccdc_base(void *addr, int size)
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{
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ccdc_base_addr = addr;
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ccdc_addr_size = size;
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}
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}
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static void ccdc_enable(int en)
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static void ccdc_enable(int en)
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@ -153,12 +159,12 @@ static void ccdc_enable_output_to_sdram(int en)
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static void ccdc_config_gain_offset(void)
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static void ccdc_config_gain_offset(void)
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{
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{
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/* configure gain */
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/* configure gain */
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regw(ccdc_hw_params_raw.gain.r_ye, RYEGAIN);
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regw(ccdc_cfg.bayer.gain.r_ye, RYEGAIN);
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regw(ccdc_hw_params_raw.gain.gr_cy, GRCYGAIN);
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regw(ccdc_cfg.bayer.gain.gr_cy, GRCYGAIN);
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regw(ccdc_hw_params_raw.gain.gb_g, GBGGAIN);
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regw(ccdc_cfg.bayer.gain.gb_g, GBGGAIN);
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regw(ccdc_hw_params_raw.gain.b_mg, BMGGAIN);
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regw(ccdc_cfg.bayer.gain.b_mg, BMGGAIN);
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/* configure offset */
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/* configure offset */
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regw(ccdc_hw_params_raw.ccdc_offset, OFFSET);
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regw(ccdc_cfg.bayer.ccdc_offset, OFFSET);
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}
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}
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/*
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/*
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@ -169,7 +175,7 @@ static int ccdc_restore_defaults(void)
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{
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{
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int i;
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int i;
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dev_dbg(dev, "\nstarting ccdc_restore_defaults...");
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dev_dbg(ccdc_cfg.dev, "\nstarting ccdc_restore_defaults...");
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/* set all registers to zero */
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/* set all registers to zero */
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for (i = 0; i <= CCDC_REG_LAST; i += 4)
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for (i = 0; i <= CCDC_REG_LAST; i += 4)
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regw(0, i);
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regw(0, i);
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@ -180,30 +186,29 @@ static int ccdc_restore_defaults(void)
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regw(CULH_DEFAULT, CULH);
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regw(CULH_DEFAULT, CULH);
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regw(CULV_DEFAULT, CULV);
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regw(CULV_DEFAULT, CULV);
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/* Set default Gain and Offset */
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/* Set default Gain and Offset */
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ccdc_hw_params_raw.gain.r_ye = GAIN_DEFAULT;
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ccdc_cfg.bayer.gain.r_ye = GAIN_DEFAULT;
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ccdc_hw_params_raw.gain.gb_g = GAIN_DEFAULT;
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ccdc_cfg.bayer.gain.gb_g = GAIN_DEFAULT;
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ccdc_hw_params_raw.gain.gr_cy = GAIN_DEFAULT;
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ccdc_cfg.bayer.gain.gr_cy = GAIN_DEFAULT;
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ccdc_hw_params_raw.gain.b_mg = GAIN_DEFAULT;
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ccdc_cfg.bayer.gain.b_mg = GAIN_DEFAULT;
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ccdc_config_gain_offset();
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ccdc_config_gain_offset();
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regw(OUTCLIP_DEFAULT, OUTCLIP);
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regw(OUTCLIP_DEFAULT, OUTCLIP);
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regw(LSCCFG2_DEFAULT, LSCCFG2);
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regw(LSCCFG2_DEFAULT, LSCCFG2);
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/* select ccdc input */
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/* select ccdc input */
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if (vpss_select_ccdc_source(VPSS_CCDCIN)) {
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if (vpss_select_ccdc_source(VPSS_CCDCIN)) {
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dev_dbg(dev, "\ncouldn't select ccdc input source");
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dev_dbg(ccdc_cfg.dev, "\ncouldn't select ccdc input source");
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return -EFAULT;
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return -EFAULT;
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}
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}
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/* select ccdc clock */
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/* select ccdc clock */
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if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) {
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if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) {
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dev_dbg(dev, "\ncouldn't enable ccdc clock");
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dev_dbg(ccdc_cfg.dev, "\ncouldn't enable ccdc clock");
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return -EFAULT;
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return -EFAULT;
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}
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}
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dev_dbg(dev, "\nEnd of ccdc_restore_defaults...");
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dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_restore_defaults...");
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return 0;
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return 0;
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}
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}
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static int ccdc_open(struct device *device)
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static int ccdc_open(struct device *device)
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{
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{
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dev = device;
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return ccdc_restore_defaults();
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return ccdc_restore_defaults();
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}
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}
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@ -226,7 +231,7 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
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int vert_start, vert_nr_lines;
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int vert_start, vert_nr_lines;
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int mid_img = 0;
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int mid_img = 0;
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dev_dbg(dev, "\nStarting ccdc_setwin...");
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dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin...");
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/*
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/*
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* ppc - per pixel count. indicates how many pixels per cell
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* ppc - per pixel count. indicates how many pixels per cell
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@ -260,45 +265,46 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
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regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0);
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regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0);
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regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1);
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regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1);
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regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV);
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regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV);
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dev_dbg(dev, "\nEnd of ccdc_setwin...");
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dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin...");
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}
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}
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static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
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static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
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{
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{
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if (ccdcparam->datasft < CCDC_DATA_NO_SHIFT ||
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if (ccdcparam->datasft < CCDC_DATA_NO_SHIFT ||
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ccdcparam->datasft > CCDC_DATA_SHIFT_6BIT) {
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ccdcparam->datasft > CCDC_DATA_SHIFT_6BIT) {
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dev_dbg(dev, "Invalid value of data shift\n");
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dev_dbg(ccdc_cfg.dev, "Invalid value of data shift\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (ccdcparam->mfilt1 < CCDC_NO_MEDIAN_FILTER1 ||
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if (ccdcparam->mfilt1 < CCDC_NO_MEDIAN_FILTER1 ||
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ccdcparam->mfilt1 > CCDC_MEDIAN_FILTER1) {
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ccdcparam->mfilt1 > CCDC_MEDIAN_FILTER1) {
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dev_dbg(dev, "Invalid value of median filter1\n");
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dev_dbg(ccdc_cfg.dev, "Invalid value of median filter1\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (ccdcparam->mfilt2 < CCDC_NO_MEDIAN_FILTER2 ||
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if (ccdcparam->mfilt2 < CCDC_NO_MEDIAN_FILTER2 ||
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ccdcparam->mfilt2 > CCDC_MEDIAN_FILTER2) {
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ccdcparam->mfilt2 > CCDC_MEDIAN_FILTER2) {
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dev_dbg(dev, "Invalid value of median filter2\n");
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dev_dbg(ccdc_cfg.dev, "Invalid value of median filter2\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if ((ccdcparam->med_filt_thres < 0) ||
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if ((ccdcparam->med_filt_thres < 0) ||
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(ccdcparam->med_filt_thres > CCDC_MED_FILT_THRESH)) {
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(ccdcparam->med_filt_thres > CCDC_MED_FILT_THRESH)) {
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dev_dbg(dev, "Invalid value of median filter threshold\n");
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dev_dbg(ccdc_cfg.dev,
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"Invalid value of median filter thresold\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (ccdcparam->data_sz < CCDC_DATA_16BITS ||
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if (ccdcparam->data_sz < CCDC_DATA_16BITS ||
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ccdcparam->data_sz > CCDC_DATA_8BITS) {
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ccdcparam->data_sz > CCDC_DATA_8BITS) {
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dev_dbg(dev, "Invalid value of data size\n");
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dev_dbg(ccdc_cfg.dev, "Invalid value of data size\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (ccdcparam->alaw.enable) {
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if (ccdcparam->alaw.enable) {
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if (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_13_4 ||
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if (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_13_4 ||
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ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) {
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ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) {
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dev_dbg(dev, "Invalid value of ALAW\n");
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dev_dbg(ccdc_cfg.dev, "Invalid value of ALAW\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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}
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}
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@ -306,12 +312,14 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
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if (ccdcparam->blk_clamp.b_clamp_enable) {
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if (ccdcparam->blk_clamp.b_clamp_enable) {
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if (ccdcparam->blk_clamp.sample_pixel < CCDC_SAMPLE_1PIXELS ||
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if (ccdcparam->blk_clamp.sample_pixel < CCDC_SAMPLE_1PIXELS ||
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ccdcparam->blk_clamp.sample_pixel > CCDC_SAMPLE_16PIXELS) {
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ccdcparam->blk_clamp.sample_pixel > CCDC_SAMPLE_16PIXELS) {
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dev_dbg(dev, "Invalid value of sample pixel\n");
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dev_dbg(ccdc_cfg.dev,
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"Invalid value of sample pixel\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (ccdcparam->blk_clamp.sample_ln < CCDC_SAMPLE_1LINES ||
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if (ccdcparam->blk_clamp.sample_ln < CCDC_SAMPLE_1LINES ||
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||||||
ccdcparam->blk_clamp.sample_ln > CCDC_SAMPLE_16LINES) {
|
ccdcparam->blk_clamp.sample_ln > CCDC_SAMPLE_16LINES) {
|
||||||
dev_dbg(dev, "Invalid value of sample lines\n");
|
dev_dbg(ccdc_cfg.dev,
|
||||||
|
"Invalid value of sample lines\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -325,18 +333,18 @@ static int ccdc_set_params(void __user *params)
|
||||||
int x;
|
int x;
|
||||||
|
|
||||||
/* only raw module parameters can be set through the IOCTL */
|
/* only raw module parameters can be set through the IOCTL */
|
||||||
if (ccdc_if_type != VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
|
x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
|
||||||
if (x) {
|
if (x) {
|
||||||
dev_dbg(dev, "ccdc_set_params: error in copying ccdc"
|
dev_dbg(ccdc_cfg.dev, "ccdc_set_params: error in copying ccdc"
|
||||||
"params, %d\n", x);
|
"params, %d\n", x);
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!validate_ccdc_param(&ccdc_raw_params)) {
|
if (!validate_ccdc_param(&ccdc_raw_params)) {
|
||||||
memcpy(&ccdc_hw_params_raw.config_params,
|
memcpy(&ccdc_cfg.bayer.config_params,
|
||||||
&ccdc_raw_params,
|
&ccdc_raw_params,
|
||||||
sizeof(ccdc_raw_params));
|
sizeof(ccdc_raw_params));
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -347,11 +355,11 @@ static int ccdc_set_params(void __user *params)
|
||||||
/* This function will configure CCDC for YCbCr video capture */
|
/* This function will configure CCDC for YCbCr video capture */
|
||||||
static void ccdc_config_ycbcr(void)
|
static void ccdc_config_ycbcr(void)
|
||||||
{
|
{
|
||||||
struct ccdc_params_ycbcr *params = &ccdc_hw_params_ycbcr;
|
struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
|
||||||
u32 temp;
|
u32 temp;
|
||||||
|
|
||||||
/* first set the CCDC power on defaults values in all registers */
|
/* first set the CCDC power on defaults values in all registers */
|
||||||
dev_dbg(dev, "\nStarting ccdc_config_ycbcr...");
|
dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr...");
|
||||||
ccdc_restore_defaults();
|
ccdc_restore_defaults();
|
||||||
|
|
||||||
/* configure pixel format & video frame format */
|
/* configure pixel format & video frame format */
|
||||||
|
@ -403,7 +411,7 @@ static void ccdc_config_ycbcr(void)
|
||||||
regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST);
|
regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST);
|
||||||
}
|
}
|
||||||
|
|
||||||
dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n");
|
dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -483,7 +491,7 @@ int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
if (count) {
|
if (count) {
|
||||||
dev_err(dev, "defect table write timeout !!!\n");
|
dev_err(ccdc_cfg.dev, "defect table write timeout !!!\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -605,12 +613,12 @@ static void ccdc_config_color_patterns(struct ccdc_col_pat *pat0,
|
||||||
/* This function will configure CCDC for Raw mode image capture */
|
/* This function will configure CCDC for Raw mode image capture */
|
||||||
static int ccdc_config_raw(void)
|
static int ccdc_config_raw(void)
|
||||||
{
|
{
|
||||||
struct ccdc_params_raw *params = &ccdc_hw_params_raw;
|
struct ccdc_params_raw *params = &ccdc_cfg.bayer;
|
||||||
struct ccdc_config_params_raw *config_params =
|
struct ccdc_config_params_raw *config_params =
|
||||||
&ccdc_hw_params_raw.config_params;
|
&ccdc_cfg.bayer.config_params;
|
||||||
unsigned int val;
|
unsigned int val;
|
||||||
|
|
||||||
dev_dbg(dev, "\nStarting ccdc_config_raw...");
|
dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw...");
|
||||||
|
|
||||||
/* restore power on defaults to register */
|
/* restore power on defaults to register */
|
||||||
ccdc_restore_defaults();
|
ccdc_restore_defaults();
|
||||||
|
@ -659,7 +667,7 @@ static int ccdc_config_raw(void)
|
||||||
val |= (config_params->datasft & CCDC_DATASFT_MASK) <<
|
val |= (config_params->datasft & CCDC_DATASFT_MASK) <<
|
||||||
CCDC_DATASFT_SHIFT;
|
CCDC_DATASFT_SHIFT;
|
||||||
regw(val , MODESET);
|
regw(val , MODESET);
|
||||||
dev_dbg(dev, "\nWriting 0x%x to MODESET...\n", val);
|
dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to MODESET...\n", val);
|
||||||
|
|
||||||
/* Configure the Median Filter threshold */
|
/* Configure the Median Filter threshold */
|
||||||
regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT);
|
regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT);
|
||||||
|
@ -681,7 +689,7 @@ static int ccdc_config_raw(void)
|
||||||
(config_params->mfilt2 << CCDC_MFILT2_SHIFT));
|
(config_params->mfilt2 << CCDC_MFILT2_SHIFT));
|
||||||
|
|
||||||
regw(val, GAMMAWD);
|
regw(val, GAMMAWD);
|
||||||
dev_dbg(dev, "\nWriting 0x%x to GAMMAWD...\n", val);
|
dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to GAMMAWD...\n", val);
|
||||||
|
|
||||||
/* configure video window */
|
/* configure video window */
|
||||||
ccdc_setwin(¶ms->win, params->frm_fmt, 1);
|
ccdc_setwin(¶ms->win, params->frm_fmt, 1);
|
||||||
|
@ -706,7 +714,7 @@ static int ccdc_config_raw(void)
|
||||||
/* Configure the Gain & offset control */
|
/* Configure the Gain & offset control */
|
||||||
ccdc_config_gain_offset();
|
ccdc_config_gain_offset();
|
||||||
|
|
||||||
dev_dbg(dev, "\nWriting %x to COLPTN...\n", val);
|
dev_dbg(ccdc_cfg.dev, "\nWriting %x to COLPTN...\n", val);
|
||||||
|
|
||||||
/* Configure DATAOFST register */
|
/* Configure DATAOFST register */
|
||||||
val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) <<
|
val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) <<
|
||||||
|
@ -726,7 +734,7 @@ static int ccdc_config_raw(void)
|
||||||
CCDC_HSIZE_VAL_MASK;
|
CCDC_HSIZE_VAL_MASK;
|
||||||
|
|
||||||
/* adjust to multiple of 32 */
|
/* adjust to multiple of 32 */
|
||||||
dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
|
dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
|
||||||
(((params->win.width) + 31) >> 5) &
|
(((params->win.width) + 31) >> 5) &
|
||||||
CCDC_HSIZE_VAL_MASK);
|
CCDC_HSIZE_VAL_MASK);
|
||||||
} else {
|
} else {
|
||||||
|
@ -734,7 +742,7 @@ static int ccdc_config_raw(void)
|
||||||
val |= (((params->win.width * 2) + 31) >> 5) &
|
val |= (((params->win.width * 2) + 31) >> 5) &
|
||||||
CCDC_HSIZE_VAL_MASK;
|
CCDC_HSIZE_VAL_MASK;
|
||||||
|
|
||||||
dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
|
dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
|
||||||
(((params->win.width * 2) + 31) >> 5) &
|
(((params->win.width * 2) + 31) >> 5) &
|
||||||
CCDC_HSIZE_VAL_MASK);
|
CCDC_HSIZE_VAL_MASK);
|
||||||
}
|
}
|
||||||
|
@ -745,34 +753,34 @@ static int ccdc_config_raw(void)
|
||||||
if (params->image_invert_enable) {
|
if (params->image_invert_enable) {
|
||||||
/* For interlace inverse mode */
|
/* For interlace inverse mode */
|
||||||
regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST);
|
regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST);
|
||||||
dev_dbg(dev, "\nWriting %x to SDOFST...\n",
|
dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
|
||||||
CCDC_SDOFST_INTERLACE_INVERSE);
|
CCDC_SDOFST_INTERLACE_INVERSE);
|
||||||
} else {
|
} else {
|
||||||
/* For interlace non inverse mode */
|
/* For interlace non inverse mode */
|
||||||
regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST);
|
regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST);
|
||||||
dev_dbg(dev, "\nWriting %x to SDOFST...\n",
|
dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
|
||||||
CCDC_SDOFST_INTERLACE_NORMAL);
|
CCDC_SDOFST_INTERLACE_NORMAL);
|
||||||
}
|
}
|
||||||
} else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
|
} else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
|
||||||
if (params->image_invert_enable) {
|
if (params->image_invert_enable) {
|
||||||
/* For progessive inverse mode */
|
/* For progessive inverse mode */
|
||||||
regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST);
|
regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST);
|
||||||
dev_dbg(dev, "\nWriting %x to SDOFST...\n",
|
dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
|
||||||
CCDC_SDOFST_PROGRESSIVE_INVERSE);
|
CCDC_SDOFST_PROGRESSIVE_INVERSE);
|
||||||
} else {
|
} else {
|
||||||
/* For progessive non inverse mode */
|
/* For progessive non inverse mode */
|
||||||
regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST);
|
regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST);
|
||||||
dev_dbg(dev, "\nWriting %x to SDOFST...\n",
|
dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
|
||||||
CCDC_SDOFST_PROGRESSIVE_NORMAL);
|
CCDC_SDOFST_PROGRESSIVE_NORMAL);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
dev_dbg(dev, "\nend of ccdc_config_raw...");
|
dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw...");
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ccdc_configure(void)
|
static int ccdc_configure(void)
|
||||||
{
|
{
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
return ccdc_config_raw();
|
return ccdc_config_raw();
|
||||||
else
|
else
|
||||||
ccdc_config_ycbcr();
|
ccdc_config_ycbcr();
|
||||||
|
@ -781,23 +789,23 @@ static int ccdc_configure(void)
|
||||||
|
|
||||||
static int ccdc_set_buftype(enum ccdc_buftype buf_type)
|
static int ccdc_set_buftype(enum ccdc_buftype buf_type)
|
||||||
{
|
{
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
ccdc_hw_params_raw.buf_type = buf_type;
|
ccdc_cfg.bayer.buf_type = buf_type;
|
||||||
else
|
else
|
||||||
ccdc_hw_params_ycbcr.buf_type = buf_type;
|
ccdc_cfg.ycbcr.buf_type = buf_type;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
static enum ccdc_buftype ccdc_get_buftype(void)
|
static enum ccdc_buftype ccdc_get_buftype(void)
|
||||||
{
|
{
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
return ccdc_hw_params_raw.buf_type;
|
return ccdc_cfg.bayer.buf_type;
|
||||||
return ccdc_hw_params_ycbcr.buf_type;
|
return ccdc_cfg.ycbcr.buf_type;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ccdc_enum_pix(u32 *pix, int i)
|
static int ccdc_enum_pix(u32 *pix, int i)
|
||||||
{
|
{
|
||||||
int ret = -EINVAL;
|
int ret = -EINVAL;
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER) {
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
|
||||||
if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
|
if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
|
||||||
*pix = ccdc_raw_bayer_pix_formats[i];
|
*pix = ccdc_raw_bayer_pix_formats[i];
|
||||||
ret = 0;
|
ret = 0;
|
||||||
|
@ -813,20 +821,19 @@ static int ccdc_enum_pix(u32 *pix, int i)
|
||||||
|
|
||||||
static int ccdc_set_pixel_format(u32 pixfmt)
|
static int ccdc_set_pixel_format(u32 pixfmt)
|
||||||
{
|
{
|
||||||
struct ccdc_a_law *alaw =
|
struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
|
||||||
&ccdc_hw_params_raw.config_params.alaw;
|
|
||||||
|
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER) {
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
|
||||||
ccdc_hw_params_raw.pix_fmt = CCDC_PIXFMT_RAW;
|
ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
|
||||||
if (pixfmt == V4L2_PIX_FMT_SBGGR8)
|
if (pixfmt == V4L2_PIX_FMT_SBGGR8)
|
||||||
alaw->enable = 1;
|
alaw->enable = 1;
|
||||||
else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
|
else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
} else {
|
} else {
|
||||||
if (pixfmt == V4L2_PIX_FMT_YUYV)
|
if (pixfmt == V4L2_PIX_FMT_YUYV)
|
||||||
ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
|
ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
|
||||||
else if (pixfmt == V4L2_PIX_FMT_UYVY)
|
else if (pixfmt == V4L2_PIX_FMT_UYVY)
|
||||||
ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
|
ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
|
||||||
else
|
else
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
@ -834,17 +841,16 @@ static int ccdc_set_pixel_format(u32 pixfmt)
|
||||||
}
|
}
|
||||||
static u32 ccdc_get_pixel_format(void)
|
static u32 ccdc_get_pixel_format(void)
|
||||||
{
|
{
|
||||||
struct ccdc_a_law *alaw =
|
struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
|
||||||
&ccdc_hw_params_raw.config_params.alaw;
|
|
||||||
u32 pixfmt;
|
u32 pixfmt;
|
||||||
|
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
if (alaw->enable)
|
if (alaw->enable)
|
||||||
pixfmt = V4L2_PIX_FMT_SBGGR8;
|
pixfmt = V4L2_PIX_FMT_SBGGR8;
|
||||||
else
|
else
|
||||||
pixfmt = V4L2_PIX_FMT_SBGGR16;
|
pixfmt = V4L2_PIX_FMT_SBGGR16;
|
||||||
else {
|
else {
|
||||||
if (ccdc_hw_params_ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
|
if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
|
||||||
pixfmt = V4L2_PIX_FMT_YUYV;
|
pixfmt = V4L2_PIX_FMT_YUYV;
|
||||||
else
|
else
|
||||||
pixfmt = V4L2_PIX_FMT_UYVY;
|
pixfmt = V4L2_PIX_FMT_UYVY;
|
||||||
|
@ -853,53 +859,53 @@ static u32 ccdc_get_pixel_format(void)
|
||||||
}
|
}
|
||||||
static int ccdc_set_image_window(struct v4l2_rect *win)
|
static int ccdc_set_image_window(struct v4l2_rect *win)
|
||||||
{
|
{
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
ccdc_hw_params_raw.win = *win;
|
ccdc_cfg.bayer.win = *win;
|
||||||
else
|
else
|
||||||
ccdc_hw_params_ycbcr.win = *win;
|
ccdc_cfg.ycbcr.win = *win;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ccdc_get_image_window(struct v4l2_rect *win)
|
static void ccdc_get_image_window(struct v4l2_rect *win)
|
||||||
{
|
{
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
*win = ccdc_hw_params_raw.win;
|
*win = ccdc_cfg.bayer.win;
|
||||||
else
|
else
|
||||||
*win = ccdc_hw_params_ycbcr.win;
|
*win = ccdc_cfg.ycbcr.win;
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int ccdc_get_line_length(void)
|
static unsigned int ccdc_get_line_length(void)
|
||||||
{
|
{
|
||||||
struct ccdc_config_params_raw *config_params =
|
struct ccdc_config_params_raw *config_params =
|
||||||
&ccdc_hw_params_raw.config_params;
|
&ccdc_cfg.bayer.config_params;
|
||||||
unsigned int len;
|
unsigned int len;
|
||||||
|
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER) {
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
|
||||||
if ((config_params->alaw.enable) ||
|
if ((config_params->alaw.enable) ||
|
||||||
(config_params->data_sz == CCDC_DATA_8BITS))
|
(config_params->data_sz == CCDC_DATA_8BITS))
|
||||||
len = ccdc_hw_params_raw.win.width;
|
len = ccdc_cfg.bayer.win.width;
|
||||||
else
|
else
|
||||||
len = ccdc_hw_params_raw.win.width * 2;
|
len = ccdc_cfg.bayer.win.width * 2;
|
||||||
} else
|
} else
|
||||||
len = ccdc_hw_params_ycbcr.win.width * 2;
|
len = ccdc_cfg.ycbcr.win.width * 2;
|
||||||
return ALIGN(len, 32);
|
return ALIGN(len, 32);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
|
static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
|
||||||
{
|
{
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
ccdc_hw_params_raw.frm_fmt = frm_fmt;
|
ccdc_cfg.bayer.frm_fmt = frm_fmt;
|
||||||
else
|
else
|
||||||
ccdc_hw_params_ycbcr.frm_fmt = frm_fmt;
|
ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static enum ccdc_frmfmt ccdc_get_frame_format(void)
|
static enum ccdc_frmfmt ccdc_get_frame_format(void)
|
||||||
{
|
{
|
||||||
if (ccdc_if_type == VPFE_RAW_BAYER)
|
if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
|
||||||
return ccdc_hw_params_raw.frm_fmt;
|
return ccdc_cfg.bayer.frm_fmt;
|
||||||
else
|
else
|
||||||
return ccdc_hw_params_ycbcr.frm_fmt;
|
return ccdc_cfg.ycbcr.frm_fmt;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ccdc_getfid(void)
|
static int ccdc_getfid(void)
|
||||||
|
@ -916,14 +922,14 @@ static inline void ccdc_setfbaddr(unsigned long addr)
|
||||||
|
|
||||||
static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
|
static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
|
||||||
{
|
{
|
||||||
ccdc_if_type = params->if_type;
|
ccdc_cfg.if_type = params->if_type;
|
||||||
|
|
||||||
switch (params->if_type) {
|
switch (params->if_type) {
|
||||||
case VPFE_BT656:
|
case VPFE_BT656:
|
||||||
case VPFE_YCBCR_SYNC_16:
|
case VPFE_YCBCR_SYNC_16:
|
||||||
case VPFE_YCBCR_SYNC_8:
|
case VPFE_YCBCR_SYNC_8:
|
||||||
ccdc_hw_params_ycbcr.vd_pol = params->vdpol;
|
ccdc_cfg.ycbcr.vd_pol = params->vdpol;
|
||||||
ccdc_hw_params_ycbcr.hd_pol = params->hdpol;
|
ccdc_cfg.ycbcr.hd_pol = params->hdpol;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
/* TODO add support for raw bayer here */
|
/* TODO add support for raw bayer here */
|
||||||
|
@ -938,7 +944,6 @@ static struct ccdc_hw_device ccdc_hw_dev = {
|
||||||
.hw_ops = {
|
.hw_ops = {
|
||||||
.open = ccdc_open,
|
.open = ccdc_open,
|
||||||
.close = ccdc_close,
|
.close = ccdc_close,
|
||||||
.set_ccdc_base = ccdc_set_ccdc_base,
|
|
||||||
.enable = ccdc_enable,
|
.enable = ccdc_enable,
|
||||||
.enable_out_to_sdram = ccdc_enable_output_to_sdram,
|
.enable_out_to_sdram = ccdc_enable_output_to_sdram,
|
||||||
.set_hw_if_params = ccdc_set_hw_if_params,
|
.set_hw_if_params = ccdc_set_hw_if_params,
|
||||||
|
@ -959,19 +964,118 @@ static struct ccdc_hw_device ccdc_hw_dev = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static int __init dm355_ccdc_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
void (*setup_pinmux)(void);
|
||||||
|
struct resource *res;
|
||||||
|
int status = 0;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* first try to register with vpfe. If not correct platform, then we
|
||||||
|
* don't have to iomap
|
||||||
|
*/
|
||||||
|
status = vpfe_register_ccdc_device(&ccdc_hw_dev);
|
||||||
|
if (status < 0)
|
||||||
|
return status;
|
||||||
|
|
||||||
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
if (!res) {
|
||||||
|
status = -ENODEV;
|
||||||
|
goto fail_nores;
|
||||||
|
}
|
||||||
|
|
||||||
|
res = request_mem_region(res->start, resource_size(res), res->name);
|
||||||
|
if (!res) {
|
||||||
|
status = -EBUSY;
|
||||||
|
goto fail_nores;
|
||||||
|
}
|
||||||
|
|
||||||
|
ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
|
||||||
|
if (!ccdc_cfg.base_addr) {
|
||||||
|
status = -ENOMEM;
|
||||||
|
goto fail_nomem;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Get and enable Master clock */
|
||||||
|
ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
|
||||||
|
if (IS_ERR(ccdc_cfg.mclk)) {
|
||||||
|
status = PTR_ERR(ccdc_cfg.mclk);
|
||||||
|
goto fail_nomap;
|
||||||
|
}
|
||||||
|
if (clk_enable(ccdc_cfg.mclk)) {
|
||||||
|
status = -ENODEV;
|
||||||
|
goto fail_mclk;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Get and enable Slave clock */
|
||||||
|
ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
|
||||||
|
if (IS_ERR(ccdc_cfg.sclk)) {
|
||||||
|
status = PTR_ERR(ccdc_cfg.sclk);
|
||||||
|
goto fail_mclk;
|
||||||
|
}
|
||||||
|
if (clk_enable(ccdc_cfg.sclk)) {
|
||||||
|
status = -ENODEV;
|
||||||
|
goto fail_sclk;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Platform data holds setup_pinmux function ptr */
|
||||||
|
if (NULL == pdev->dev.platform_data) {
|
||||||
|
status = -ENODEV;
|
||||||
|
goto fail_sclk;
|
||||||
|
}
|
||||||
|
setup_pinmux = pdev->dev.platform_data;
|
||||||
|
/*
|
||||||
|
* setup Mux configuration for ccdc which may be different for
|
||||||
|
* different SoCs using this CCDC
|
||||||
|
*/
|
||||||
|
setup_pinmux();
|
||||||
|
ccdc_cfg.dev = &pdev->dev;
|
||||||
|
printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name);
|
||||||
|
return 0;
|
||||||
|
fail_sclk:
|
||||||
|
clk_put(ccdc_cfg.sclk);
|
||||||
|
fail_mclk:
|
||||||
|
clk_put(ccdc_cfg.mclk);
|
||||||
|
fail_nomap:
|
||||||
|
iounmap(ccdc_cfg.base_addr);
|
||||||
|
fail_nomem:
|
||||||
|
release_mem_region(res->start, resource_size(res));
|
||||||
|
fail_nores:
|
||||||
|
vpfe_unregister_ccdc_device(&ccdc_hw_dev);
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int dm355_ccdc_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct resource *res;
|
||||||
|
|
||||||
|
clk_put(ccdc_cfg.mclk);
|
||||||
|
clk_put(ccdc_cfg.sclk);
|
||||||
|
iounmap(ccdc_cfg.base_addr);
|
||||||
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
if (res)
|
||||||
|
release_mem_region(res->start, resource_size(res));
|
||||||
|
vpfe_unregister_ccdc_device(&ccdc_hw_dev);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct platform_driver dm355_ccdc_driver = {
|
||||||
|
.driver = {
|
||||||
|
.name = "dm355_ccdc",
|
||||||
|
.owner = THIS_MODULE,
|
||||||
|
},
|
||||||
|
.remove = __devexit_p(dm355_ccdc_remove),
|
||||||
|
.probe = dm355_ccdc_probe,
|
||||||
|
};
|
||||||
|
|
||||||
static int __init dm355_ccdc_init(void)
|
static int __init dm355_ccdc_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_NOTICE "dm355_ccdc_init\n");
|
return platform_driver_register(&dm355_ccdc_driver);
|
||||||
if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0)
|
|
||||||
return -1;
|
|
||||||
printk(KERN_NOTICE "%s is registered with vpfe.\n",
|
|
||||||
ccdc_hw_dev.name);
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __exit dm355_ccdc_exit(void)
|
static void __exit dm355_ccdc_exit(void)
|
||||||
{
|
{
|
||||||
vpfe_unregister_ccdc_device(&ccdc_hw_dev);
|
platform_driver_unregister(&dm355_ccdc_driver);
|
||||||
}
|
}
|
||||||
|
|
||||||
module_init(dm355_ccdc_init);
|
module_init(dm355_ccdc_init);
|
||||||
|
|
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