xtensa: reimplement DMA API using common helpers
- keep existing functionality: don't handle attributes, don't support high memory; - implement scatterlist primitives (map/unmap/sync); - enable DMA API debug. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov
Родитель
4229fb12a0
Коммит
c75959a6da
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@ -14,6 +14,8 @@ config XTENSA
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select GENERIC_IRQ_SHOW
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select GENERIC_PCI_IOMAP
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select GENERIC_SCHED_CLOCK
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select HAVE_DMA_API_DEBUG
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select HAVE_DMA_ATTRS
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select HAVE_FUNCTION_TRACER
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select HAVE_IRQ_TIME_ACCOUNTING
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select HAVE_OPROFILE
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@ -2,7 +2,6 @@ generic-y += bitsperlong.h
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generic-y += bug.h
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generic-y += clkdev.h
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generic-y += cputime.h
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generic-y += device.h
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generic-y += div64.h
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generic-y += emergency-restart.h
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generic-y += errno.h
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@ -0,0 +1,19 @@
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/*
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* Arch specific extensions to struct device
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*
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* This file is released under the GPLv2
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*/
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#ifndef _ASM_XTENSA_DEVICE_H
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#define _ASM_XTENSA_DEVICE_H
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struct dma_map_ops;
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struct dev_archdata {
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/* DMA operations on that device */
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struct dma_map_ops *dma_ops;
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};
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struct pdev_archdata {
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};
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#endif /* _ASM_XTENSA_DEVICE_H */
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@ -1,11 +1,10 @@
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/*
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* include/asm-xtensa/dma-mapping.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003 - 2005 Tensilica Inc.
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* Copyright (C) 2015 Cadence Design Systems Inc.
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*/
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#ifndef _XTENSA_DMA_MAPPING_H
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@ -13,142 +12,67 @@
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#include <asm/cache.h>
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#include <asm/io.h>
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#include <asm-generic/dma-coherent.h>
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
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/*
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* DMA-consistent mapping functions.
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*/
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extern struct dma_map_ops xtensa_dma_map_ops;
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extern void *consistent_alloc(int, size_t, dma_addr_t, unsigned long);
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extern void consistent_free(void*, size_t, dma_addr_t);
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extern void consistent_sync(void*, size_t, int);
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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static inline dma_addr_t
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dma_map_single(struct device *dev, void *ptr, size_t size,
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enum dma_data_direction direction)
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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BUG_ON(direction == DMA_NONE);
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consistent_sync(ptr, size, direction);
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return virt_to_phys(ptr);
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if (dev && dev->archdata.dma_ops)
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return dev->archdata.dma_ops;
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else
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return &xtensa_dma_map_ops;
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}
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static inline void
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dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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#include <asm-generic/dma-mapping-common.h>
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
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#define dma_free_noncoherent(d, s, v, h) dma_free_attrs(d, s, v, h, NULL)
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#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
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#define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)
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static inline void *dma_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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struct dma_attrs *attrs)
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{
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BUG_ON(direction == DMA_NONE);
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void *ret;
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struct dma_map_ops *ops = get_dma_ops(dev);
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if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
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return ret;
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ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
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debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
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return ret;
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}
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
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enum dma_data_direction direction)
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static inline void dma_free_attrs(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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int i;
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struct scatterlist *sg;
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(direction == DMA_NONE);
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if (dma_release_from_coherent(dev, get_order(size), vaddr))
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return;
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for_each_sg(sglist, sg, nents, i) {
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BUG_ON(!sg_page(sg));
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sg->dma_address = sg_phys(sg);
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consistent_sync(sg_virt(sg), sg->length, direction);
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}
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return nents;
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ops->free(dev, size, vaddr, dma_handle, attrs);
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debug_dma_free_coherent(dev, size, vaddr, dma_handle);
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}
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static inline dma_addr_t
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dma_map_page(struct device *dev, struct page *page, unsigned long offset,
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size_t size, enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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return (dma_addr_t)(page_to_pfn(page)) * PAGE_SIZE + offset;
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}
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static inline void
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dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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}
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static inline void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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}
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static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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consistent_sync((void *)bus_to_virt(dma_handle), size, direction);
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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consistent_sync((void *)bus_to_virt(dma_handle), size, direction);
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}
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static inline void
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dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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consistent_sync((void *)bus_to_virt(dma_handle)+offset,size,direction);
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}
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static inline void
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dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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consistent_sync((void *)bus_to_virt(dma_handle)+offset,size,direction);
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}
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nelems,
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enum dma_data_direction dir)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nelems, i)
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consistent_sync(sg_virt(sg), sg->length, dir);
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
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int nelems, enum dma_data_direction dir)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nelems, i)
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consistent_sync(sg_virt(sg), sg->length, dir);
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}
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static inline int
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dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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struct dma_map_ops *ops = get_dma_ops(dev);
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debug_dma_mapping_error(dev, dma_addr);
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return ops->mapping_error(dev, dma_addr);
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}
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static inline int
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@ -168,39 +92,7 @@ dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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consistent_sync(vaddr, size, direction);
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}
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/* Not supported for now */
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static inline int dma_mmap_coherent(struct device *dev,
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struct vm_area_struct *vma, void *cpu_addr,
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dma_addr_t dma_addr, size_t size)
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{
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return -EINVAL;
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}
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static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr,
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size_t size)
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{
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return -EINVAL;
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}
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static inline void *dma_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag,
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struct dma_attrs *attrs)
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{
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return NULL;
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}
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static inline void dma_free_attrs(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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}
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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#endif /* _XTENSA_DMA_MAPPING_H */
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@ -1,6 +1,4 @@
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/*
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* arch/xtensa/kernel/pci-dma.c
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*
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* DMA coherent memory allocation.
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*
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* This program is free software; you can redistribute it and/or modify it
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@ -9,6 +7,7 @@
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* option) any later version.
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*
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* Copyright (C) 2002 - 2005 Tensilica Inc.
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* Copyright (C) 2015 Cadence Design Systems Inc.
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*
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* Based on version for i386.
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*
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@ -25,13 +24,107 @@
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#include <asm/io.h>
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#include <asm/cacheflush.h>
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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__flush_invalidate_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_FROM_DEVICE:
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__invalidate_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_TO_DEVICE:
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__flush_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_NONE:
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BUG();
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break;
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}
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}
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EXPORT_SYMBOL(dma_cache_sync);
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static void xtensa_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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void *vaddr;
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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case DMA_FROM_DEVICE:
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vaddr = bus_to_virt(dma_handle);
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__invalidate_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_NONE:
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BUG();
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break;
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default:
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break;
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}
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}
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static void xtensa_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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void *vaddr;
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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case DMA_TO_DEVICE:
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vaddr = bus_to_virt(dma_handle);
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__flush_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_NONE:
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BUG();
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break;
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default:
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break;
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}
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}
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static void xtensa_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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xtensa_sync_single_for_cpu(dev, sg_dma_address(s),
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sg_dma_len(s), dir);
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}
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}
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static void xtensa_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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xtensa_sync_single_for_device(dev, sg_dma_address(s),
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sg_dma_len(s), dir);
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}
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}
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/*
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* Note: We assume that the full memory space is always mapped to 'kseg'
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* Otherwise we have to use page attributes (not implemented).
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*/
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void *
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dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
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static void *xtensa_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t flag,
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struct dma_attrs *attrs)
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{
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unsigned long ret;
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unsigned long uncached = 0;
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|
|
@ -52,20 +145,15 @@ dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
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BUG_ON(ret < XCHAL_KSEG_CACHED_VADDR ||
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ret > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
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uncached = ret + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR;
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*handle = virt_to_bus((void *)ret);
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__invalidate_dcache_range(ret, size);
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if (ret != 0) {
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memset((void*) ret, 0, size);
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uncached = ret+XCHAL_KSEG_BYPASS_VADDR-XCHAL_KSEG_CACHED_VADDR;
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*handle = virt_to_bus((void*)ret);
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__flush_invalidate_dcache_range(ret, size);
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}
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||||
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return (void*)uncached;
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return (void *)uncached;
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||||
}
|
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EXPORT_SYMBOL(dma_alloc_coherent);
|
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|
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void dma_free_coherent(struct device *hwdev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
|
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static void xtensa_dma_free(struct device *hwdev, size_t size, void *vaddr,
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dma_addr_t dma_handle, struct dma_attrs *attrs)
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{
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unsigned long addr = (unsigned long)vaddr +
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XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR;
|
||||
|
|
@ -75,24 +163,79 @@ void dma_free_coherent(struct device *hwdev, size_t size,
|
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|
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free_pages(addr, get_order(size));
|
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}
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EXPORT_SYMBOL(dma_free_coherent);
|
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|
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|
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void consistent_sync(void *vaddr, size_t size, int direction)
|
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static dma_addr_t xtensa_map_page(struct device *dev, struct page *page,
|
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unsigned long offset, size_t size,
|
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enum dma_data_direction dir,
|
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struct dma_attrs *attrs)
|
||||
{
|
||||
switch (direction) {
|
||||
case PCI_DMA_NONE:
|
||||
BUG();
|
||||
case PCI_DMA_FROMDEVICE: /* invalidate only */
|
||||
__invalidate_dcache_range((unsigned long)vaddr,
|
||||
(unsigned long)size);
|
||||
break;
|
||||
dma_addr_t dma_handle = page_to_phys(page) + offset;
|
||||
|
||||
case PCI_DMA_TODEVICE: /* writeback only */
|
||||
case PCI_DMA_BIDIRECTIONAL: /* writeback and invalidate */
|
||||
__flush_invalidate_dcache_range((unsigned long)vaddr,
|
||||
(unsigned long)size);
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||||
break;
|
||||
BUG_ON(PageHighMem(page));
|
||||
xtensa_sync_single_for_device(dev, dma_handle, size, dir);
|
||||
return dma_handle;
|
||||
}
|
||||
|
||||
static void xtensa_unmap_page(struct device *dev, dma_addr_t dma_handle,
|
||||
size_t size, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
xtensa_sync_single_for_cpu(dev, dma_handle, size, dir);
|
||||
}
|
||||
|
||||
static int xtensa_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct scatterlist *s;
|
||||
int i;
|
||||
|
||||
for_each_sg(sg, s, nents, i) {
|
||||
s->dma_address = xtensa_map_page(dev, sg_page(s), s->offset,
|
||||
s->length, dir, attrs);
|
||||
}
|
||||
return nents;
|
||||
}
|
||||
|
||||
static void xtensa_unmap_sg(struct device *dev,
|
||||
struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct scatterlist *s;
|
||||
int i;
|
||||
|
||||
for_each_sg(sg, s, nents, i) {
|
||||
xtensa_unmap_page(dev, sg_dma_address(s),
|
||||
sg_dma_len(s), dir, attrs);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(consistent_sync);
|
||||
|
||||
int xtensa_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct dma_map_ops xtensa_dma_map_ops = {
|
||||
.alloc = xtensa_dma_alloc,
|
||||
.free = xtensa_dma_free,
|
||||
.map_page = xtensa_map_page,
|
||||
.unmap_page = xtensa_unmap_page,
|
||||
.map_sg = xtensa_map_sg,
|
||||
.unmap_sg = xtensa_unmap_sg,
|
||||
.sync_single_for_cpu = xtensa_sync_single_for_cpu,
|
||||
.sync_single_for_device = xtensa_sync_single_for_device,
|
||||
.sync_sg_for_cpu = xtensa_sync_sg_for_cpu,
|
||||
.sync_sg_for_device = xtensa_sync_sg_for_device,
|
||||
.mapping_error = xtensa_dma_mapping_error,
|
||||
};
|
||||
EXPORT_SYMBOL(xtensa_dma_map_ops);
|
||||
|
||||
#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
|
||||
|
||||
static int __init xtensa_dma_init(void)
|
||||
{
|
||||
dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
|
||||
return 0;
|
||||
}
|
||||
fs_initcall(xtensa_dma_init);
|
||||
|
|
|
|||
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