dt-bindings: serial: lpuart: add ls1028a compatibility
Add the LS1028A SoC compatibility string to the lpuart devicetree bindings documentation. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200307091302.14881-1-michael@walle.cc Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -6,6 +6,8 @@ Required properties:
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on Vybrid vf610 SoC with 8-bit register organization
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- "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
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on LS1021A SoC with 32-bit big-endian register organization
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- "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
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on LS1028A SoC with 32-bit little-endian register organization
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- "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
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on i.MX7ULP SoC with 32-bit little-endian register organization
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- "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
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@ -15,10 +17,10 @@ Required properties:
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- reg : Address and length of the register set for the device
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- interrupts : Should contain uart interrupt
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- clocks : phandle + clock specifier pairs, one for each entry in clock-names
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- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud
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clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access
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lpuart controller registers, it also requires "baud" clock for module to
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receive/transmit data.
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- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart
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bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used
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to access lpuart controller registers, it also requires "baud" clock for
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module to receive/transmit data.
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Optional properties:
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- dmas: A list of two dma specifiers, one for each entry in dma-names.
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