ARC changes for 4.1-rc1:
- perf fixes/improvements - miscll cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVOHi0AAoJEGnX8d3iisJe/LEP/0CZi32TvcLZks0d/euGUjrQ izY3/acjuCiBXTIXpEgbe7qikUgNUTuJjyXN4BCrwsjQ1diFt2v9/iH3bh/iNFMm s0Ykq2SW5T/owKSOOqpf7lPdFkuitogITnjZIF85kMQczzGDVz6FGj16UQ9jDdsK rxb21QBkyywBwh3usWZtV2DM8UGjnjWWV7mO9rJR1bl7BVJ9vnUU4pD6TDUnC+mx np+tqJAQ0GpXrXeZRjLYY2VlrWmj29//yZcOrAwhQpz6cSMa4IaIaD516AOY1ybo UOiepa6B9+rpXdKhM6+CQ564ga5S/lsldnPK3IQyrV3fzBG65BBWHysowGiGXMeo kzkiBMMnnxh1Xg74yn4WTeSHMIdQ8ilXi6zrewvQC7jvsvHGLF+rJ+75GNOeYzaV eK9dKAzsxvPpE23OknK/oLO9nVu+nxvllCWXobkASTwdzjKLj8csmUvVJbuy/hH+ C6KSuVwuNXU7SBWvqJGdH6Iv0acZaueM32B8zkQ2d89ZDHRCLBLRq4vkhoKIJ8u4 rm3ZUwn+TyXlO/RY7pr2tDUb9dsVx/qxGiFvow+o73jA1XMgEp60RpmgesK32mis veTeuplmq+I7ZjPyuHCWvSTM9nRXNSdCm2WIxirGliFzKbUIqouhondA076J9eU2 AkCgh2TPG5h1SLTl/7Cs =No6A -----END PGP SIGNATURE----- Merge tag 'arc-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC updates from Vineet Gupta: - perf fixes/improvements - misc cleanups * tag 'arc-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: perf: don't add code for impossible case ARC: perf: Rename DT binding to not confuse with power mgmt ARC: perf: add user space attribution in callchains ARC: perf: Add kernel callchain support ARC: perf: support cache hit/miss ratio ARC: perf: Add some comments/debug stuff ARC: perf: make @arc_pmu static global ARC: mem init spring cleaning - No functional changes ARC: Fix RTT boot printing ARC: fold __builtin_constant_p() into test_bit() ARC: rename unhandled exception handler ARC: cosmetic: Remove unused ECR bitfield masks ARC: Fix WRITE_BCR ARC: [nsimosci] Update defconfig arc: copy_thread(): rename 'arg' argument to 'kthread_arg'
This commit is contained in:
Linus Torvalds
Коммит
c76397e930
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@ -0,0 +1,20 @@
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* ARC Performance Counters
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The ARC700 can be configured with a pipeline performance monitor for counting
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CPU and cache events like cache misses and hits. Like conventional PCT there
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are 100+ hardware conditions dynamically mapped to upto 32 counters
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Note that:
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* The ARC 700 PCT does not support interrupts; although HW events may be
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counted, the HW events themselves cannot serve as a trigger for a sample.
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Required properties:
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- compatible : should contain
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"snps,arc700-pct"
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Example:
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pmu {
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compatible = "snps,arc700-pct";
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};
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@ -1,24 +0,0 @@
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* ARC Performance Monitor Unit
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The ARC 700 can be configured with a pipeline performance monitor for counting
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CPU and cache events like cache misses and hits.
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Note that:
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* ARC 700 refers to a family of ARC processor cores;
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- There is only one type of PMU available for the whole family;
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- The PMU may support different sets of events; supported events are probed
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at boot time, as required by the reference manual.
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* The ARC 700 PMU does not support interrupts; although HW events may be
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counted, the HW events themselves cannot serve as a trigger for a sample.
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Required properties:
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- compatible : should contain
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"snps,arc700-pmu"
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Example:
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pmu {
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compatible = "snps,arc700-pmu";
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};
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@ -64,7 +64,7 @@
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};
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arcpmu0: pmu {
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compatible = "snps,arc700-pmu";
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compatible = "snps,arc700-pct";
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};
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};
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};
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@ -2,6 +2,9 @@ CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
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# CONFIG_LOCALVERSION_AUTO is not set
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CONFIG_DEFAULT_HOSTNAME="ARCLinux"
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# CONFIG_SWAP is not set
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CONFIG_SYSVIPC=y
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# CONFIG_CROSS_MEMORY_ATTACH is not set
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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@ -9,7 +12,7 @@ CONFIG_NAMESPACES=y
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# CONFIG_UTS_NS is not set
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# CONFIG_PID_NS is not set
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_INITRAMFS_SOURCE="../arc_initramfs"
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CONFIG_INITRAMFS_SOURCE="../arc_initramfs/"
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CONFIG_KALLSYMS_ALL=y
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CONFIG_EMBEDDED=y
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# CONFIG_SLUB_DEBUG is not set
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@ -21,12 +24,9 @@ CONFIG_MODULES=y
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARC_PLAT_FPGA_LEGACY=y
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# CONFIG_ARC_IDE is not set
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# CONFIG_ARCTANGENT_EMAC is not set
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# CONFIG_ARC_HAS_RTSC is not set
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CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci"
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# CONFIG_COMPACTION is not set
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# CONFIG_CROSS_MEMORY_ATTACH is not set
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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@ -39,23 +39,23 @@ CONFIG_INET=y
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# CONFIG_FIRMWARE_IN_KERNEL is not set
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# CONFIG_BLK_DEV is not set
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CONFIG_NETDEVICES=y
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# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
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# CONFIG_INPUT_MOUSEDEV is not set
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CONFIG_INPUT_EVDEV=y
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# CONFIG_MOUSE_PS2_ALPS is not set
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# CONFIG_MOUSE_PS2_LOGIPS2PP is not set
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# CONFIG_MOUSE_PS2_SYNAPTICS is not set
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# CONFIG_MOUSE_PS2_CYPRESS is not set
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# CONFIG_MOUSE_PS2_TRACKPOINT is not set
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CONFIG_MOUSE_PS2_TOUCHKIT=y
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# CONFIG_SERIO_I8042 is not set
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# CONFIG_SERIO_SERPORT is not set
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CONFIG_SERIO_ARC_PS2=y
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# CONFIG_LEGACY_PTYS is not set
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# CONFIG_DEVKMEM is not set
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_8250_DW=y
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CONFIG_SERIAL_8250_NR_UARTS=1
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CONFIG_SERIAL_8250_RUNTIME_UARTS=1
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SERIAL_ARC=y
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CONFIG_SERIAL_ARC_CONSOLE=y
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# CONFIG_HW_RANDOM is not set
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# CONFIG_HWMON is not set
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CONFIG_FB=y
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@ -72,4 +72,3 @@ CONFIG_TMPFS=y
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CONFIG_NFS_FS=y
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# CONFIG_ENABLE_WARN_DEPRECATED is not set
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# CONFIG_ENABLE_MUST_CHECK is not set
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CONFIG_XZ_DEC=y
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@ -30,6 +30,7 @@
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#define ARC_REG_D_UNCACH_BCR 0x6A
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#define ARC_REG_BPU_BCR 0xc0
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#define ARC_REG_ISA_CFG_BCR 0xc1
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#define ARC_REG_RTT_BCR 0xF2
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#define ARC_REG_SMART_BCR 0xFF
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/* status32 Bits Positions */
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@ -50,11 +51,7 @@
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* [15: 8] = Exception Cause Code
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* [ 7: 0] = Exception Parameters (for certain types only)
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*/
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#define ECR_VEC_MASK 0xff0000
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#define ECR_CODE_MASK 0x00ff00
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#define ECR_PARAM_MASK 0x0000ff
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/* Exception Cause Vector Values */
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#define ECR_V_MEM_ERR 0x01
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#define ECR_V_INSN_ERR 0x02
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#define ECR_V_MACH_CHK 0x20
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#define ECR_V_ITLB_MISS 0x21
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@ -62,7 +59,8 @@
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#define ECR_V_PROTV 0x23
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#define ECR_V_TRAP 0x25
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/* Protection Violation Exception Cause Code Values */
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/* DTLB Miss and Protection Violation Cause Codes */
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#define ECR_C_PROTV_INST_FETCH 0x00
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#define ECR_C_PROTV_LOAD 0x01
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#define ECR_C_PROTV_STORE 0x02
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@ -173,11 +171,11 @@
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} \
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}
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#define WRITE_BCR(reg, into) \
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#define WRITE_AUX(reg, into) \
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{ \
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unsigned int tmp; \
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if (sizeof(tmp) == sizeof(into)) { \
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tmp = (*(unsigned int *)(into)); \
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tmp = (*(unsigned int *)&(into)); \
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write_aux_reg(reg, tmp); \
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} else { \
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extern void bogus_undefined(void); \
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@ -32,6 +32,20 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *m)
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m += nr >> 5;
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/*
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* ARC ISA micro-optimization:
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*
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* Instructions dealing with bitpos only consider lower 5 bits (0-31)
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* e.g (x << 33) is handled like (x << 1) by ASL instruction
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* (mem pointer still needs adjustment to point to next word)
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*
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* Hence the masking to clamp @nr arg can be elided in general.
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*
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* However if @nr is a constant (above assumed it in a register),
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* and greater than 31, gcc can optimize away (x << 33) to 0,
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* as overflow, given the 32-bit ISA. Thus masking needs to be done
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* for constant @nr, but no code is generated due to const prop.
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*/
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if (__builtin_constant_p(nr))
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nr &= 0x1f;
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@ -374,29 +388,20 @@ __test_and_change_bit(unsigned long nr, volatile unsigned long *m)
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* This routine doesn't need to be atomic.
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*/
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static inline int
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__constant_test_bit(unsigned int nr, const volatile unsigned long *addr)
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{
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return ((1UL << (nr & 31)) &
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(((const volatile unsigned int *)addr)[nr >> 5])) != 0;
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}
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static inline int
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__test_bit(unsigned int nr, const volatile unsigned long *addr)
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test_bit(unsigned int nr, const volatile unsigned long *addr)
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{
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unsigned long mask;
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addr += nr >> 5;
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/* ARC700 only considers 5 bits in bit-fiddling insn */
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if (__builtin_constant_p(nr))
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nr &= 0x1f;
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mask = 1 << nr;
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return ((mask & *addr) != 0);
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}
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#define test_bit(nr, addr) (__builtin_constant_p(nr) ? \
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__constant_test_bit((nr), (addr)) : \
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__test_bit((nr), (addr)))
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/*
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* Count the number of zeros, starting from MSB
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* Helper for fls( ) friends
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@ -54,29 +54,13 @@ struct arc_reg_cc_build {
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#define PERF_COUNT_ARC_BPOK (PERF_COUNT_HW_MAX + 3)
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#define PERF_COUNT_ARC_EDTLB (PERF_COUNT_HW_MAX + 4)
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#define PERF_COUNT_ARC_EITLB (PERF_COUNT_HW_MAX + 5)
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#define PERF_COUNT_ARC_HW_MAX (PERF_COUNT_HW_MAX + 6)
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#define PERF_COUNT_ARC_LDC (PERF_COUNT_HW_MAX + 6)
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#define PERF_COUNT_ARC_STC (PERF_COUNT_HW_MAX + 7)
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#define PERF_COUNT_ARC_HW_MAX (PERF_COUNT_HW_MAX + 8)
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/*
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* The "generalized" performance events seem to really be a copy
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* of the available events on x86 processors; the mapping to ARC
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* events is not always possible 1-to-1. Fortunately, there doesn't
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* seem to be an exact definition for these events, so we can cheat
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* a bit where necessary.
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*
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* In particular, the following PERF events may behave a bit differently
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* compared to other architectures:
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*
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* PERF_COUNT_HW_CPU_CYCLES
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* Cycles not in halted state
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*
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* PERF_COUNT_HW_REF_CPU_CYCLES
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* Reference cycles not in halted state, same as PERF_COUNT_HW_CPU_CYCLES
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* for now as we don't do Dynamic Voltage/Frequency Scaling (yet)
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*
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* PERF_COUNT_HW_BUS_CYCLES
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* Unclear what this means, Intel uses 0x013c, which according to
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* their datasheet means "unhalted reference cycles". It sounds similar
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* to PERF_COUNT_HW_REF_CPU_CYCLES, and we use the same counter for it.
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* Some ARC pct quirks:
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*
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* PERF_COUNT_HW_STALLED_CYCLES_BACKEND
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* PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
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@ -91,21 +75,38 @@ struct arc_reg_cc_build {
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* Note that I$ cache misses aren't counted by either of the two!
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*/
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/*
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* ARC PCT has hardware conditions with fixed "names" but variable "indexes"
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* (based on a specific RTL build)
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* Below is the static map between perf generic/arc specific event_id and
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* h/w condition names.
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* At the time of probe, we loop thru each index and find it's name to
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* complete the mapping of perf event_id to h/w index as latter is needed
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* to program the counter really
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*/
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static const char * const arc_pmu_ev_hw_map[] = {
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/* count cycles */
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[PERF_COUNT_HW_CPU_CYCLES] = "crun",
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[PERF_COUNT_HW_REF_CPU_CYCLES] = "crun",
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[PERF_COUNT_HW_BUS_CYCLES] = "crun",
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[PERF_COUNT_HW_INSTRUCTIONS] = "iall",
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[PERF_COUNT_HW_BRANCH_MISSES] = "bpfail",
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[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmp",
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[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = "bflush",
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[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = "bstall",
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[PERF_COUNT_ARC_DCLM] = "dclm",
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[PERF_COUNT_ARC_DCSM] = "dcsm",
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[PERF_COUNT_ARC_ICM] = "icm",
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[PERF_COUNT_ARC_BPOK] = "bpok",
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[PERF_COUNT_ARC_EDTLB] = "edtlb",
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[PERF_COUNT_ARC_EITLB] = "eitlb",
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/* counts condition */
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[PERF_COUNT_HW_INSTRUCTIONS] = "iall",
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[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmp",
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[PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
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[PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", /* NP-T, PT-NT, PNT-T */
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[PERF_COUNT_ARC_LDC] = "imemrdc", /* Instr: mem read cached */
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[PERF_COUNT_ARC_STC] = "imemwrc", /* Instr: mem write cached */
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[PERF_COUNT_ARC_DCLM] = "dclm", /* D-cache Load Miss */
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[PERF_COUNT_ARC_DCSM] = "dcsm", /* D-cache Store Miss */
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[PERF_COUNT_ARC_ICM] = "icm", /* I-cache Miss */
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[PERF_COUNT_ARC_EDTLB] = "edtlb", /* D-TLB Miss */
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[PERF_COUNT_ARC_EITLB] = "eitlb", /* I-TLB Miss */
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};
|
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#define C(_x) PERF_COUNT_HW_CACHE_##_x
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@ -114,11 +115,11 @@ static const char * const arc_pmu_ev_hw_map[] = {
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static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
|
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[C(L1D)] = {
|
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[C(OP_READ)] = {
|
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[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
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[C(RESULT_ACCESS)] = PERF_COUNT_ARC_LDC,
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[C(RESULT_MISS)] = PERF_COUNT_ARC_DCLM,
|
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},
|
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[C(OP_WRITE)] = {
|
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[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
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[C(RESULT_ACCESS)] = PERF_COUNT_ARC_STC,
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[C(RESULT_MISS)] = PERF_COUNT_ARC_DCSM,
|
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},
|
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[C(OP_PREFETCH)] = {
|
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|
|
@ -128,7 +129,7 @@ static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
|
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},
|
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[C(L1I)] = {
|
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[C(OP_READ)] = {
|
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[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
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[C(RESULT_ACCESS)] = PERF_COUNT_HW_INSTRUCTIONS,
|
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[C(RESULT_MISS)] = PERF_COUNT_ARC_ICM,
|
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},
|
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[C(OP_WRITE)] = {
|
||||
|
|
@ -156,9 +157,10 @@ static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
|
|||
},
|
||||
[C(DTLB)] = {
|
||||
[C(OP_READ)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_ACCESS)] = PERF_COUNT_ARC_LDC,
|
||||
[C(RESULT_MISS)] = PERF_COUNT_ARC_EDTLB,
|
||||
},
|
||||
/* DTLB LD/ST Miss not segregated by h/w*/
|
||||
[C(OP_WRITE)] = {
|
||||
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
|
||||
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/perf_event.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/arcregs.h>
|
||||
#include <asm/stacktrace.h>
|
||||
|
||||
struct arc_pmu {
|
||||
struct pmu pmu;
|
||||
|
|
@ -25,6 +26,46 @@ struct arc_pmu {
|
|||
int ev_hw_idx[PERF_COUNT_ARC_HW_MAX];
|
||||
};
|
||||
|
||||
struct arc_callchain_trace {
|
||||
int depth;
|
||||
void *perf_stuff;
|
||||
};
|
||||
|
||||
static int callchain_trace(unsigned int addr, void *data)
|
||||
{
|
||||
struct arc_callchain_trace *ctrl = data;
|
||||
struct perf_callchain_entry *entry = ctrl->perf_stuff;
|
||||
perf_callchain_store(entry, addr);
|
||||
|
||||
if (ctrl->depth++ < 3)
|
||||
return 0;
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
void
|
||||
perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
||||
{
|
||||
struct arc_callchain_trace ctrl = {
|
||||
.depth = 0,
|
||||
.perf_stuff = entry,
|
||||
};
|
||||
|
||||
arc_unwind_core(NULL, regs, callchain_trace, &ctrl);
|
||||
}
|
||||
|
||||
void
|
||||
perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
||||
{
|
||||
/*
|
||||
* User stack can't be unwound trivially with kernel dwarf unwinder
|
||||
* So for now just record the user PC
|
||||
*/
|
||||
perf_callchain_store(entry, instruction_pointer(regs));
|
||||
}
|
||||
|
||||
static struct arc_pmu *arc_pmu;
|
||||
|
||||
/* read counter #idx; note that counter# != event# on ARC! */
|
||||
static uint64_t arc_pmu_read_counter(int idx)
|
||||
{
|
||||
|
|
@ -47,7 +88,6 @@ static uint64_t arc_pmu_read_counter(int idx)
|
|||
static void arc_perf_event_update(struct perf_event *event,
|
||||
struct hw_perf_event *hwc, int idx)
|
||||
{
|
||||
struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu);
|
||||
uint64_t prev_raw_count, new_raw_count;
|
||||
int64_t delta;
|
||||
|
||||
|
|
@ -89,13 +129,16 @@ static int arc_pmu_cache_event(u64 config)
|
|||
if (ret == CACHE_OP_UNSUPPORTED)
|
||||
return -ENOENT;
|
||||
|
||||
pr_debug("init cache event: type/op/result %d/%d/%d with h/w %d \'%s\'\n",
|
||||
cache_type, cache_op, cache_result, ret,
|
||||
arc_pmu_ev_hw_map[ret]);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* initializes hw_perf_event structure if event is supported */
|
||||
static int arc_pmu_event_init(struct perf_event *event)
|
||||
{
|
||||
struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu);
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
int ret;
|
||||
|
||||
|
|
@ -106,8 +149,9 @@ static int arc_pmu_event_init(struct perf_event *event)
|
|||
if (arc_pmu->ev_hw_idx[event->attr.config] < 0)
|
||||
return -ENOENT;
|
||||
hwc->config = arc_pmu->ev_hw_idx[event->attr.config];
|
||||
pr_debug("initializing event %d with cfg %d\n",
|
||||
(int) event->attr.config, (int) hwc->config);
|
||||
pr_debug("init event %d with h/w %d \'%s\'\n",
|
||||
(int) event->attr.config, (int) hwc->config,
|
||||
arc_pmu_ev_hw_map[event->attr.config]);
|
||||
return 0;
|
||||
case PERF_TYPE_HW_CACHE:
|
||||
ret = arc_pmu_cache_event(event->attr.config);
|
||||
|
|
@ -183,8 +227,6 @@ static void arc_pmu_stop(struct perf_event *event, int flags)
|
|||
|
||||
static void arc_pmu_del(struct perf_event *event, int flags)
|
||||
{
|
||||
struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu);
|
||||
|
||||
arc_pmu_stop(event, PERF_EF_UPDATE);
|
||||
__clear_bit(event->hw.idx, arc_pmu->used_mask);
|
||||
|
||||
|
|
@ -194,7 +236,6 @@ static void arc_pmu_del(struct perf_event *event, int flags)
|
|||
/* allocate hardware counter and optionally start counting */
|
||||
static int arc_pmu_add(struct perf_event *event, int flags)
|
||||
{
|
||||
struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu);
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
int idx = hwc->idx;
|
||||
|
||||
|
|
@ -247,10 +288,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
BUG_ON(pct_bcr.c > ARC_PMU_MAX_HWEVENTS);
|
||||
|
||||
READ_BCR(ARC_REG_CC_BUILD, cc_bcr);
|
||||
if (!cc_bcr.v) {
|
||||
pr_err("Performance counters exist, but no countable conditions?\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
BUG_ON(!cc_bcr.v); /* Counters exist but No countable conditions ? */
|
||||
|
||||
arc_pmu = devm_kzalloc(&pdev->dev, sizeof(struct arc_pmu), GFP_KERNEL);
|
||||
if (!arc_pmu)
|
||||
|
|
@ -263,19 +301,22 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
arc_pmu->n_counters, arc_pmu->counter_size, cc_bcr.c);
|
||||
|
||||
cc_name.str[8] = 0;
|
||||
for (i = 0; i < PERF_COUNT_HW_MAX; i++)
|
||||
for (i = 0; i < PERF_COUNT_ARC_HW_MAX; i++)
|
||||
arc_pmu->ev_hw_idx[i] = -1;
|
||||
|
||||
/* loop thru all available h/w condition indexes */
|
||||
for (j = 0; j < cc_bcr.c; j++) {
|
||||
write_aux_reg(ARC_REG_CC_INDEX, j);
|
||||
cc_name.indiv.word0 = read_aux_reg(ARC_REG_CC_NAME0);
|
||||
cc_name.indiv.word1 = read_aux_reg(ARC_REG_CC_NAME1);
|
||||
|
||||
/* See if it has been mapped to a perf event_id */
|
||||
for (i = 0; i < ARRAY_SIZE(arc_pmu_ev_hw_map); i++) {
|
||||
if (arc_pmu_ev_hw_map[i] &&
|
||||
!strcmp(arc_pmu_ev_hw_map[i], cc_name.str) &&
|
||||
strlen(arc_pmu_ev_hw_map[i])) {
|
||||
pr_debug("mapping %d to idx %d with name %s\n",
|
||||
i, j, cc_name.str);
|
||||
pr_debug("mapping perf event %2d to h/w event \'%8s\' (idx %d)\n",
|
||||
i, cc_name.str, j);
|
||||
arc_pmu->ev_hw_idx[i] = j;
|
||||
}
|
||||
}
|
||||
|
|
@ -302,7 +343,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
|
||||
#ifdef CONFIG_OF
|
||||
static const struct of_device_id arc_pmu_match[] = {
|
||||
{ .compatible = "snps,arc700-pmu" },
|
||||
{ .compatible = "snps,arc700-pct" },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, arc_pmu_match);
|
||||
|
|
@ -310,7 +351,7 @@ MODULE_DEVICE_TABLE(of, arc_pmu_match);
|
|||
|
||||
static struct platform_driver arc_pmu_driver = {
|
||||
.driver = {
|
||||
.name = "arc700-pmu",
|
||||
.name = "arc700-pct",
|
||||
.of_match_table = of_match_ptr(arc_pmu_match),
|
||||
},
|
||||
.probe = arc_pmu_device_probe,
|
||||
|
|
|
|||
|
|
@ -49,7 +49,10 @@ void arch_cpu_idle(void)
|
|||
|
||||
asmlinkage void ret_from_fork(void);
|
||||
|
||||
/* Layout of Child kernel mode stack as setup at the end of this function is
|
||||
/*
|
||||
* Copy architecture-specific thread state
|
||||
*
|
||||
* Layout of Child kernel mode stack as setup at the end of this function is
|
||||
*
|
||||
* | ... |
|
||||
* | ... |
|
||||
|
|
@ -81,7 +84,7 @@ asmlinkage void ret_from_fork(void);
|
|||
* ------------------ <===== END of PAGE
|
||||
*/
|
||||
int copy_thread(unsigned long clone_flags,
|
||||
unsigned long usp, unsigned long arg,
|
||||
unsigned long usp, unsigned long kthread_arg,
|
||||
struct task_struct *p)
|
||||
{
|
||||
struct pt_regs *c_regs; /* child's pt_regs */
|
||||
|
|
@ -112,7 +115,7 @@ int copy_thread(unsigned long clone_flags,
|
|||
if (unlikely(p->flags & PF_KTHREAD)) {
|
||||
memset(c_regs, 0, sizeof(struct pt_regs));
|
||||
|
||||
c_callee->r13 = arg; /* argument to kernel thread */
|
||||
c_callee->r13 = kthread_arg;
|
||||
c_callee->r14 = usp; /* function */
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -120,7 +120,10 @@ static void read_arc_build_cfg_regs(void)
|
|||
READ_BCR(ARC_REG_SMART_BCR, bcr);
|
||||
cpu->extn.smart = bcr.ver ? 1 : 0;
|
||||
|
||||
cpu->extn.debug = cpu->extn.ap | cpu->extn.smart;
|
||||
READ_BCR(ARC_REG_RTT_BCR, bcr);
|
||||
cpu->extn.rtt = bcr.ver ? 1 : 0;
|
||||
|
||||
cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
|
||||
}
|
||||
|
||||
static const struct cpuinfo_data arc_cpu_tbl[] = {
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ void die(const char *str, struct pt_regs *regs, unsigned long address)
|
|||
* -for kernel, chk if due to copy_(to|from)_user, otherwise die()
|
||||
*/
|
||||
static noinline int
|
||||
handle_exception(const char *str, struct pt_regs *regs, siginfo_t *info)
|
||||
unhandled_exception(const char *str, struct pt_regs *regs, siginfo_t *info)
|
||||
{
|
||||
if (user_mode(regs)) {
|
||||
struct task_struct *tsk = current;
|
||||
|
|
@ -71,7 +71,7 @@ int name(unsigned long address, struct pt_regs *regs) \
|
|||
.si_code = sicode, \
|
||||
.si_addr = (void __user *)address, \
|
||||
}; \
|
||||
return handle_exception(str, regs, &info);\
|
||||
return unhandled_exception(str, regs, &info);\
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -71,7 +71,7 @@ early_param("initrd", early_initrd);
|
|||
*/
|
||||
void __init setup_arch_memory(void)
|
||||
{
|
||||
unsigned long zones_size[MAX_NR_ZONES] = { 0, 0 };
|
||||
unsigned long zones_size[MAX_NR_ZONES];
|
||||
unsigned long end_mem = CONFIG_LINUX_LINK_BASE + arc_mem_sz;
|
||||
|
||||
init_mm.start_code = (unsigned long)_text;
|
||||
|
|
@ -90,7 +90,7 @@ void __init setup_arch_memory(void)
|
|||
/*------------- externs in mm need setting up ---------------*/
|
||||
|
||||
/* first page of system - kernel .vector starts here */
|
||||
min_low_pfn = PFN_DOWN(CONFIG_LINUX_LINK_BASE);
|
||||
min_low_pfn = ARCH_PFN_OFFSET;
|
||||
|
||||
/* Last usable page of low mem (no HIGHMEM yet for ARC port) */
|
||||
max_low_pfn = max_pfn = PFN_DOWN(end_mem);
|
||||
|
|
@ -111,7 +111,7 @@ void __init setup_arch_memory(void)
|
|||
|
||||
/*-------------- node setup --------------------------------*/
|
||||
memset(zones_size, 0, sizeof(zones_size));
|
||||
zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn;
|
||||
zones_size[ZONE_NORMAL] = max_mapnr;
|
||||
|
||||
/*
|
||||
* We can't use the helper free_area_init(zones[]) because it uses
|
||||
|
|
@ -123,6 +123,8 @@ void __init setup_arch_memory(void)
|
|||
zones_size, /* num pages per zone */
|
||||
min_low_pfn, /* first pfn of node */
|
||||
NULL); /* NO holes */
|
||||
|
||||
high_memory = (void *)end_mem;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -133,7 +135,6 @@ void __init setup_arch_memory(void)
|
|||
*/
|
||||
void __init mem_init(void)
|
||||
{
|
||||
high_memory = (void *)(CONFIG_LINUX_LINK_BASE + arc_mem_sz);
|
||||
free_all_bootmem();
|
||||
mem_init_print_info(NULL);
|
||||
}
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче