KVM: x86 emulator: don't depend on cr2 for mov abs emulation
The 'mov abs' instruction family (opcodes 0xa0 - 0xa3) still depends on cr2 provided by the page fault handler. This is wrong for several reasons: - if an instruction accessed misaligned data that crosses a page boundary, and if the fault happened on the second page, cr2 will point at the second page, not the data itself. - if we're emulating in real mode, or due to a FlexPriority exit, there is no cr2 generated. So, this change adds decoding for this instruction form and drops reliance on cr2. Signed-off-by: Avi Kivity <avi@qumranet.com>
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@ -63,8 +63,9 @@
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/* Destination is only written; never read. */
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#define Mov (1<<7)
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#define BitOp (1<<8)
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#define MemAbs (1<<9) /* Memory operand is absolute displacement */
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static u8 opcode_table[256] = {
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static u16 opcode_table[256] = {
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/* 0x00 - 0x07 */
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ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
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ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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@ -134,8 +135,8 @@ static u8 opcode_table[256] = {
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/* 0x90 - 0x9F */
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps, ImplicitOps, 0, 0,
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/* 0xA0 - 0xA7 */
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ByteOp | DstReg | SrcMem | Mov, DstReg | SrcMem | Mov,
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ByteOp | DstMem | SrcReg | Mov, DstMem | SrcReg | Mov,
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ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs,
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ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs,
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ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
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ByteOp | ImplicitOps, ImplicitOps,
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/* 0xA8 - 0xAF */
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@ -755,16 +756,6 @@ done_prefixes:
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break;
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}
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}
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if (!c->override_base)
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c->override_base = &ctxt->ds_base;
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if (mode == X86EMUL_MODE_PROT64 &&
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c->override_base != &ctxt->fs_base &&
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c->override_base != &ctxt->gs_base)
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c->override_base = NULL;
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if (c->override_base)
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c->modrm_ea += *c->override_base;
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if (rip_relative) {
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c->modrm_ea += c->eip;
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switch (c->d & SrcMask) {
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@ -781,12 +772,35 @@ done_prefixes:
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c->modrm_ea += c->op_bytes;
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}
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}
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if (c->ad_bytes != 8)
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c->modrm_ea = (u32)c->modrm_ea;
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modrm_done:
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;
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} else if (c->d & MemAbs) {
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switch (c->ad_bytes) {
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case 2:
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c->modrm_ea = insn_fetch(u16, 2, c->eip);
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break;
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case 4:
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c->modrm_ea = insn_fetch(u32, 4, c->eip);
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break;
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case 8:
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c->modrm_ea = insn_fetch(u64, 8, c->eip);
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break;
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}
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}
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if (!c->override_base)
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c->override_base = &ctxt->ds_base;
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if (mode == X86EMUL_MODE_PROT64 &&
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c->override_base != &ctxt->fs_base &&
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c->override_base != &ctxt->gs_base)
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c->override_base = NULL;
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if (c->override_base)
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c->modrm_ea += *c->override_base;
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if (c->ad_bytes != 8)
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c->modrm_ea = (u32)c->modrm_ea;
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/*
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* Decode and fetch the source operand: register, memory
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* or immediate.
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@ -1171,7 +1185,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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memcpy(c->regs, ctxt->vcpu->regs, sizeof c->regs);
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saved_eip = c->eip;
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if ((c->d & ModRM) && (c->modrm_mod != 3))
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if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs))
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cr2 = c->modrm_ea;
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if (c->src.type == OP_MEM) {
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@ -1326,13 +1340,9 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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case 0xa0 ... 0xa1: /* mov */
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c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
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c->dst.val = c->src.val;
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/* skip src displacement */
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c->eip += c->ad_bytes;
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break;
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case 0xa2 ... 0xa3: /* mov */
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c->dst.val = (unsigned long)c->regs[VCPU_REGS_RAX];
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/* skip c->dst displacement */
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c->eip += c->ad_bytes;
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break;
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case 0xc0 ... 0xc1:
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emulate_grp2(ctxt);
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