Allwinner fixes for 5.1
- Pinctrl related fixes for the A33 NAND controller - Fix the refcounting of DT nodes in our core code - Fix for a typo'd DT property -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXLmrygAKCRDj7w1vZxhR xWPzAPsG8IOfePeDDq5QtpXuO/ksMCb1H/+1dsHwe6yW2CFrQwD/W3p/n5i/ervO tUtfb4a4uz0WthUrApkWlCUS30IGdwU= =/Hf9 -----END PGP SIGNATURE----- Merge tag 'sunxi-fixes-for-5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes Allwinner fixes for 5.1 - Pinctrl related fixes for the A33 NAND controller - Fix the refcounting of DT nodes in our core code - Fix for a typo'd DT property * tag 'sunxi-fixes-for-5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun8i: a33: Reintroduce default pinctrl muxing arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supply ARM: sunxi: fix a leaked reference by adding missing of_node_put ARM: sunxi: fix a leaked reference by adding missing of_node_put Signed-off-by: Olof Johansson <olof@lixom.net>
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Коммит
c7edf19716
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@ -169,6 +169,8 @@
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_NAND>;
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reset-names = "ahb";
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pinctrl-names = "default";
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pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -89,6 +89,7 @@ static bool sunxi_core_is_cortex_a15(unsigned int core, unsigned int cluster)
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{
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struct device_node *node;
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int cpu = cluster * SUNXI_CPUS_PER_CLUSTER + core;
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bool is_compatible;
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node = of_cpu_device_node_get(cpu);
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@ -107,7 +108,9 @@ static bool sunxi_core_is_cortex_a15(unsigned int core, unsigned int cluster)
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return false;
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}
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return of_device_is_compatible(node, "arm,cortex-a15");
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is_compatible = of_device_is_compatible(node, "arm,cortex-a15");
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of_node_put(node);
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return is_compatible;
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}
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static int sunxi_cpu_power_switch_set(unsigned int cpu, unsigned int cluster,
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@ -50,6 +50,7 @@ static void __init sun6i_smp_prepare_cpus(unsigned int max_cpus)
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}
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prcm_membase = of_iomap(node, 0);
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of_node_put(node);
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if (!prcm_membase) {
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pr_err("Couldn't map A31 PRCM registers\n");
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return;
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@ -63,6 +64,7 @@ static void __init sun6i_smp_prepare_cpus(unsigned int max_cpus)
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}
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cpucfg_membase = of_iomap(node, 0);
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of_node_put(node);
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if (!cpucfg_membase)
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pr_err("Couldn't map A31 CPU config registers\n");
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@ -133,6 +135,7 @@ static void __init sun8i_smp_prepare_cpus(unsigned int max_cpus)
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}
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prcm_membase = of_iomap(node, 0);
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of_node_put(node);
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if (!prcm_membase) {
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pr_err("Couldn't map A23 PRCM registers\n");
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return;
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@ -146,6 +149,7 @@ static void __init sun8i_smp_prepare_cpus(unsigned int max_cpus)
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}
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cpucfg_membase = of_iomap(node, 0);
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of_node_put(node);
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if (!cpucfg_membase)
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pr_err("Couldn't map A23 CPU config registers\n");
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@ -104,7 +104,7 @@
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};
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&codec_analog {
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hpvcc-supply = <®_eldo1>;
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cpvdd-supply = <®_eldo1>;
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status = "okay";
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};
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@ -80,7 +80,7 @@
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};
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&codec_analog {
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hpvcc-supply = <®_eldo1>;
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cpvdd-supply = <®_eldo1>;
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status = "okay";
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};
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@ -94,7 +94,7 @@
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};
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&codec_analog {
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hpvcc-supply = <®_eldo1>;
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cpvdd-supply = <®_eldo1>;
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status = "okay";
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};
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@ -48,7 +48,7 @@
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#include <dt-bindings/gpio/gpio.h>
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&codec_analog {
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hpvcc-supply = <®_eldo1>;
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cpvdd-supply = <®_eldo1>;
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};
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&mmc0 {
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