From c831fa29999616c500490fd7b4acab2be7fde573 Mon Sep 17 00:00:00 2001 From: Sai Prakash Ranjan Date: Wed, 11 Dec 2019 04:30:46 +0000 Subject: [PATCH] arm64: dts: qcom: sc7180: Add Last level cache controller node Add device tree node for LLCC aka system cache controller for SC7180 SoC. Signed-off-by: Sai Prakash Ranjan Link: https://lore.kernel.org/r/0101016ef3394291-2290a8be-91c9-4d46-b5ca-acd5277eb6e2-000000@us-west-2.amazonses.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index a6773ad3738b..e1567109adc4 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -911,6 +911,13 @@ status = "disabled"; }; + system-cache-controller@9200000 { + compatible = "qcom,sc7180-llcc"; + reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; + reg-names = "llcc_base", "llcc_broadcast_base"; + interrupts = ; + }; + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0 0x0c440000 0 0x1100>,