[BNX2]: Use CPU native page size
Use CPU native page size to determine various ring sizes. This allows order-0 memory allocations on all systems. Added check to limit the page size to 16K since that's the maximum rx ring size that will be used. This will prevent using unnecessarily large page sizes on some architectures with large page sizes. [Suggested by David Miller] Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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c86a31f452
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@ -32,6 +32,7 @@
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#include <asm/irq.h>
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#include <linux/delay.h>
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#include <asm/byteorder.h>
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#include <asm/page.h>
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#include <linux/time.h>
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#include <linux/ethtool.h>
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#include <linux/mii.h>
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@ -3750,7 +3750,12 @@ struct l2_fhdr {
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#define DMA_READ_CHANS 5
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#define DMA_WRITE_CHANS 3
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#define BCM_PAGE_BITS 12
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/* Use CPU native page size up to 16K for the ring sizes. */
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#if (PAGE_SHIFT > 14)
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#define BCM_PAGE_BITS 14
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#else
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#define BCM_PAGE_BITS PAGE_SHIFT
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#endif
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#define BCM_PAGE_SIZE (1 << BCM_PAGE_BITS)
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#define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd))
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@ -3773,7 +3778,7 @@ struct l2_fhdr {
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#define RX_RING_IDX(x) ((x) & bp->rx_max_ring_idx)
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#define RX_RING(x) (((x) & ~MAX_RX_DESC_CNT) >> 8)
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#define RX_RING(x) (((x) & ~MAX_RX_DESC_CNT) >> (BCM_PAGE_BITS - 4))
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#define RX_IDX(x) ((x) & MAX_RX_DESC_CNT)
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/* Context size. */
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