fpga: region: separate out code that parses the overlay
New function of_fpga_region_parse_ov added, moving code from fpga_region_notify_pre_apply. This function gets the FPGA image info from the overlay and is able to simplify some of the logic involved. This is a baby step in refactoring the FPGA region code to separate out common code from Device Tree overlay support. Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Alan Tull
Greg Kroah-Hartman
Родитель
61c3210239
Коммит
c8898eda81
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@ -321,33 +321,22 @@ static int child_regions_with_firmware(struct device_node *overlay)
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}
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/**
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* fpga_region_notify_pre_apply - pre-apply overlay notification
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* of_fpga_region_parse_ov - parse and check overlay applied to region
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*
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* @region: FPGA region that the overlay was applied to
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* @nd: overlay notification data
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* @region: FPGA region
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* @overlay: overlay applied to the FPGA region
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*
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* Called after when an overlay targeted to a FPGA Region is about to be
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* applied. Function will check the properties that will be added to the FPGA
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* region. If the checks pass, it will program the FPGA.
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* Given an overlay applied to a FPGA region, parse the FPGA image specific
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* info in the overlay and do some checking.
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*
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* The checks are:
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* The overlay must add either firmware-name or external-fpga-config property
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* to the FPGA Region.
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*
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* firmware-name : program the FPGA
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* external-fpga-config : FPGA is already programmed
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* encrypted-fpga-config : FPGA bitstream is encrypted
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*
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* The overlay can add other FPGA regions, but child FPGA regions cannot have a
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* firmware-name property since those regions don't exist yet.
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*
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* If the overlay that breaks the rules, notifier returns an error and the
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* overlay is rejected before it goes into the main tree.
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*
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* Returns 0 for success or negative error code for failure.
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* Returns:
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* NULL if overlay doesn't direct us to program the FPGA.
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* fpga_image_info struct if there is an image to program.
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* error code for invalid overlay.
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*/
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static int fpga_region_notify_pre_apply(struct fpga_region *region,
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struct of_overlay_notify_data *nd)
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static struct fpga_image_info *of_fpga_region_parse_ov(
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struct fpga_region *region,
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struct device_node *overlay)
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{
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struct device *dev = ®ion->dev;
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struct fpga_image_info *info;
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@ -356,7 +345,7 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
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if (region->info) {
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dev_err(dev, "Region already has overlay applied.\n");
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return -EINVAL;
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return ERR_PTR(-EINVAL);
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}
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/*
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@ -364,67 +353,102 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
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* firmware-name property (would mean that an FPGA region that has
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* not been added to the live tree yet is doing FPGA programming).
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*/
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ret = child_regions_with_firmware(nd->overlay);
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ret = child_regions_with_firmware(overlay);
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if (ret)
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return ret;
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return ERR_PTR(ret);
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info = fpga_image_info_alloc(dev);
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if (!info)
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return -ENOMEM;
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return ERR_PTR(-ENOMEM);
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info->overlay = nd->overlay;
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info->overlay = overlay;
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/* Read FPGA region properties from the overlay */
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if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
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if (of_property_read_bool(overlay, "partial-fpga-config"))
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info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
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if (of_property_read_bool(nd->overlay, "external-fpga-config"))
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if (of_property_read_bool(overlay, "external-fpga-config"))
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info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
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if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
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if (of_property_read_bool(overlay, "encrypted-fpga-config"))
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info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
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if (!of_property_read_string(nd->overlay, "firmware-name",
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if (!of_property_read_string(overlay, "firmware-name",
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&firmware_name)) {
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info->firmware_name = devm_kstrdup(dev, firmware_name,
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GFP_KERNEL);
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if (!info->firmware_name)
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return -ENOMEM;
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return ERR_PTR(-ENOMEM);
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}
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of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
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of_property_read_u32(overlay, "region-unfreeze-timeout-us",
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&info->enable_timeout_us);
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of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
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of_property_read_u32(overlay, "region-freeze-timeout-us",
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&info->disable_timeout_us);
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of_property_read_u32(nd->overlay, "config-complete-timeout-us",
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of_property_read_u32(overlay, "config-complete-timeout-us",
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&info->config_complete_timeout_us);
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/* If FPGA was externally programmed, don't specify firmware */
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if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && info->firmware_name) {
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dev_err(dev, "error: specified firmware and external-fpga-config");
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fpga_image_info_free(info);
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return -EINVAL;
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}
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/* FPGA is already configured externally. We're done. */
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if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
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fpga_image_info_free(info);
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return 0;
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}
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/* If we got this far, we should be programming the FPGA */
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/* If overlay is not programming the FPGA, don't need FPGA image info */
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if (!info->firmware_name) {
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dev_err(dev, "should specify firmware-name or external-fpga-config\n");
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fpga_image_info_free(info);
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ret = 0;
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goto ret_no_info;
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}
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/*
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* If overlay informs us FPGA was externally programmed, specifying
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* firmware here would be ambiguous.
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*/
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if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
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dev_err(dev, "error: specified firmware and external-fpga-config");
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ret = -EINVAL;
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goto ret_no_info;
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}
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return info;
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ret_no_info:
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fpga_image_info_free(info);
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return ERR_PTR(ret);
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}
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/**
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* fpga_region_notify_pre_apply - pre-apply overlay notification
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*
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* @region: FPGA region that the overlay was applied to
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* @nd: overlay notification data
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*
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* Called when an overlay targeted to a FPGA Region is about to be applied.
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* Parses the overlay for properties that influence how the FPGA will be
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* programmed and does some checking. If the checks pass, programs the FPGA.
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* If the checks fail, overlay is rejected and does not get added to the
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* live tree.
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*
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* Returns 0 for success or negative error code for failure.
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*/
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static int fpga_region_notify_pre_apply(struct fpga_region *region,
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struct of_overlay_notify_data *nd)
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{
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struct device *dev = ®ion->dev;
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struct fpga_image_info *info;
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int ret;
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if (region->info) {
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dev_err(dev, "Region already has overlay applied.\n");
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return -EINVAL;
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}
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info = of_fpga_region_parse_ov(region, nd->overlay);
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if (IS_ERR(info))
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return PTR_ERR(info);
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if (!info)
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return 0;
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region->info = info;
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ret = fpga_region_program_fpga(region);
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if (ret) {
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/* error; reject overlay */
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fpga_image_info_free(info);
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region->info = NULL;
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}
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