This pull request contains Broadcom ARM-based SoCs changes for 5.11,

please pull the following:
 
 - Vivek updates the Linksys EA9500 DTS by adding the two additional
   switch port nodes (5 & 7), providing a flash partition layout to
   make the device usable with OpenWrt, and finally switches to using
   the pin controller rather than using mdio-mux to get the same outcome.
 
 - Serge fixes the USB Device Tree nodes unit name to be conformant to
   the recommended name patterns.
 
 - Rafal re-arranges all the nodes that belonged to the CRU block to be
   under the CRU node (such as PLLs). He also disables the USB3 PHY node
   for devices that lack USB3 and adds USB3 support to the Luxul XWR-3150
   DTS.
 
 - Jonathan drops the incorrect 'io-channel-ranges' from the Cygnus SoC
   DTSI.
 
 - Maxime disables the Wi-Fi frequencies (around 2.4GHz) for HDMI on the
   Raspberry Pi 4 due to some cross-talk between the two blocks.
 
 - Pavel updates the DWC2 USB controller RX FIFO sizes to be more
   accurate for all BCM283x (Raspberr Pi) SoCs.
 
 - Florian updates all BCM5301x and NSP Device Tree files to allow
   switching the Broadcom B53 Ethernet switch device tree binding to YAML.
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Merge tag 'arm-soc/for-5.11/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs changes for 5.11,
please pull the following:

- Vivek updates the Linksys EA9500 DTS by adding the two additional
  switch port nodes (5 & 7), providing a flash partition layout to
  make the device usable with OpenWrt, and finally switches to using
  the pin controller rather than using mdio-mux to get the same outcome.

- Serge fixes the USB Device Tree nodes unit name to be conformant to
  the recommended name patterns.

- Rafal re-arranges all the nodes that belonged to the CRU block to be
  under the CRU node (such as PLLs). He also disables the USB3 PHY node
  for devices that lack USB3 and adds USB3 support to the Luxul XWR-3150
  DTS.

- Jonathan drops the incorrect 'io-channel-ranges' from the Cygnus SoC
  DTSI.

- Maxime disables the Wi-Fi frequencies (around 2.4GHz) for HDMI on the
  Raspberry Pi 4 due to some cross-talk between the two blocks.

- Pavel updates the DWC2 USB controller RX FIFO sizes to be more
  accurate for all BCM283x (Raspberr Pi) SoCs.

- Florian updates all BCM5301x and NSP Device Tree files to allow
  switching the Broadcom B53 Ethernet switch device tree binding to YAML.

* tag 'arm-soc/for-5.11/devicetree' of https://github.com/Broadcom/stblinux: (22 commits)
  dt-bindings: net: dsa: b53: Add YAML bindings
  ARM: dts: NSP: Provide defaults ports container node
  ARM: dts: NSP: Add a SRAB compatible string for each board
  ARM: dts: NSP: Fix Ethernet switch SGMII register name
  ARM: dts: NSP: Update ethernet switch node name
  ARM: dts: BCM5301X: Provide defaults ports container node
  ARM: dts: BCM5301X: Add a default compatible for switch node
  ARM: dts: BCM5301X: Update Ethernet switch node name
  dt-bindings: net: dsa: Document sfp and managed properties
  dt-bindings: net: dsa: Extend switch nodes pattern
  ARM: dts: bcm283x: increase dwc2's RX FIFO size
  ARM: dts: rpi-4: disable wifi frequencies
  ARM: dts: Cygnus: Drop incorrect io-channel-ranges property.
  ARM: dts: BCM5301X: Enable USB 3 PHY on Luxul XWR-3150
  ARM: dts: BCM5301X: Disable USB 3 PHY on devices without USB 3
  ARM: dts: BCM5301X: Move CRU devices to the CRU node
  ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl
  ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709x
  ARM: dts: BCM5301X: Linksys EA9500 add fixed partitions
  ARM: dts: BCM5310X: Harmonize xHCI DT nodes name
  ...

Link: https://lore.kernel.org/r/20201128163410.1691529-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-12-08 23:36:21 +01:00
Родитель 915a391915 f722fbac1e
Коммит c8b53b1c6b
34 изменённых файлов: 405 добавлений и 283 удалений

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@ -1,149 +0,0 @@
Broadcom BCM53xx Ethernet switches
==================================
Required properties:
- compatible: For external switch chips, compatible string must be exactly one
of: "brcm,bcm5325"
"brcm,bcm53115"
"brcm,bcm53125"
"brcm,bcm53128"
"brcm,bcm5365"
"brcm,bcm5395"
"brcm,bcm5389"
"brcm,bcm5397"
"brcm,bcm5398"
For the BCM11360 SoC, must be:
"brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab" string
For the BCM5310x SoCs with an integrated switch, must be one of:
"brcm,bcm53010-srab"
"brcm,bcm53011-srab"
"brcm,bcm53012-srab"
"brcm,bcm53018-srab"
"brcm,bcm53019-srab" and the mandatory "brcm,bcm5301x-srab" string
For the BCM5831X/BCM1140x SoCs with an integrated switch, must be one of:
"brcm,bcm11404-srab"
"brcm,bcm11407-srab"
"brcm,bcm11409-srab"
"brcm,bcm58310-srab"
"brcm,bcm58311-srab"
"brcm,bcm58313-srab" and the mandatory "brcm,omega-srab" string
For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of:
"brcm,bcm58522-srab"
"brcm,bcm58523-srab"
"brcm,bcm58525-srab"
"brcm,bcm58622-srab"
"brcm,bcm58623-srab"
"brcm,bcm58625-srab"
"brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string
For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
"brcm,bcm3384-switch"
"brcm,bcm6328-switch"
"brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch"
Required properties for BCM585xx/586xx/88312 SoCs:
- reg: a total of 3 register base addresses, the first one must be the
Switch Register Access block base, the second is the port 5/4 mux
configuration register and the third one is the SGMII configuration
and status register base address.
- interrupts: a total of 13 interrupts must be specified, in the following
order: port 0-5, 7-8 link status change, then the integrated PHY interrupt,
then the timestamping interrupt and the sleep timer interrupts for ports
5,7,8.
Optional properties for BCM585xx/586xx/88312 SoCs:
- reg-names: a total of 3 names matching the 3 base register address, must
be in the following order:
"srab"
"mux_config"
"sgmii_config"
- interrupt-names: a total of 13 names matching the 13 interrupts specified
must be in the following order:
"link_state_p0"
"link_state_p1"
"link_state_p2"
"link_state_p3"
"link_state_p4"
"link_state_p5"
"link_state_p7"
"link_state_p8"
"phy"
"ts"
"imp_sleep_timer_p5"
"imp_sleep_timer_p7"
"imp_sleep_timer_p8"
See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
required and optional properties.
Examples:
Ethernet switch connected via MDIO to the host, CPU port wired to eth0:
eth0: ethernet@10001000 {
compatible = "brcm,unimac";
reg = <0x10001000 0x1000>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
mdio0: mdio@10000000 {
compatible = "brcm,unimac-mdio";
#address-cells = <1>;
#size-cells = <0>;
switch0: ethernet-switch@1e {
compatible = "brcm,bcm53125";
reg = <30>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port0@0 {
reg = <0>;
label = "lan1";
};
port1@1 {
reg = <1>;
label = "lan2";
};
port5@5 {
reg = <5>;
label = "cable-modem";
fixed-link {
speed = <1000>;
full-duplex;
};
phy-mode = "rgmii-txid";
};
port8@8 {
reg = <8>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
phy-mode = "rgmii-txid";
ethernet = <&eth0>;
};
};
};
};

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@ -0,0 +1,249 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/brcm,b53.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom BCM53xx Ethernet switches
allOf:
- $ref: dsa.yaml#
maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
description:
Broadcom BCM53xx Ethernet switches
properties:
compatible:
oneOf:
- const: brcm,bcm5325
- const: brcm,bcm53115
- const: brcm,bcm53125
- const: brcm,bcm53128
- const: brcm,bcm5365
- const: brcm,bcm5395
- const: brcm,bcm5389
- const: brcm,bcm5397
- const: brcm,bcm5398
- items:
- const: brcm,bcm11360-srab
- const: brcm,cygnus-srab
- items:
- enum:
- brcm,bcm53010-srab
- brcm,bcm53011-srab
- brcm,bcm53012-srab
- brcm,bcm53018-srab
- brcm,bcm53019-srab
- const: brcm,bcm5301x-srab
- items:
- enum:
- brcm,bcm11404-srab
- brcm,bcm11407-srab
- brcm,bcm11409-srab
- brcm,bcm58310-srab
- brcm,bcm58311-srab
- brcm,bcm58313-srab
- const: brcm,omega-srab
- items:
- enum:
- brcm,bcm58522-srab
- brcm,bcm58523-srab
- brcm,bcm58525-srab
- brcm,bcm58622-srab
- brcm,bcm58623-srab
- brcm,bcm58625-srab
- brcm,bcm88312-srab
- const: brcm,nsp-srab
- items:
- enum:
- brcm,bcm3384-switch
- brcm,bcm6328-switch
- brcm,bcm6368-switch
- const: brcm,bcm63xx-switch
required:
- compatible
- reg
# BCM585xx/586xx/88312 SoCs
if:
properties:
compatible:
contains:
enum:
- brcm,bcm58522-srab
- brcm,bcm58523-srab
- brcm,bcm58525-srab
- brcm,bcm58622-srab
- brcm,bcm58623-srab
- brcm,bcm58625-srab
- brcm,bcm88312-srab
then:
properties:
reg:
minItems: 3
maxItems: 3
reg-names:
items:
- const: srab
- const: mux_config
- const: sgmii_config
interrupts:
minItems: 13
maxItems: 13
interrupt-names:
items:
- const: link_state_p0
- const: link_state_p1
- const: link_state_p2
- const: link_state_p3
- const: link_state_p4
- const: link_state_p5
- const: link_state_p7
- const: link_state_p8
- const: phy
- const: ts
- const: imp_sleep_timer_p5
- const: imp_sleep_timer_p7
- const: imp_sleep_timer_p8
required:
- interrupts
else:
properties:
reg:
maxItems: 1
unevaluatedProperties: false
examples:
- |
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethernet-switch@1e {
compatible = "brcm,bcm53125";
reg = <30>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@5 {
reg = <5>;
label = "cable-modem";
phy-mode = "rgmii-txid";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@8 {
reg = <8>;
label = "cpu";
phy-mode = "rgmii-txid";
ethernet = <&eth0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
axi {
#address-cells = <1>;
#size-cells = <1>;
switch@36000 {
compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";
reg = <0x36000 0x1000>,
<0x3f308 0x8>,
<0x3f410 0xc>;
reg-names = "srab", "mux_config", "sgmii_config";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "link_state_p0",
"link_state_p1",
"link_state_p2",
"link_state_p3",
"link_state_p4",
"link_state_p5",
"link_state_p7",
"link_state_p8",
"phy",
"ts",
"imp_sleep_timer_p5",
"imp_sleep_timer_p7",
"imp_sleep_timer_p8";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
label = "port0";
reg = <0>;
};
port@1 {
label = "port1";
reg = <1>;
};
port@2 {
label = "port2";
reg = <2>;
};
port@3 {
label = "port3";
reg = <3>;
};
port@4 {
label = "port4";
reg = <4>;
};
port@8 {
ethernet = <&amac2>;
label = "cpu";
reg = <8>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};

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@ -20,7 +20,7 @@ select: false
properties:
$nodename:
pattern: "^switch(@.*)?$"
pattern: "^(ethernet-)?switch(@.*)?$"
dsa,member:
minItems: 2
@ -78,6 +78,10 @@ patternProperties:
mac-address: true
sfp: true
managed: true
required:
- reg

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@ -3377,7 +3377,7 @@ M: Florian Fainelli <f.fainelli@gmail.com>
L: netdev@vger.kernel.org
L: openwrt-devel@lists.openwrt.org (subscribers-only)
S: Supported
F: Documentation/devicetree/bindings/net/dsa/b53.txt
F: Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
F: drivers/net/dsa/b53/*
F: include/linux/platform_data/b53.h

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@ -591,7 +591,6 @@
adc: adc@180a6000 {
compatible = "brcm,iproc-static-adc";
#io-channel-cells = <1>;
io-channel-ranges;
adc-syscon = <&ts_adc_syscon>;
clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
clock-names = "tsc_clk";

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@ -385,12 +385,12 @@
clock-names = "apb_pclk";
};
srab: srab@36000 {
srab: ethernet-switch@36000 {
compatible = "brcm,nsp-srab";
reg = <0x36000 0x1000>,
<0x3f308 0x8>,
<0x3f410 0xc>;
reg-names = "srab", "mux_config", "sgmii";
reg-names = "srab", "mux_config", "sgmii_config";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
@ -420,6 +420,10 @@
status = "disabled";
/* ports are defined in board DTS */
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
i2c0: i2c@38000 {

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@ -181,12 +181,14 @@
&hdmi0 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
wifi-2.4ghz-coexistence;
status = "okay";
};
&hdmi1 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
wifi-2.4ghz-coexistence;
status = "okay";
};

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@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
&usb {
dr_mode = "otg";
g-rx-fifo-size = <256>;
g-rx-fifo-size = <558>;
g-np-tx-fifo-size = <32>;
/*
* According to dwc2 the sum of all device EP

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@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
&usb {
dr_mode = "peripheral";
g-rx-fifo-size = <256>;
g-rx-fifo-size = <558>;
g-np-tx-fifo-size = <32>;
g-tx-fifo-size = <256 256 512 512 512 768 768>;
};

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@ -57,17 +57,10 @@
status = "okay";
};
&usb3_phy {
status = "okay";
};
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "poe";

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@ -64,17 +64,10 @@
status = "okay";
};
&usb3_phy {
status = "okay";
};
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@4 {
reg = <4>;
label = "lan";

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@ -122,9 +122,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";

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@ -117,7 +117,3 @@
};
};
};
&usb3_phy {
status = "okay";
};

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@ -57,17 +57,10 @@
status = "okay";
};
&usb3_phy {
status = "okay";
};
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@4 {
reg = <4>;
label = "poe";

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@ -105,17 +105,10 @@
status = "okay";
};
&usb3_phy {
status = "okay";
};
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";

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@ -126,7 +126,3 @@
&usb2 {
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
&usb3_phy {
status = "okay";
};

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@ -9,3 +9,7 @@
clock-frequency = <125000000>;
status = "okay";
};
&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
};

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@ -123,33 +123,13 @@
};
};
mdio-bus-mux {
#address-cells = <1>;
#size-cells = <0>;
mdio-bus-mux@18003000 {
/* BIT(9) = 1 => external mdio */
mdio_ext: mdio@200 {
mdio@200 {
reg = <0x200>;
#address-cells = <1>;
#size-cells = <0>;
};
};
mdio-mii-mux {
compatible = "mdio-mux-mmioreg";
mdio-parent-bus = <&mdio_ext>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1800c1c0 0x4>;
/* BIT(6) = mdc, BIT(7) = mdio */
mux-mask = <0xc0>;
mdio-mii@0 {
/* Enable MII function */
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "brcm,bcm53125";
@ -159,6 +139,8 @@
reset-names = "robo_reset";
reg = <0>;
dsa,member = <1 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinmux_mdio>;
ports {
#address-cells = <1>;
@ -219,9 +201,6 @@
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan7";
@ -242,6 +221,30 @@
label = "wan";
};
port@5 {
reg = <5>;
ethernet = <&gmac0>;
label = "cpu";
status = "disabled";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@7 {
reg = <7>;
ethernet = <&gmac1>;
label = "cpu";
status = "disabled";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@8 {
reg = <8>;
ethernet = <&gmac2>;
@ -268,3 +271,44 @@
&usb3_phy {
status = "okay";
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0x0000000 0x0080000>;
read-only;
};
partition@80000 {
label = "nvram";
reg = <0x080000 0x0100000>;
};
partition@180000{
label = "devinfo";
reg = <0x0180000 0x080000>;
};
partition@200000 {
label = "firmware";
reg = <0x0200000 0x01D00000>;
compatible = "brcm,trx";
};
partition@1F00000 {
label = "failsafe";
reg = <0x01F00000 0x01D00000>;
read-only;
};
partition@5200000 {
label = "system";
reg = <0x05200000 0x02E00000>;
};
};
};

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@ -59,9 +59,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "poe";

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@ -57,9 +57,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan";

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@ -108,9 +108,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";

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@ -71,6 +71,10 @@
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
&usb3_phy {
status = "okay";
};
&spi_nor {
status = "okay";
};
@ -79,9 +83,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";

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@ -8,6 +8,15 @@
/ {
};
&pinctrl {
compatible = "brcm,bcm4709-pinmux";
pinmux_mdio: mdio {
groups = "mdio_grp";
function = "mdio";
};
};
&usb3_phy {
compatible = "brcm,ns-bx-usb3-phy";
};
@ -16,3 +25,7 @@
clock-frequency = <125000000>;
status = "okay";
};
&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
};

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@ -265,7 +265,7 @@
interrupt-parent = <&gic>;
ehci: ehci@21000 {
ehci: usb@21000 {
#usb-cells = <0>;
compatible = "generic-ehci";
@ -287,7 +287,7 @@
};
};
ohci: ohci@22000 {
ohci: usb@22000 {
#usb-cells = <0>;
compatible = "generic-ohci";
@ -318,7 +318,7 @@
interrupt-parent = <&gic>;
xhci: xhci@23000 {
xhci: usb@23000 {
#usb-cells = <0>;
compatible = "generic-xhci";
@ -428,7 +428,27 @@
#address-cells = <1>;
#size-cells = <1>;
pin-controller@1c0 {
lcpll0: lcpll0@100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
reg = <0x100 0x14>;
clocks = <&osc>;
clock-output-names = "lcpll0", "pcie_phy",
"sdio", "ddr_phy";
};
genpll: genpll@140 {
#clock-cells = <1>;
compatible = "brcm,nsp-genpll";
reg = <0x140 0x24>;
clocks = <&osc>;
clock-output-names = "genpll", "phy",
"ethernetclk",
"usbclk", "iprocfast",
"sata1", "sata2";
};
pinctrl: pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
reg-names = "cru_gpio_control";
@ -454,41 +474,26 @@
function = "uart1";
};
};
thermal: thermal@2c0 {
compatible = "brcm,ns-thermal";
reg = <0x2c0 0x10>;
#thermal-sensor-cells = <0>;
};
};
};
lcpll0: lcpll0@1800c100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
reg = <0x1800c100 0x14>;
clocks = <&osc>;
clock-output-names = "lcpll0", "pcie_phy", "sdio",
"ddr_phy";
};
genpll: genpll@1800c140 {
#clock-cells = <1>;
compatible = "brcm,nsp-genpll";
reg = <0x1800c140 0x24>;
clocks = <&osc>;
clock-output-names = "genpll", "phy", "ethernetclk",
"usbclk", "iprocfast", "sata1",
"sata2";
};
thermal: thermal@1800c2c0 {
compatible = "brcm,ns-thermal";
reg = <0x1800c2c0 0x10>;
#thermal-sensor-cells = <0>;
};
srab: srab@18007000 {
compatible = "brcm,bcm5301x-srab";
srab: ethernet-switch@18007000 {
compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
reg = <0x18007000 0x1000>;
status = "disabled";
/* ports are defined in board DTS */
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
rng: rng@18004000 {

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@ -135,7 +135,7 @@
#address-cells = <1>;
#size-cells = <1>;
ehci: ehci@4000 {
ehci: usb@4000 {
compatible = "generic-ehci";
reg = <0x4000 0x1000>;
interrupt-parent = <&gic>;
@ -155,7 +155,7 @@
};
};
ohci: ohci@d000 {
ohci: usb@d000 {
#usb-cells = <0>;
compatible = "generic-ohci";

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@ -69,9 +69,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "port0";

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@ -178,3 +178,7 @@
&xhci {
status = "okay";
};
&srab {
compatible = "brcm,bcm58522-srab", "brcm,nsp-srab";
};

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@ -190,3 +190,7 @@
&xhci {
status = "okay";
};
&srab {
compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
};

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@ -210,3 +210,7 @@
&xhci {
status = "okay";
};
&srab {
compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
};

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@ -176,9 +176,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
label = "port0";
reg = <0>;

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@ -180,9 +180,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
label = "port0";
reg = <0>;

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@ -195,9 +195,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
label = "port0";
reg = <0>;

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@ -216,9 +216,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
label = "port0";
reg = <0>;

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@ -184,9 +184,6 @@
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
label = "port0";
reg = <0>;