wireless-drivers-next patches for v5.12
First set of patches for v5.12. A smaller pull request this time, biggest feature being a better key handling for ath9k. And of course the usual fixes and cleanups all over. Major changes: ath9k * more robust encryption key cache management brcmfmac * support BCM4365E with 43666 ChipCommon chip ID -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJgHW7nAAoJEG4XJFUm622bgd0IAKtEBcjfqnR2wW7Rt6Ah/Uch vInrZ+5YOhjamoCvZHhTwdvUEmuRYJBT8ZqfO5x3X0GlIaJe1PlJhlvOs/9PkQ9G eMSFcy1D/uSb3KoRRLq8lNaAy7NAyajg11IhRAeQFLeBkZgI43PGq6j7sbYCerah 87trNNlHagio9p4q9FGXVtJ2cJGQdNHM8jn4dw5Uue45YArkhj6VBh3EZl9dqV+F XmxK+qvIcK1KPzw6nZ/0dGf8B6dnXaljn0cAzAo8QPSaZI+jozY52y3XdoKVqYRF ekqDra4Xl/uKVZR1vb2jE5T/NtmzZI63uifndL6esEjwJMrrkRy9+alHwIxt2rU= =KZD7 -----END PGP SIGNATURE----- Merge tag 'wireless-drivers-next-2021-02-05' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for v5.12 First set of patches for v5.12. A smaller pull request this time, biggest feature being a better key handling for ath9k. And of course the usual fixes and cleanups all over. Major changes: ath9k * more robust encryption key cache management brcmfmac * support BCM4365E with 43666 ChipCommon chip ID * tag 'wireless-drivers-next-2021-02-05' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next: (35 commits) iwl4965: do not process non-QOS frames on txq->sched_retry path mt7601u: process tx URBs with status EPROTO properly wlcore: Fix command execute failure 19 for wl12xx mt7601u: use ieee80211_rx_list to pass frames to the network stack as a batch rtw88: 8723de: adjust the LTR setting rtlwifi: rtl8821ae: fix bool comparison in expressions rtlwifi: rtl8192se: fix bool comparison in expressions rtlwifi: rtl8188ee: fix bool comparison in expressions rtlwifi: rtl8192c-common: fix bool comparison in expressions rtlwifi: rtl_pci: fix bool comparison in expressions wlcore: Downgrade exceeded max RX BA sessions to debug wilc1000: use flexible-array member instead of zero-length array brcmfmac: clear EAP/association status bits on linkdown events brcmfmac: Delete useless kfree code qtnfmac_pcie: Use module_pci_driver mt7601u: check the status of device in calibration mt7601u: process URBs in status EPROTO properly brcmfmac: support BCM4365E with 43666 ChipCommon chip ID wilc1000: fix spelling mistake in Kconfig "devision" -> "division" mwifiex: pcie: Drop bogus __refdata annotation ... ==================== Link: https://lore.kernel.org/r/20210205161901.C7F83C433ED@smtp.codeaurora.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Коммит
c90597bdeb
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@ -197,12 +197,13 @@ struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
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bool ath_is_mybeacon(struct ath_common *common, struct ieee80211_hdr *hdr);
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void ath_hw_setbssidmask(struct ath_common *common);
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void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key);
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void ath_key_delete(struct ath_common *common, u8 hw_key_idx);
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int ath_key_config(struct ath_common *common,
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struct ieee80211_vif *vif,
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struct ieee80211_sta *sta,
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struct ieee80211_key_conf *key);
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bool ath_hw_keyreset(struct ath_common *common, u16 entry);
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bool ath_hw_keysetmac(struct ath_common *common, u16 entry, const u8 *mac);
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void ath_hw_cycle_counters_update(struct ath_common *common);
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int32_t ath_hw_get_listen_time(struct ath_common *common);
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@ -626,7 +626,7 @@ static int ath10k_ahb_hif_start(struct ath10k *ar)
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{
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot ahb hif start\n");
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napi_enable(&ar->napi);
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ath10k_core_napi_enable(ar);
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ath10k_ce_enable_interrupts(ar);
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ath10k_pci_enable_legacy_irq(ar);
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@ -644,8 +644,7 @@ static void ath10k_ahb_hif_stop(struct ath10k *ar)
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ath10k_ahb_irq_disable(ar);
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synchronize_irq(ar_ahb->irq);
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napi_synchronize(&ar->napi);
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napi_disable(&ar->napi);
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ath10k_core_napi_sync_disable(ar);
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ath10k_pci_flush(ar);
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}
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@ -2305,6 +2305,31 @@ void ath10k_core_start_recovery(struct ath10k *ar)
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}
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EXPORT_SYMBOL(ath10k_core_start_recovery);
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void ath10k_core_napi_enable(struct ath10k *ar)
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{
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lockdep_assert_held(&ar->conf_mutex);
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if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
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return;
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napi_enable(&ar->napi);
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set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
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}
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EXPORT_SYMBOL(ath10k_core_napi_enable);
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void ath10k_core_napi_sync_disable(struct ath10k *ar)
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{
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lockdep_assert_held(&ar->conf_mutex);
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if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
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return;
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napi_synchronize(&ar->napi);
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napi_disable(&ar->napi);
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clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
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}
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EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
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static void ath10k_core_restart(struct work_struct *work)
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{
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struct ath10k *ar = container_of(work, struct ath10k, restart_work);
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@ -868,6 +868,9 @@ enum ath10k_dev_flags {
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/* Indicates that ath10k device is during recovery process and not complete */
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ATH10K_FLAG_RESTARTING,
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/* protected by conf_mutex */
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ATH10K_FLAG_NAPI_ENABLED,
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};
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enum ath10k_cal_mode {
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@ -1308,6 +1311,8 @@ static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
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extern unsigned long ath10k_coredump_mask;
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void ath10k_core_napi_sync_disable(struct ath10k *ar);
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void ath10k_core_napi_enable(struct ath10k *ar);
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struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
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enum ath10k_bus bus,
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enum ath10k_hw_rev hw_rev,
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@ -1958,7 +1958,7 @@ static int ath10k_pci_hif_start(struct ath10k *ar)
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif start\n");
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napi_enable(&ar->napi);
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ath10k_core_napi_enable(ar);
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ath10k_pci_irq_enable(ar);
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ath10k_pci_rx_post(ar);
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@ -2075,8 +2075,9 @@ static void ath10k_pci_hif_stop(struct ath10k *ar)
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ath10k_pci_irq_disable(ar);
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ath10k_pci_irq_sync(ar);
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napi_synchronize(&ar->napi);
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napi_disable(&ar->napi);
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ath10k_core_napi_sync_disable(ar);
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cancel_work_sync(&ar_pci->dump_work);
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/* Most likely the device has HTT Rx ring configured. The only way to
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@ -1859,7 +1859,7 @@ static int ath10k_sdio_hif_start(struct ath10k *ar)
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struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
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int ret;
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napi_enable(&ar->napi);
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ath10k_core_napi_enable(ar);
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/* Sleep 20 ms before HIF interrupts are disabled.
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* This will give target plenty of time to process the BMI done
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@ -1992,8 +1992,7 @@ static void ath10k_sdio_hif_stop(struct ath10k *ar)
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spin_unlock_bh(&ar_sdio->wr_async_lock);
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napi_synchronize(&ar->napi);
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napi_disable(&ar->napi);
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ath10k_core_napi_sync_disable(ar);
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}
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#ifdef CONFIG_PM
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@ -915,8 +915,7 @@ static void ath10k_snoc_hif_stop(struct ath10k *ar)
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if (!test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
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ath10k_snoc_irq_disable(ar);
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napi_synchronize(&ar->napi);
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napi_disable(&ar->napi);
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ath10k_core_napi_sync_disable(ar);
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ath10k_snoc_buffer_cleanup(ar);
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif stop\n");
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}
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@ -926,7 +925,8 @@ static int ath10k_snoc_hif_start(struct ath10k *ar)
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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bitmap_clear(ar_snoc->pending_ce_irqs, 0, CE_COUNT_MAX);
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napi_enable(&ar->napi);
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ath10k_core_napi_enable(ar);
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ath10k_snoc_irq_enable(ar);
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ath10k_snoc_rx_post(ar);
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@ -1003,6 +1003,39 @@ static int ath10k_snoc_wlan_enable(struct ath10k *ar,
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NULL);
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}
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static int ath10k_hw_power_on(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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int ret;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "soc power on\n");
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ret = regulator_bulk_enable(ar_snoc->num_vregs, ar_snoc->vregs);
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if (ret)
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return ret;
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ret = clk_bulk_prepare_enable(ar_snoc->num_clks, ar_snoc->clks);
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if (ret)
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goto vreg_off;
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return ret;
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vreg_off:
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regulator_bulk_disable(ar_snoc->num_vregs, ar_snoc->vregs);
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return ret;
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}
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static int ath10k_hw_power_off(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "soc power off\n");
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clk_bulk_disable_unprepare(ar_snoc->num_clks, ar_snoc->clks);
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return regulator_bulk_disable(ar_snoc->num_vregs, ar_snoc->vregs);
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}
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static void ath10k_snoc_wlan_disable(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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@ -1024,6 +1057,7 @@ static void ath10k_snoc_hif_power_down(struct ath10k *ar)
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ath10k_snoc_wlan_disable(ar);
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ath10k_ce_free_rri(ar);
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ath10k_hw_power_off(ar);
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}
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static int ath10k_snoc_hif_power_up(struct ath10k *ar,
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@ -1034,10 +1068,16 @@ static int ath10k_snoc_hif_power_up(struct ath10k *ar,
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "%s:WCN3990 driver state = %d\n",
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__func__, ar->state);
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ret = ath10k_hw_power_on(ar);
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if (ret) {
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ath10k_err(ar, "failed to power on device: %d\n", ret);
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return ret;
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}
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ret = ath10k_snoc_wlan_enable(ar, fw_mode);
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if (ret) {
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ath10k_err(ar, "failed to enable wcn3990: %d\n", ret);
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return ret;
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goto err_hw_power_off;
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}
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ath10k_ce_alloc_rri(ar);
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@ -1045,14 +1085,18 @@ static int ath10k_snoc_hif_power_up(struct ath10k *ar,
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ret = ath10k_snoc_init_pipes(ar);
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if (ret) {
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ath10k_err(ar, "failed to initialize CE: %d\n", ret);
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goto err_wlan_enable;
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goto err_free_rri;
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}
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return 0;
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err_wlan_enable:
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err_free_rri:
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ath10k_ce_free_rri(ar);
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ath10k_snoc_wlan_disable(ar);
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err_hw_power_off:
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ath10k_hw_power_off(ar);
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return ret;
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}
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@ -1369,39 +1413,6 @@ static void ath10k_snoc_release_resource(struct ath10k *ar)
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ath10k_ce_free_pipe(ar, i);
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}
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static int ath10k_hw_power_on(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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int ret;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "soc power on\n");
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ret = regulator_bulk_enable(ar_snoc->num_vregs, ar_snoc->vregs);
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if (ret)
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return ret;
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ret = clk_bulk_prepare_enable(ar_snoc->num_clks, ar_snoc->clks);
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if (ret)
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goto vreg_off;
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return ret;
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vreg_off:
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regulator_bulk_disable(ar_snoc->num_vregs, ar_snoc->vregs);
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return ret;
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}
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static int ath10k_hw_power_off(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "soc power off\n");
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clk_bulk_disable_unprepare(ar_snoc->num_clks, ar_snoc->clks);
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return regulator_bulk_disable(ar_snoc->num_vregs, ar_snoc->vregs);
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}
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static void ath10k_msa_dump_memory(struct ath10k *ar,
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struct ath10k_fw_crash_data *crash_data)
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{
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@ -1711,22 +1722,16 @@ static int ath10k_snoc_probe(struct platform_device *pdev)
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if (ret)
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goto err_free_irq;
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ret = ath10k_hw_power_on(ar);
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if (ret) {
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ath10k_err(ar, "failed to power on device: %d\n", ret);
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goto err_free_irq;
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}
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ret = ath10k_setup_msa_resources(ar, msa_size);
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if (ret) {
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ath10k_warn(ar, "failed to setup msa resources: %d\n", ret);
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goto err_power_off;
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goto err_free_irq;
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}
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ret = ath10k_fw_init(ar);
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if (ret) {
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ath10k_err(ar, "failed to initialize firmware: %d\n", ret);
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goto err_power_off;
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goto err_free_irq;
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}
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ret = ath10k_qmi_init(ar, msa_size);
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@ -1742,9 +1747,6 @@ static int ath10k_snoc_probe(struct platform_device *pdev)
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err_fw_deinit:
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ath10k_fw_deinit(ar);
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err_power_off:
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ath10k_hw_power_off(ar);
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err_free_irq:
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ath10k_snoc_free_irq(ar);
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@ -1772,7 +1774,6 @@ static int ath10k_snoc_remove(struct platform_device *pdev)
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set_bit(ATH10K_SNOC_FLAG_UNREGISTERING, &ar_snoc->flags);
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ath10k_core_unregister(ar);
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ath10k_hw_power_off(ar);
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ath10k_fw_deinit(ar);
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ath10k_snoc_free_irq(ar);
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ath10k_snoc_release_resource(ar);
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@ -1163,7 +1163,7 @@ int ath11k_dp_peer_rx_pn_replay_config(struct ath11k_vif *arvif,
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}
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}
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spin_unlock_bh(&ar->ab->base_lock);
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spin_unlock_bh(&ab->base_lock);
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return ret;
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}
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|
|
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@ -328,7 +328,7 @@ static void ath11k_pci_enable_ltssm(struct ath11k_base *ab)
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ath11k_dbg(ab, ATH11K_DBG_PCI, "pci ltssm 0x%x\n", val);
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|
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val = ath11k_pci_read32(ab, GCC_GCC_PCIE_HOT_RST);
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val |= GCC_GCC_PCIE_HOT_RST_VAL | 0x10;
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val |= GCC_GCC_PCIE_HOT_RST_VAL;
|
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ath11k_pci_write32(ab, GCC_GCC_PCIE_HOT_RST, val);
|
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val = ath11k_pci_read32(ab, GCC_GCC_PCIE_HOT_RST);
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|
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|
|
|
@ -522,7 +522,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
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}
|
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break;
|
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case DISABLE_KEY:
|
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ath_key_delete(common, key);
|
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ath_key_delete(common, key->hw_key_idx);
|
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break;
|
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default:
|
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ret = -EINVAL;
|
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|
|
|
@ -1461,7 +1461,7 @@ static int ath9k_htc_set_key(struct ieee80211_hw *hw,
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}
|
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break;
|
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case DISABLE_KEY:
|
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ath_key_delete(common, key);
|
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ath_key_delete(common, key->hw_key_idx);
|
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break;
|
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default:
|
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ret = -EINVAL;
|
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|
|
|
@ -820,6 +820,7 @@ struct ath_hw {
|
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struct ath9k_pacal_info pacal_info;
|
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struct ar5416Stats stats;
|
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struct ath9k_tx_queue_info txq[ATH9K_NUM_TX_QUEUES];
|
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DECLARE_BITMAP(pending_del_keymap, ATH_KEYMAX);
|
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|
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enum ath9k_int imask;
|
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u32 imrs2_reg;
|
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|
|
|
@ -821,12 +821,80 @@ exit:
|
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ieee80211_free_txskb(hw, skb);
|
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}
|
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|
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static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
|
||||
{
|
||||
struct ath_buf *bf;
|
||||
struct ieee80211_tx_info *txinfo;
|
||||
struct ath_frame_info *fi;
|
||||
|
||||
list_for_each_entry(bf, txq_list, list) {
|
||||
if (bf->bf_state.stale || !bf->bf_mpdu)
|
||||
continue;
|
||||
|
||||
txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
|
||||
fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
|
||||
if (fi->keyix == keyix)
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
|
||||
{
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
int i;
|
||||
struct ath_txq *txq;
|
||||
bool key_in_use = false;
|
||||
|
||||
for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
|
||||
if (!ATH_TXQ_SETUP(sc, i))
|
||||
continue;
|
||||
txq = &sc->tx.txq[i];
|
||||
if (!txq->axq_depth)
|
||||
continue;
|
||||
if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
|
||||
continue;
|
||||
|
||||
ath_txq_lock(sc, txq);
|
||||
key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
|
||||
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
|
||||
int idx = txq->txq_tailidx;
|
||||
|
||||
while (!key_in_use &&
|
||||
!list_empty(&txq->txq_fifo[idx])) {
|
||||
key_in_use = ath9k_txq_list_has_key(
|
||||
&txq->txq_fifo[idx], keyix);
|
||||
INCR(idx, ATH_TXFIFO_DEPTH);
|
||||
}
|
||||
}
|
||||
ath_txq_unlock(sc, txq);
|
||||
}
|
||||
|
||||
return key_in_use;
|
||||
}
|
||||
|
||||
static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
|
||||
{
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!test_bit(keyix, ah->pending_del_keymap) ||
|
||||
ath9k_txq_has_key(sc, keyix))
|
||||
return;
|
||||
|
||||
/* No more TXQ frames point to this key cache entry, so delete it. */
|
||||
clear_bit(keyix, ah->pending_del_keymap);
|
||||
ath_key_delete(common, keyix);
|
||||
}
|
||||
|
||||
static void ath9k_stop(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
bool prev_idle;
|
||||
int i;
|
||||
|
||||
ath9k_deinit_channel_context(sc);
|
||||
|
||||
|
@ -894,6 +962,14 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
|
||||
spin_unlock_bh(&sc->sc_pcu_lock);
|
||||
|
||||
for (i = 0; i < ATH_KEYMAX; i++)
|
||||
ath9k_pending_key_del(sc, i);
|
||||
|
||||
/* Clear key cache entries explicitly to get rid of any potentially
|
||||
* remaining keys.
|
||||
*/
|
||||
ath9k_cmn_init_crypto(sc->sc_ah);
|
||||
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
sc->ps_idle = prev_idle;
|
||||
|
@ -1538,12 +1614,11 @@ static void ath9k_del_ps_key(struct ath_softc *sc,
|
|||
{
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
struct ath_node *an = (struct ath_node *) sta->drv_priv;
|
||||
struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
|
||||
|
||||
if (!an->ps_key)
|
||||
return;
|
||||
|
||||
ath_key_delete(common, &ps_key);
|
||||
ath_key_delete(common, an->ps_key);
|
||||
an->ps_key = 0;
|
||||
an->key_idx[0] = 0;
|
||||
}
|
||||
|
@ -1714,6 +1789,12 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
|
|||
if (sta)
|
||||
an = (struct ath_node *)sta->drv_priv;
|
||||
|
||||
/* Delete pending key cache entries if no more frames are pointing to
|
||||
* them in TXQs.
|
||||
*/
|
||||
for (i = 0; i < ATH_KEYMAX; i++)
|
||||
ath9k_pending_key_del(sc, i);
|
||||
|
||||
switch (cmd) {
|
||||
case SET_KEY:
|
||||
if (sta)
|
||||
|
@ -1743,7 +1824,15 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
|
|||
}
|
||||
break;
|
||||
case DISABLE_KEY:
|
||||
ath_key_delete(common, key);
|
||||
if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
|
||||
/* Delay key cache entry deletion until there are no
|
||||
* remaining TXQ frames pointing to this entry.
|
||||
*/
|
||||
set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
|
||||
ath_hw_keysetmac(common, key->hw_key_idx, NULL);
|
||||
} else {
|
||||
ath_key_delete(common, key->hw_key_idx);
|
||||
}
|
||||
if (an) {
|
||||
for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
|
||||
if (an->key_idx[i] != key->hw_key_idx)
|
||||
|
|
|
@ -84,8 +84,7 @@ bool ath_hw_keyreset(struct ath_common *common, u16 entry)
|
|||
}
|
||||
EXPORT_SYMBOL(ath_hw_keyreset);
|
||||
|
||||
static bool ath_hw_keysetmac(struct ath_common *common,
|
||||
u16 entry, const u8 *mac)
|
||||
bool ath_hw_keysetmac(struct ath_common *common, u16 entry, const u8 *mac)
|
||||
{
|
||||
u32 macHi, macLo;
|
||||
u32 unicast_flag = AR_KEYTABLE_VALID;
|
||||
|
@ -125,6 +124,7 @@ static bool ath_hw_keysetmac(struct ath_common *common,
|
|||
|
||||
return true;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_hw_keysetmac);
|
||||
|
||||
static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry,
|
||||
const struct ath_keyval *k,
|
||||
|
@ -581,29 +581,38 @@ EXPORT_SYMBOL(ath_key_config);
|
|||
/*
|
||||
* Delete Key.
|
||||
*/
|
||||
void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
|
||||
void ath_key_delete(struct ath_common *common, u8 hw_key_idx)
|
||||
{
|
||||
ath_hw_keyreset(common, key->hw_key_idx);
|
||||
if (key->hw_key_idx < IEEE80211_WEP_NKID)
|
||||
/* Leave CCMP and TKIP (main key) configured to avoid disabling
|
||||
* encryption for potentially pending frames already in a TXQ with the
|
||||
* keyix pointing to this key entry. Instead, only clear the MAC address
|
||||
* to prevent RX processing from using this key cache entry.
|
||||
*/
|
||||
if (test_bit(hw_key_idx, common->ccmp_keymap) ||
|
||||
test_bit(hw_key_idx, common->tkip_keymap))
|
||||
ath_hw_keysetmac(common, hw_key_idx, NULL);
|
||||
else
|
||||
ath_hw_keyreset(common, hw_key_idx);
|
||||
if (hw_key_idx < IEEE80211_WEP_NKID)
|
||||
return;
|
||||
|
||||
clear_bit(key->hw_key_idx, common->keymap);
|
||||
clear_bit(key->hw_key_idx, common->ccmp_keymap);
|
||||
if (key->cipher != WLAN_CIPHER_SUITE_TKIP)
|
||||
clear_bit(hw_key_idx, common->keymap);
|
||||
clear_bit(hw_key_idx, common->ccmp_keymap);
|
||||
if (!test_bit(hw_key_idx, common->tkip_keymap))
|
||||
return;
|
||||
|
||||
clear_bit(key->hw_key_idx + 64, common->keymap);
|
||||
clear_bit(hw_key_idx + 64, common->keymap);
|
||||
|
||||
clear_bit(key->hw_key_idx, common->tkip_keymap);
|
||||
clear_bit(key->hw_key_idx + 64, common->tkip_keymap);
|
||||
clear_bit(hw_key_idx, common->tkip_keymap);
|
||||
clear_bit(hw_key_idx + 64, common->tkip_keymap);
|
||||
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
|
||||
ath_hw_keyreset(common, key->hw_key_idx + 32);
|
||||
clear_bit(key->hw_key_idx + 32, common->keymap);
|
||||
clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
|
||||
ath_hw_keyreset(common, hw_key_idx + 32);
|
||||
clear_bit(hw_key_idx + 32, common->keymap);
|
||||
clear_bit(hw_key_idx + 64 + 32, common->keymap);
|
||||
|
||||
clear_bit(key->hw_key_idx + 32, common->tkip_keymap);
|
||||
clear_bit(key->hw_key_idx + 64 + 32, common->tkip_keymap);
|
||||
clear_bit(hw_key_idx + 32, common->tkip_keymap);
|
||||
clear_bit(hw_key_idx + 64 + 32, common->tkip_keymap);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(ath_key_delete);
|
||||
|
|
|
@ -5611,7 +5611,8 @@ static bool brcmf_is_linkup(struct brcmf_cfg80211_vif *vif,
|
|||
return false;
|
||||
}
|
||||
|
||||
static bool brcmf_is_linkdown(const struct brcmf_event_msg *e)
|
||||
static bool brcmf_is_linkdown(struct brcmf_cfg80211_vif *vif,
|
||||
const struct brcmf_event_msg *e)
|
||||
{
|
||||
u32 event = e->event_code;
|
||||
u16 flags = e->flags;
|
||||
|
@ -5620,6 +5621,8 @@ static bool brcmf_is_linkdown(const struct brcmf_event_msg *e)
|
|||
(event == BRCMF_E_DISASSOC_IND) ||
|
||||
((event == BRCMF_E_LINK) && (!(flags & BRCMF_EVENT_MSG_LINK)))) {
|
||||
brcmf_dbg(CONN, "Processing link down\n");
|
||||
clear_bit(BRCMF_VIF_STATUS_EAP_SUCCESS, &vif->sme_state);
|
||||
clear_bit(BRCMF_VIF_STATUS_ASSOC_SUCCESS, &vif->sme_state);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
|
@ -6067,7 +6070,7 @@ brcmf_notify_connect_status(struct brcmf_if *ifp,
|
|||
} else
|
||||
brcmf_bss_connect_done(cfg, ndev, e, true);
|
||||
brcmf_net_setcarrier(ifp, true);
|
||||
} else if (brcmf_is_linkdown(e)) {
|
||||
} else if (brcmf_is_linkdown(ifp->vif, e)) {
|
||||
brcmf_dbg(CONN, "Linkdown\n");
|
||||
if (!brcmf_is_ibssmode(ifp->vif) &&
|
||||
test_bit(BRCMF_VIF_STATUS_CONNECTED,
|
||||
|
|
|
@ -720,6 +720,7 @@ static u32 brcmf_chip_tcm_rambase(struct brcmf_chip_priv *ci)
|
|||
case BRCM_CC_4365_CHIP_ID:
|
||||
case BRCM_CC_4366_CHIP_ID:
|
||||
case BRCM_CC_43664_CHIP_ID:
|
||||
case BRCM_CC_43666_CHIP_ID:
|
||||
return 0x200000;
|
||||
case BRCM_CC_4359_CHIP_ID:
|
||||
return (ci->pub.chiprev < 9) ? 0x180000 : 0x160000;
|
||||
|
|
|
@ -319,8 +319,10 @@ static void brcmf_fw_strip_multi_v2(struct nvram_parser *nvp, u16 domain_nr,
|
|||
u8 *nvram;
|
||||
|
||||
nvram = kzalloc(nvp->nvram_len + 1 + 3 + sizeof(u32), GFP_KERNEL);
|
||||
if (!nvram)
|
||||
goto fail;
|
||||
if (!nvram) {
|
||||
nvp->nvram_len = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
/* Copy all valid entries, release old nvram and assign new one.
|
||||
* Valid entries are of type pcie/X/Y/ where X = domain_nr and
|
||||
|
@ -350,10 +352,6 @@ static void brcmf_fw_strip_multi_v2(struct nvram_parser *nvp, u16 domain_nr,
|
|||
kfree(nvp->nvram);
|
||||
nvp->nvram = nvram;
|
||||
nvp->nvram_len = j;
|
||||
return;
|
||||
fail:
|
||||
kfree(nvram);
|
||||
nvp->nvram_len = 0;
|
||||
}
|
||||
|
||||
static void brcmf_fw_add_defaults(struct nvram_parser *nvp)
|
||||
|
|
|
@ -77,6 +77,7 @@ static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
|
|||
BRCMF_FW_ENTRY(BRCM_CC_4366_CHIP_ID, 0x0000000F, 4366B),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_4366_CHIP_ID, 0xFFFFFFF0, 4366C),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43664_CHIP_ID, 0xFFFFFFF0, 4366C),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_43666_CHIP_ID, 0xFFFFFFF0, 4366C),
|
||||
BRCMF_FW_ENTRY(BRCM_CC_4371_CHIP_ID, 0xFFFFFFFF, 4371),
|
||||
};
|
||||
|
||||
|
|
|
@ -48,6 +48,7 @@
|
|||
#define BRCM_CC_4365_CHIP_ID 0x4365
|
||||
#define BRCM_CC_4366_CHIP_ID 0x4366
|
||||
#define BRCM_CC_43664_CHIP_ID 43664
|
||||
#define BRCM_CC_43666_CHIP_ID 43666
|
||||
#define BRCM_CC_4371_CHIP_ID 0x4371
|
||||
#define CY_CC_4373_CHIP_ID 0x4373
|
||||
#define CY_CC_43012_CHIP_ID 43012
|
||||
|
|
|
@ -2813,8 +2813,10 @@ il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
|
|||
spin_lock_irqsave(&il->sta_lock, flags);
|
||||
if (txq->sched_retry) {
|
||||
const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
|
||||
struct il_ht_agg *agg = NULL;
|
||||
WARN_ON(!qc);
|
||||
struct il_ht_agg *agg;
|
||||
|
||||
if (WARN_ON(!qc))
|
||||
goto out;
|
||||
|
||||
agg = &il->stations[sta_id].tid[tid].agg;
|
||||
|
||||
|
@ -2830,9 +2832,7 @@ il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
|
|||
D_TX_REPLY("Retry scheduler reclaim scd_ssn "
|
||||
"%d idx %d\n", scd_ssn, idx);
|
||||
freed = il4965_tx_queue_reclaim(il, txq_id, idx);
|
||||
if (qc)
|
||||
il4965_free_tfds_in_queue(il, sta_id, tid,
|
||||
freed);
|
||||
il4965_free_tfds_in_queue(il, sta_id, tid, freed);
|
||||
|
||||
if (il->mac80211_registered &&
|
||||
il_queue_space(&txq->q) > txq->q.low_mark &&
|
||||
|
@ -2862,6 +2862,7 @@ il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
|
|||
il_queue_space(&txq->q) > txq->q.low_mark)
|
||||
il_wake_queue(il, txq);
|
||||
}
|
||||
out:
|
||||
if (qc && likely(sta_id != IL_INVALID_STATION))
|
||||
il4965_txq_check_empty(il, sta_id, tid, txq_id);
|
||||
|
||||
|
|
|
@ -571,7 +571,7 @@ static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
|
|||
#endif
|
||||
|
||||
/* PCI Device Driver */
|
||||
static struct pci_driver __refdata mwifiex_pcie = {
|
||||
static struct pci_driver mwifiex_pcie = {
|
||||
.name = "mwifiex_pcie",
|
||||
.id_table = mwifiex_ids,
|
||||
.probe = mwifiex_pcie_probe,
|
||||
|
|
|
@ -74,7 +74,8 @@ bad_frame:
|
|||
}
|
||||
|
||||
static void mt7601u_rx_process_seg(struct mt7601u_dev *dev, u8 *data,
|
||||
u32 seg_len, struct page *p)
|
||||
u32 seg_len, struct page *p,
|
||||
struct list_head *list)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct mt7601u_rxwi *rxwi;
|
||||
|
@ -104,9 +105,13 @@ static void mt7601u_rx_process_seg(struct mt7601u_dev *dev, u8 *data,
|
|||
if (!skb)
|
||||
return;
|
||||
|
||||
spin_lock(&dev->mac_lock);
|
||||
ieee80211_rx(dev->hw, skb);
|
||||
spin_unlock(&dev->mac_lock);
|
||||
local_bh_disable();
|
||||
rcu_read_lock();
|
||||
|
||||
ieee80211_rx_list(dev->hw, NULL, skb, list);
|
||||
|
||||
rcu_read_unlock();
|
||||
local_bh_enable();
|
||||
}
|
||||
|
||||
static u16 mt7601u_rx_next_seg_len(u8 *data, u32 data_len)
|
||||
|
@ -130,6 +135,7 @@ mt7601u_rx_process_entry(struct mt7601u_dev *dev, struct mt7601u_dma_buf_rx *e)
|
|||
u32 seg_len, data_len = e->urb->actual_length;
|
||||
u8 *data = page_address(e->p);
|
||||
struct page *new_p = NULL;
|
||||
LIST_HEAD(list);
|
||||
int cnt = 0;
|
||||
|
||||
if (!test_bit(MT7601U_STATE_INITIALIZED, &dev->state))
|
||||
|
@ -140,7 +146,8 @@ mt7601u_rx_process_entry(struct mt7601u_dev *dev, struct mt7601u_dma_buf_rx *e)
|
|||
new_p = dev_alloc_pages(MT_RX_ORDER);
|
||||
|
||||
while ((seg_len = mt7601u_rx_next_seg_len(data, data_len))) {
|
||||
mt7601u_rx_process_seg(dev, data, seg_len, new_p ? e->p : NULL);
|
||||
mt7601u_rx_process_seg(dev, data, seg_len,
|
||||
new_p ? e->p : NULL, &list);
|
||||
|
||||
data_len -= seg_len;
|
||||
data += seg_len;
|
||||
|
@ -150,6 +157,8 @@ mt7601u_rx_process_entry(struct mt7601u_dev *dev, struct mt7601u_dma_buf_rx *e)
|
|||
if (cnt > 1)
|
||||
trace_mt_rx_dma_aggr(dev, cnt, !!new_p);
|
||||
|
||||
netif_receive_skb_list(&list);
|
||||
|
||||
if (new_p) {
|
||||
/* we have one extra ref from the allocator */
|
||||
put_page(e->p);
|
||||
|
@ -191,6 +200,7 @@ static void mt7601u_complete_rx(struct urb *urb)
|
|||
case -ECONNRESET:
|
||||
case -ESHUTDOWN:
|
||||
case -ENOENT:
|
||||
case -EPROTO:
|
||||
return;
|
||||
default:
|
||||
dev_err_ratelimited(dev->dev, "rx urb failed: %d\n",
|
||||
|
@ -236,6 +246,7 @@ static void mt7601u_complete_tx(struct urb *urb)
|
|||
case -ECONNRESET:
|
||||
case -ESHUTDOWN:
|
||||
case -ENOENT:
|
||||
case -EPROTO:
|
||||
return;
|
||||
default:
|
||||
dev_err_ratelimited(dev->dev, "tx urb failed: %d\n",
|
||||
|
|
|
@ -586,6 +586,9 @@ static void mt7601u_rxdc_cal(struct mt7601u_dev *dev)
|
|||
|
||||
void mt7601u_phy_recalibrate_after_assoc(struct mt7601u_dev *dev)
|
||||
{
|
||||
if (test_bit(MT7601U_STATE_REMOVED, &dev->state))
|
||||
return;
|
||||
|
||||
mt7601u_mcu_calibrate(dev, MCU_CAL_DPD, dev->curr_temp);
|
||||
|
||||
mt7601u_rxdc_cal(dev);
|
||||
|
|
|
@ -44,4 +44,4 @@ config WILC1000_HW_OOB_INTR
|
|||
chipset. This OOB interrupt is intended to provide a faster interrupt
|
||||
mechanism for SDIO host controllers that don't support SDIO interrupt.
|
||||
Select this option If the SDIO host controller in your platform
|
||||
doesn't support SDIO time devision interrupt.
|
||||
doesn't support SDIO time division interrupt.
|
||||
|
|
|
@ -44,20 +44,20 @@ struct wilc_drv_handler {
|
|||
struct wilc_wep_key {
|
||||
u8 index;
|
||||
u8 key_len;
|
||||
u8 key[0];
|
||||
u8 key[];
|
||||
} __packed;
|
||||
|
||||
struct wilc_sta_wpa_ptk {
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
u8 key_len;
|
||||
u8 key[0];
|
||||
u8 key[];
|
||||
} __packed;
|
||||
|
||||
struct wilc_ap_wpa_ptk {
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
u8 index;
|
||||
u8 key_len;
|
||||
u8 key[0];
|
||||
u8 key[];
|
||||
} __packed;
|
||||
|
||||
struct wilc_gtk_key {
|
||||
|
@ -65,7 +65,7 @@ struct wilc_gtk_key {
|
|||
u8 rsc[8];
|
||||
u8 index;
|
||||
u8 key_len;
|
||||
u8 key[0];
|
||||
u8 key[];
|
||||
} __packed;
|
||||
|
||||
struct wilc_op_mode {
|
||||
|
|
|
@ -480,18 +480,7 @@ static struct pci_driver qtnf_pcie_drv_data = {
|
|||
#endif
|
||||
};
|
||||
|
||||
static int __init qtnf_pcie_register(void)
|
||||
{
|
||||
return pci_register_driver(&qtnf_pcie_drv_data);
|
||||
}
|
||||
|
||||
static void __exit qtnf_pcie_exit(void)
|
||||
{
|
||||
pci_unregister_driver(&qtnf_pcie_drv_data);
|
||||
}
|
||||
|
||||
module_init(qtnf_pcie_register);
|
||||
module_exit(qtnf_pcie_exit);
|
||||
module_pci_driver(qtnf_pcie_drv_data)
|
||||
|
||||
MODULE_AUTHOR("Quantenna Communications");
|
||||
MODULE_DESCRIPTION("Quantenna PCIe bus driver for 802.11 wireless LAN.");
|
||||
|
|
|
@ -798,9 +798,9 @@ static void rtl_p2p_noa_ie(struct ieee80211_hw *hw, void *data,
|
|||
ie += 3 + noa_len;
|
||||
}
|
||||
|
||||
if (find_p2p_ie == true) {
|
||||
if (find_p2p_ie) {
|
||||
if ((p2pinfo->p2p_ps_mode > P2P_PS_NONE) &&
|
||||
(find_p2p_ps_ie == false))
|
||||
(!find_p2p_ps_ie))
|
||||
rtl_p2p_ps_cmd(hw, P2P_PS_DISABLE);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -474,11 +474,11 @@ static void rtl88e_dm_dig(struct ieee80211_hw *hw)
|
|||
u8 dm_dig_max, dm_dig_min;
|
||||
u8 current_igi = dm_dig->cur_igvalue;
|
||||
|
||||
if (rtlpriv->dm.dm_initialgain_enable == false)
|
||||
if (!rtlpriv->dm.dm_initialgain_enable)
|
||||
return;
|
||||
if (dm_dig->dig_enable_flag == false)
|
||||
if (!dm_dig->dig_enable_flag)
|
||||
return;
|
||||
if (mac->act_scanning == true)
|
||||
if (mac->act_scanning)
|
||||
return;
|
||||
|
||||
if (mac->link_state >= MAC80211_LINKED)
|
||||
|
@ -1637,7 +1637,7 @@ static void rtl88e_dm_fast_ant_training(struct ieee80211_hw *hw)
|
|||
}
|
||||
}
|
||||
|
||||
if (bpkt_filter_match == false) {
|
||||
if (!bpkt_filter_match) {
|
||||
rtl_set_bbreg(hw, DM_REG_TXAGC_A_1_MCS32_11N,
|
||||
BIT(16), 0);
|
||||
rtl_set_bbreg(hw, DM_REG_IGI_A_11N, BIT(7), 0);
|
||||
|
|
|
@ -1269,12 +1269,12 @@ void rtl88ee_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
|
|||
if (rtlpriv->psc.rfpwr_state != ERFON)
|
||||
return;
|
||||
|
||||
if (check_bssid == true) {
|
||||
if (check_bssid) {
|
||||
reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
|
||||
(u8 *)(®_rcr));
|
||||
_rtl88ee_set_bcn_ctrl_reg(hw, 0, BIT(4));
|
||||
} else if (check_bssid == false) {
|
||||
} else if (!check_bssid) {
|
||||
reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
|
||||
_rtl88ee_set_bcn_ctrl_reg(hw, BIT(4), 0);
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw,
|
||||
|
|
|
@ -380,7 +380,7 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
|
|||
initialized = false;
|
||||
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
|
||||
return;
|
||||
} else if (initialized == false) {
|
||||
} else if (!initialized) {
|
||||
initialized = true;
|
||||
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
|
||||
dm_digtable->cur_igvalue = 0x20;
|
||||
|
@ -509,7 +509,7 @@ static void rtl92c_dm_dig(struct ieee80211_hw *hw)
|
|||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
|
||||
if (rtlpriv->dm.dm_initialgain_enable == false)
|
||||
if (!rtlpriv->dm.dm_initialgain_enable)
|
||||
return;
|
||||
if (!(rtlpriv->dm.dm_flag & DYNAMIC_FUNC_DIG))
|
||||
return;
|
||||
|
|
|
@ -458,7 +458,7 @@ static u8 _rtl92se_halset_sysclk(struct ieee80211_hw *hw, u8 data)
|
|||
tmpvalue = rtl_read_byte(rtlpriv, SYS_CLKR + 1);
|
||||
bresult = ((tmpvalue & BIT(7)) == (data & BIT(7)));
|
||||
|
||||
if ((data & (BIT(6) | BIT(7))) == false) {
|
||||
if (!(data & (BIT(6) | BIT(7)))) {
|
||||
waitcount = 100;
|
||||
tmpvalue = 0;
|
||||
|
||||
|
@ -1268,7 +1268,7 @@ static u8 _rtl92s_set_sysclk(struct ieee80211_hw *hw, u8 data)
|
|||
tmp = rtl_read_byte(rtlpriv, SYS_CLKR + 1);
|
||||
result = ((tmp & BIT(7)) == (data & BIT(7)));
|
||||
|
||||
if ((data & (BIT(6) | BIT(7))) == false) {
|
||||
if (!(data & (BIT(6) | BIT(7)))) {
|
||||
waitcnt = 100;
|
||||
tmp = 0;
|
||||
|
||||
|
|
|
@ -1812,7 +1812,7 @@ static bool _rtl8821ae_phy_bb8821a_config_parafile(struct ieee80211_hw *hw)
|
|||
return false;
|
||||
}
|
||||
_rtl8821ae_phy_init_tx_power_by_rate(hw);
|
||||
if (rtlefuse->autoload_failflag == false) {
|
||||
if (!rtlefuse->autoload_failflag) {
|
||||
rtstatus = _rtl8821ae_phy_config_bb_with_pgheaderfile(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
|
@ -3980,7 +3980,7 @@ static void _rtl8821ae_iqk_tx(struct ieee80211_hw *hw, enum radio_path path)
|
|||
}
|
||||
}
|
||||
|
||||
if (tx0iqkok == false)
|
||||
if (!tx0iqkok)
|
||||
break; /* TXK fail, Don't do RXK */
|
||||
|
||||
if (vdf_enable == 1) {
|
||||
|
@ -4090,7 +4090,7 @@ static void _rtl8821ae_iqk_tx(struct ieee80211_hw *hw, enum radio_path path)
|
|||
}
|
||||
}
|
||||
|
||||
if (tx0iqkok == false) { /* If RX mode TXK fail, then take TXK Result */
|
||||
if (!tx0iqkok) { /* If RX mode TXK fail, then take TXK Result */
|
||||
tx_x0_rxk[cal] = tx_x0[cal];
|
||||
tx_y0_rxk[cal] = tx_y0[cal];
|
||||
tx0iqkok = true;
|
||||
|
@ -4249,7 +4249,7 @@ static void _rtl8821ae_iqk_tx(struct ieee80211_hw *hw, enum radio_path path)
|
|||
}
|
||||
}
|
||||
|
||||
if (tx0iqkok == false) { /* If RX mode TXK fail, then take TXK Result */
|
||||
if (!tx0iqkok) { /* If RX mode TXK fail, then take TXK Result */
|
||||
tx_x0_rxk[cal] = tx_x0[cal];
|
||||
tx_y0_rxk[cal] = tx_y0[cal];
|
||||
tx0iqkok = true;
|
||||
|
|
|
@ -1607,6 +1607,7 @@ static void rtw_coex_action_bt_relink(struct rtw_dev *rtwdev)
|
|||
struct rtw_efuse *efuse = &rtwdev->efuse;
|
||||
struct rtw_chip_info *chip = rtwdev->chip;
|
||||
u8 table_case, tdma_case;
|
||||
u32 slot_type = 0;
|
||||
|
||||
rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__);
|
||||
|
||||
|
@ -1618,6 +1619,7 @@ static void rtw_coex_action_bt_relink(struct rtw_dev *rtwdev)
|
|||
table_case = 26;
|
||||
if (coex_stat->bt_hid_exist &&
|
||||
coex_stat->bt_profile_num == 1) {
|
||||
slot_type = TDMA_4SLOT;
|
||||
tdma_case = 20;
|
||||
} else {
|
||||
tdma_case = 20;
|
||||
|
@ -1635,7 +1637,7 @@ static void rtw_coex_action_bt_relink(struct rtw_dev *rtwdev)
|
|||
}
|
||||
|
||||
rtw_coex_table(rtwdev, false, table_case);
|
||||
rtw_coex_tdma(rtwdev, false, tdma_case);
|
||||
rtw_coex_tdma(rtwdev, false, tdma_case | slot_type);
|
||||
}
|
||||
|
||||
static void rtw_coex_action_bt_idle(struct rtw_dev *rtwdev)
|
||||
|
|
|
@ -800,7 +800,7 @@ static ssize_t rtw_debugfs_set_coex_enable(struct file *filp,
|
|||
}
|
||||
|
||||
mutex_lock(&rtwdev->mutex);
|
||||
coex->manual_control = enable == 0;
|
||||
coex->manual_control = !enable;
|
||||
mutex_unlock(&rtwdev->mutex);
|
||||
|
||||
return count;
|
||||
|
|
|
@ -1276,7 +1276,6 @@ static void rtw_set_supported_band(struct ieee80211_hw *hw,
|
|||
|
||||
err_out:
|
||||
rtw_err(rtwdev, "failed to set supported band\n");
|
||||
kfree(sband);
|
||||
}
|
||||
|
||||
static void rtw_unset_supported_band(struct ieee80211_hw *hw,
|
||||
|
|
|
@ -60,8 +60,8 @@ static const struct rtw_hw_reg rtw8723d_txagc[] = {
|
|||
#define WLAN_MAX_AGG_NR 0x0A
|
||||
#define WLAN_AMPDU_MAX_TIME 0x1C
|
||||
#define WLAN_ANT_SEL 0x82
|
||||
#define WLAN_LTR_IDLE_LAT 0x883C883C
|
||||
#define WLAN_LTR_ACT_LAT 0x880B880B
|
||||
#define WLAN_LTR_IDLE_LAT 0x90039003
|
||||
#define WLAN_LTR_ACT_LAT 0x883c883c
|
||||
#define WLAN_LTR_CTRL1 0xCB004010
|
||||
#define WLAN_LTR_CTRL2 0x01233425
|
||||
|
||||
|
|
|
@ -1022,12 +1022,6 @@ static void rtw8821c_phy_cck_pd_set(struct rtw_dev *rtwdev, u8 new_lvl)
|
|||
u8 pd[CCK_PD_LV_MAX] = {3, 7, 13, 13, 13};
|
||||
u8 cck_n_rx;
|
||||
|
||||
if (dm_info->min_rssi > 60) {
|
||||
new_lvl = 4;
|
||||
pd[4] = 0x1d;
|
||||
goto set_cck_pd;
|
||||
}
|
||||
|
||||
rtw_dbg(rtwdev, RTW_DBG_PHY, "lv: (%d) -> (%d)\n",
|
||||
dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A], new_lvl);
|
||||
|
||||
|
@ -1044,7 +1038,6 @@ static void rtw8821c_phy_cck_pd_set(struct rtw_dev *rtwdev, u8 new_lvl)
|
|||
|
||||
dm_info->cck_fa_avg = CCK_FA_AVG_RESET;
|
||||
|
||||
set_cck_pd:
|
||||
dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] = new_lvl;
|
||||
rtw_write32_mask(rtwdev, REG_PWRTH, 0x3f0000, pd[new_lvl]);
|
||||
rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000,
|
||||
|
|
|
@ -158,7 +158,7 @@ void rtw_tx_report_purge_timer(struct timer_list *t)
|
|||
if (skb_queue_len(&tx_report->queue) == 0)
|
||||
return;
|
||||
|
||||
WARN(1, "purge skb(s) not reported by firmware\n");
|
||||
rtw_dbg(rtwdev, RTW_DBG_TX, "purge skb(s) not reported by firmware\n");
|
||||
|
||||
spin_lock_irqsave(&tx_report->q_lock, flags);
|
||||
skb_queue_purge(&tx_report->queue);
|
||||
|
|
|
@ -635,7 +635,6 @@ static int wl12xx_identify_chip(struct wl1271 *wl)
|
|||
wl->quirks |= WLCORE_QUIRK_LEGACY_NVS |
|
||||
WLCORE_QUIRK_DUAL_PROBE_TMPL |
|
||||
WLCORE_QUIRK_TKIP_HEADER_SPACE |
|
||||
WLCORE_QUIRK_START_STA_FAILS |
|
||||
WLCORE_QUIRK_AP_ZERO_SESSION_ID;
|
||||
wl->sr_fw_name = WL127X_FW_NAME_SINGLE;
|
||||
wl->mr_fw_name = WL127X_FW_NAME_MULTI;
|
||||
|
@ -659,7 +658,6 @@ static int wl12xx_identify_chip(struct wl1271 *wl)
|
|||
wl->quirks |= WLCORE_QUIRK_LEGACY_NVS |
|
||||
WLCORE_QUIRK_DUAL_PROBE_TMPL |
|
||||
WLCORE_QUIRK_TKIP_HEADER_SPACE |
|
||||
WLCORE_QUIRK_START_STA_FAILS |
|
||||
WLCORE_QUIRK_AP_ZERO_SESSION_ID;
|
||||
wl->plt_fw_name = WL127X_PLT_FW_NAME;
|
||||
wl->sr_fw_name = WL127X_FW_NAME_SINGLE;
|
||||
|
@ -688,7 +686,6 @@ static int wl12xx_identify_chip(struct wl1271 *wl)
|
|||
wl->quirks |= WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN |
|
||||
WLCORE_QUIRK_DUAL_PROBE_TMPL |
|
||||
WLCORE_QUIRK_TKIP_HEADER_SPACE |
|
||||
WLCORE_QUIRK_START_STA_FAILS |
|
||||
WLCORE_QUIRK_AP_ZERO_SESSION_ID;
|
||||
|
||||
wlcore_set_min_fw_ver(wl, WL128X_CHIP_VER,
|
||||
|
|
|
@ -2872,21 +2872,8 @@ static int wlcore_join(struct wl1271 *wl, struct wl12xx_vif *wlvif)
|
|||
|
||||
if (is_ibss)
|
||||
ret = wl12xx_cmd_role_start_ibss(wl, wlvif);
|
||||
else {
|
||||
if (wl->quirks & WLCORE_QUIRK_START_STA_FAILS) {
|
||||
/*
|
||||
* TODO: this is an ugly workaround for wl12xx fw
|
||||
* bug - we are not able to tx/rx after the first
|
||||
* start_sta, so make dummy start+stop calls,
|
||||
* and then call start_sta again.
|
||||
* this should be fixed in the fw.
|
||||
*/
|
||||
wl12xx_cmd_role_start_sta(wl, wlvif);
|
||||
wl12xx_cmd_role_stop_sta(wl, wlvif);
|
||||
}
|
||||
|
||||
else
|
||||
ret = wl12xx_cmd_role_start_sta(wl, wlvif);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -5394,7 +5381,7 @@ static int wl1271_op_ampdu_action(struct ieee80211_hw *hw,
|
|||
|
||||
if (wl->ba_rx_session_count >= wl->ba_rx_session_count_max) {
|
||||
ret = -EBUSY;
|
||||
wl1271_error("exceeded max RX BA sessions");
|
||||
wl1271_debug(DEBUG_RX, "exceeded max RX BA sessions");
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
@ -547,9 +547,6 @@ wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
|
|||
/* Each RX/TX transaction requires an end-of-transaction transfer */
|
||||
#define WLCORE_QUIRK_END_OF_TRANSACTION BIT(0)
|
||||
|
||||
/* the first start_role(sta) sometimes doesn't work on wl12xx */
|
||||
#define WLCORE_QUIRK_START_STA_FAILS BIT(1)
|
||||
|
||||
/* wl127x and SPI don't support SDIO block size alignment */
|
||||
#define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN BIT(2)
|
||||
|
||||
|
|
Загрузка…
Ссылка в новой задаче