cirrusfb: convert to generic boolean
Convert to generic boolean. Signed-off-by: Richard Knutsson <ricknu-0@student.ltu.se> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Коммит
c930faaed5
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@ -98,15 +98,6 @@
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#define assert(expr)
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#endif
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#ifdef TRUE
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#undef TRUE
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#endif
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#ifdef FALSE
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#undef FALSE
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#endif
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#define TRUE 1
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#define FALSE 0
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#define MB_ (1024*1024)
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#define KB_ (1024)
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@ -146,9 +137,9 @@ static const struct cirrusfb_board_info_rec {
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char *name; /* ASCII name of chipset */
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long maxclock[5]; /* maximum video clock */
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/* for 1/4bpp, 8bpp 15/16bpp, 24bpp, 32bpp - numbers from xorg code */
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unsigned init_sr07 : 1; /* init SR07 during init_vgachip() */
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unsigned init_sr1f : 1; /* write SR1F during init_vgachip() */
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unsigned scrn_start_bit19 : 1; /* construct bit 19 of screen start address */
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bool init_sr07 : 1; /* init SR07 during init_vgachip() */
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bool init_sr1f : 1; /* write SR1F during init_vgachip() */
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bool scrn_start_bit19 : 1; /* construct bit 19 of screen start address */
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/* initial SR07 value, then for each mode */
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unsigned char sr07;
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@ -166,9 +157,9 @@ static const struct cirrusfb_board_info_rec {
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/* the SD64/P4 have a higher max. videoclock */
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140000, 140000, 140000, 140000, 140000,
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},
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.init_sr07 = TRUE,
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.init_sr1f = TRUE,
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.scrn_start_bit19 = TRUE,
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.init_sr07 = true,
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.init_sr1f = true,
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.scrn_start_bit19 = true,
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.sr07 = 0xF0,
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.sr07_1bpp = 0xF0,
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.sr07_8bpp = 0xF1,
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@ -180,9 +171,9 @@ static const struct cirrusfb_board_info_rec {
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/* guess */
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90000, 90000, 90000, 90000, 90000
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},
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.init_sr07 = TRUE,
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.init_sr1f = TRUE,
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.scrn_start_bit19 = FALSE,
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.init_sr07 = true,
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.init_sr1f = true,
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.scrn_start_bit19 = false,
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.sr07 = 0x80,
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.sr07_1bpp = 0x80,
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.sr07_8bpp = 0x81,
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@ -194,9 +185,9 @@ static const struct cirrusfb_board_info_rec {
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/* guess */
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90000, 90000, 90000, 90000, 90000
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},
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.init_sr07 = TRUE,
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.init_sr1f = TRUE,
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.scrn_start_bit19 = FALSE,
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.init_sr07 = true,
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.init_sr1f = true,
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.scrn_start_bit19 = false,
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.sr07 = 0x20,
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.sr07_1bpp = 0x20,
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.sr07_8bpp = 0x21,
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@ -208,9 +199,9 @@ static const struct cirrusfb_board_info_rec {
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/* guess */
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90000, 90000, 90000, 90000, 90000
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},
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.init_sr07 = TRUE,
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.init_sr1f = TRUE,
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.scrn_start_bit19 = FALSE,
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.init_sr07 = true,
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.init_sr1f = true,
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.scrn_start_bit19 = false,
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.sr07 = 0x80,
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.sr07_1bpp = 0x80,
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.sr07_8bpp = 0x81,
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@ -221,9 +212,9 @@ static const struct cirrusfb_board_info_rec {
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.maxclock = {
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135100, 135100, 85500, 85500, 0
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},
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.init_sr07 = TRUE,
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.init_sr1f = FALSE,
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.scrn_start_bit19 = TRUE,
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.init_sr07 = true,
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.init_sr1f = false,
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.scrn_start_bit19 = true,
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.sr07 = 0x20,
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.sr07_1bpp = 0x20,
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.sr07_8bpp = 0x21,
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@ -235,9 +226,9 @@ static const struct cirrusfb_board_info_rec {
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/* for the GD5430. GD5446 can do more... */
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85500, 85500, 50000, 28500, 0
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},
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.init_sr07 = TRUE,
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.init_sr1f = TRUE,
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.scrn_start_bit19 = TRUE,
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.init_sr07 = true,
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.init_sr1f = true,
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.scrn_start_bit19 = true,
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.sr07 = 0xA0,
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.sr07_1bpp = 0xA1,
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.sr07_1bpp_mux = 0xA7,
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@ -250,9 +241,9 @@ static const struct cirrusfb_board_info_rec {
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.maxclock = {
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135100, 200000, 200000, 135100, 135100
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},
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.init_sr07 = TRUE,
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.init_sr1f = TRUE,
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.scrn_start_bit19 = TRUE,
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.init_sr07 = true,
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.init_sr1f = true,
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.scrn_start_bit19 = true,
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.sr07 = 0x10,
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.sr07_1bpp = 0x11,
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.sr07_8bpp = 0x11,
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@ -264,9 +255,9 @@ static const struct cirrusfb_board_info_rec {
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/* guess */
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135100, 135100, 135100, 135100, 135100,
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},
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.init_sr07 = FALSE,
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.init_sr1f = FALSE,
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.scrn_start_bit19 = TRUE,
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.init_sr07 = false,
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.init_sr1f = false,
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.scrn_start_bit19 = true,
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}
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};
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@ -815,7 +806,7 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var,
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default:
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DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel);
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assert (FALSE);
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assert(false);
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/* should never occur */
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break;
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}
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@ -886,7 +877,7 @@ static int cirrusfb_decode_var (const struct fb_var_screeninfo *var,
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default:
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DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel);
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assert (FALSE);
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assert(false);
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/* should never occur */
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break;
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}
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@ -3203,7 +3194,7 @@ void cirrusfb_dbg_print_regs (caddr_t regbase, cirrusfb_dbg_reg_class_t reg_clas
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break;
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default:
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/* should never occur */
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assert (FALSE);
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assert(false);
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break;
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}
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