[SCSI] mpt2sas: Fixed Big Indian Issues on 32 bit PPC
This patch addresses many endian issues solved by runing sparse with the option __CHECK_ENDIAN__ turned on. Signed-off-by: Kashyap Desai <kashyap.desai@lsi.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
Kashyap, Desai
James Bottomley
Родитель
d7e01dc669
Коммит
c97951ec46
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@ -94,7 +94,7 @@ module_param(diag_buffer_enable, int, 0);
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MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
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"(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
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int mpt2sas_fwfault_debug;
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static int mpt2sas_fwfault_debug;
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MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
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"and halt firmware - (default=0)");
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@ -857,7 +857,7 @@ _base_interrupt(int irq, void *bus_id)
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completed_cmds = 0;
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cb_idx = 0xFF;
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do {
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rd.word = rpf->Words;
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rd.word = le64_to_cpu(rpf->Words);
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if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
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goto out;
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reply = 0;
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@ -906,7 +906,7 @@ _base_interrupt(int irq, void *bus_id)
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next:
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rpf->Words = ULLONG_MAX;
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rpf->Words = cpu_to_le64(ULLONG_MAX);
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ioc->reply_post_host_index = (ioc->reply_post_host_index ==
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(ioc->reply_post_queue_depth - 1)) ? 0 :
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ioc->reply_post_host_index + 1;
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@ -1817,7 +1817,9 @@ _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
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char desc[16];
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u8 revision;
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u32 iounit_pg1_flags;
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u32 bios_version;
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bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
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pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
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strncpy(desc, ioc->manu_pg0.ChipName, 16);
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printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
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@ -1828,10 +1830,10 @@ _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
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(ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
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ioc->facts.FWVersion.Word & 0x000000FF,
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revision,
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(ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
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(ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
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(ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
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ioc->bios_pg3.BiosVersion & 0x000000FF);
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(bios_version & 0xFF000000) >> 24,
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(bios_version & 0x00FF0000) >> 16,
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(bios_version & 0x0000FF00) >> 8,
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bios_version & 0x000000FF);
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_base_display_dell_branding(ioc);
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_base_display_intel_branding(ioc);
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@ -2150,7 +2152,7 @@ _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
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static int
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_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
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{
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Mpi2IOCFactsReply_t *facts;
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struct mpt2sas_facts *facts;
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u32 queue_size, queue_diff;
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u16 max_sge_elements;
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u16 num_of_reply_frames;
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@ -2783,7 +2785,7 @@ _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
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int i;
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u8 failed;
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u16 dummy;
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u32 *mfp;
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__le32 *mfp;
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/* make sure doorbell is not in use */
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if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
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@ -2871,7 +2873,7 @@ _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
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writel(0, &ioc->chip->HostInterruptStatus);
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if (ioc->logging_level & MPT_DEBUG_INIT) {
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mfp = (u32 *)reply;
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mfp = (__le32 *)reply;
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printk(KERN_INFO "\toffset:data\n");
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for (i = 0; i < reply_bytes/4; i++)
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printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
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@ -3097,7 +3099,8 @@ static int
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_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
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{
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Mpi2PortFactsRequest_t mpi_request;
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Mpi2PortFactsReply_t mpi_reply, *pfacts;
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Mpi2PortFactsReply_t mpi_reply;
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struct mpt2sas_port_facts *pfacts;
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int mpi_reply_sz, mpi_request_sz, r;
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dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
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@ -3139,7 +3142,8 @@ static int
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_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
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{
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Mpi2IOCFactsRequest_t mpi_request;
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Mpi2IOCFactsReply_t mpi_reply, *facts;
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Mpi2IOCFactsReply_t mpi_reply;
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struct mpt2sas_facts *facts;
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int mpi_reply_sz, mpi_request_sz, r;
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dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
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@ -3225,17 +3229,6 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
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mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
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mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
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/* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
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* removed and made reserved. For those with older firmware will need
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* this fix. It was decided that the Reply and Request frame sizes are
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* the same.
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*/
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if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
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mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
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/* mpi_request.SystemReplyFrameSize =
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* cpu_to_le16(ioc->reply_sz);
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*/
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}
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mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
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mpi_request.ReplyDescriptorPostQueueDepth =
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@ -3243,25 +3236,17 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
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mpi_request.ReplyFreeQueueDepth =
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cpu_to_le16(ioc->reply_free_queue_depth);
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#if BITS_PER_LONG > 32
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mpi_request.SenseBufferAddressHigh =
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cpu_to_le32(ioc->sense_dma >> 32);
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cpu_to_le32((u64)ioc->sense_dma >> 32);
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mpi_request.SystemReplyAddressHigh =
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cpu_to_le32(ioc->reply_dma >> 32);
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cpu_to_le32((u64)ioc->reply_dma >> 32);
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mpi_request.SystemRequestFrameBaseAddress =
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cpu_to_le64(ioc->request_dma);
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cpu_to_le64((u64)ioc->request_dma);
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mpi_request.ReplyFreeQueueAddress =
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cpu_to_le64(ioc->reply_free_dma);
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cpu_to_le64((u64)ioc->reply_free_dma);
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mpi_request.ReplyDescriptorPostQueueAddress =
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cpu_to_le64(ioc->reply_post_free_dma);
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#else
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mpi_request.SystemRequestFrameBaseAddress =
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cpu_to_le32(ioc->request_dma);
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mpi_request.ReplyFreeQueueAddress =
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cpu_to_le32(ioc->reply_free_dma);
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mpi_request.ReplyDescriptorPostQueueAddress =
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cpu_to_le32(ioc->reply_post_free_dma);
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#endif
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cpu_to_le64((u64)ioc->reply_post_free_dma);
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/* This time stamp specifies number of milliseconds
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* since epoch ~ midnight January 1, 1970.
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@ -3271,10 +3256,10 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
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(current_time.tv_usec / 1000));
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if (ioc->logging_level & MPT_DEBUG_INIT) {
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u32 *mfp;
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__le32 *mfp;
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int i;
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mfp = (u32 *)&mpi_request;
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mfp = (__le32 *)&mpi_request;
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printk(KERN_INFO "\toffset:data\n");
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for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
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printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
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@ -3759,7 +3744,7 @@ _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
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/* initialize Reply Post Free Queue */
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for (i = 0; i < ioc->reply_post_queue_depth; i++)
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ioc->reply_post_free[i].Words = ULLONG_MAX;
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ioc->reply_post_free[i].Words = cpu_to_le64(ULLONG_MAX);
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r = _base_send_ioc_init(ioc, sleep_flag);
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if (r)
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@ -541,6 +541,53 @@ struct _tr_list {
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typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
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/* IOC Facts and Port Facts converted from little endian to cpu */
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union mpi2_version_union {
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MPI2_VERSION_STRUCT Struct;
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u32 Word;
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};
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struct mpt2sas_facts {
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u16 MsgVersion;
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u16 HeaderVersion;
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u8 IOCNumber;
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u8 VP_ID;
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u8 VF_ID;
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u16 IOCExceptions;
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u16 IOCStatus;
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u32 IOCLogInfo;
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u8 MaxChainDepth;
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u8 WhoInit;
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u8 NumberOfPorts;
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u8 MaxMSIxVectors;
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u16 RequestCredit;
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u16 ProductID;
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u32 IOCCapabilities;
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union mpi2_version_union FWVersion;
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u16 IOCRequestFrameSize;
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u16 Reserved3;
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u16 MaxInitiators;
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u16 MaxTargets;
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u16 MaxSasExpanders;
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u16 MaxEnclosures;
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u16 ProtocolFlags;
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u16 HighPriorityCredit;
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u16 MaxReplyDescriptorPostQueueDepth;
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u8 ReplyFrameSize;
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u8 MaxVolumes;
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u16 MaxDevHandle;
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u16 MaxPersistentEntries;
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u16 MinDevHandle;
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};
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struct mpt2sas_port_facts {
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u8 PortNumber;
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u8 VP_ID;
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u8 VF_ID;
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u8 PortType;
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u16 MaxPostedCmdBuffers;
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};
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/**
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* struct MPT2SAS_ADAPTER - per adapter struct
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* @list: ioc_list
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@ -749,8 +796,8 @@ struct MPT2SAS_ADAPTER {
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u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
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/* static config pages */
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Mpi2IOCFactsReply_t facts;
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Mpi2PortFactsReply_t *pfacts;
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struct mpt2sas_facts facts;
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struct mpt2sas_port_facts *pfacts;
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Mpi2ManufacturingPage0_t manu_pg0;
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Mpi2BiosPage2_t bios_pg2;
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Mpi2BiosPage3_t bios_pg3;
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@ -840,7 +887,7 @@ struct MPT2SAS_ADAPTER {
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/* reply free queue */
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u16 reply_free_queue_depth;
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u32 *reply_free;
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__le32 *reply_free;
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dma_addr_t reply_free_dma;
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struct dma_pool *reply_free_dma_pool;
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u32 reply_free_host_index;
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@ -2706,13 +2706,13 @@ static DEVICE_ATTR(ioc_reset_count, S_IRUGO,
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_ctl_ioc_reset_count_show, NULL);
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struct DIAG_BUFFER_START {
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u32 Size;
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u32 DiagVersion;
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__le32 Size;
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__le32 DiagVersion;
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u8 BufferType;
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u8 Reserved[3];
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u32 Reserved1;
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u32 Reserved2;
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u32 Reserved3;
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__le32 Reserved1;
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__le32 Reserved2;
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__le32 Reserved3;
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};
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/**
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* _ctl_host_trace_buffer_size_show - host buffer size (trace only)
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@ -164,7 +164,7 @@ static inline void
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_debug_dump_mf(void *mpi_request, int sz)
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{
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int i;
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u32 *mfp = (u32 *)mpi_request;
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__le32 *mfp = (__le32 *)mpi_request;
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printk(KERN_INFO "mf:\n\t");
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for (i = 0; i < sz; i++) {
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@ -1956,7 +1956,7 @@ _scsih_slave_configure(struct scsi_device *sdev)
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case MPI2_RAID_VOL_TYPE_RAID1E:
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qdepth = MPT2SAS_RAID_QUEUE_DEPTH;
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if (ioc->manu_pg10.OEMIdentifier &&
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(ioc->manu_pg10.GenericFlags0 &
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(le32_to_cpu(ioc->manu_pg10.GenericFlags0) &
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MFG10_GF0_R10_DISPLAY) &&
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!(raid_device->num_pds % 2))
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r_level = "RAID10";
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@ -4598,7 +4598,7 @@ _scsih_expander_add(struct MPT2SAS_ADAPTER *ioc, u16 handle)
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Mpi2SasEnclosurePage0_t enclosure_pg0;
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u32 ioc_status;
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u16 parent_handle;
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__le64 sas_address, sas_address_parent = 0;
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u64 sas_address, sas_address_parent = 0;
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int i;
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unsigned long flags;
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struct _sas_port *mpt2sas_port = NULL;
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@ -5404,7 +5404,7 @@ _scsih_sas_device_status_change_event(struct MPT2SAS_ADAPTER *ioc,
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{
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struct MPT2SAS_TARGET *target_priv_data;
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struct _sas_device *sas_device;
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__le64 sas_address;
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u64 sas_address;
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unsigned long flags;
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Mpi2EventDataSasDeviceStatusChange_t *event_data =
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fw_event->event_data;
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@ -6566,7 +6566,7 @@ _scsih_search_responding_expanders(struct MPT2SAS_ADAPTER *ioc)
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Mpi2ExpanderPage0_t expander_pg0;
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Mpi2ConfigReply_t mpi_reply;
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u16 ioc_status;
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__le64 sas_address;
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u64 sas_address;
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u16 handle;
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printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, __func__);
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@ -7505,7 +7505,7 @@ _scsih_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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struct Scsi_Host *shost = pci_get_drvdata(pdev);
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struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
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u32 device_state;
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pci_power_t device_state;
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mpt2sas_base_stop_watchdog(ioc);
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scsi_block_requests(shost);
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@ -7532,7 +7532,7 @@ _scsih_resume(struct pci_dev *pdev)
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{
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struct Scsi_Host *shost = pci_get_drvdata(pdev);
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struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
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u32 device_state = pdev->current_state;
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pci_power_t device_state = pdev->current_state;
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int r;
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printk(MPT2SAS_INFO_FMT "pdev=0x%p, slot=%s, previous "
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@ -299,7 +299,6 @@ _transport_expander_report_manufacture(struct MPT2SAS_ADAPTER *ioc,
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void *data_out = NULL;
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dma_addr_t data_out_dma;
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u32 sz;
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u64 *sas_address_le;
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u16 wait_state_count;
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if (ioc->shost_recovery || ioc->pci_error_recovery) {
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@ -372,8 +371,7 @@ _transport_expander_report_manufacture(struct MPT2SAS_ADAPTER *ioc,
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mpi_request->PhysicalPort = 0xFF;
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mpi_request->VF_ID = 0; /* TODO */
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mpi_request->VP_ID = 0;
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sas_address_le = (u64 *)&mpi_request->SASAddress;
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*sas_address_le = cpu_to_le64(sas_address);
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mpi_request->SASAddress = cpu_to_le64(sas_address);
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mpi_request->RequestDataLength =
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cpu_to_le16(sizeof(struct rep_manu_request));
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psge = &mpi_request->SGL;
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@ -1049,14 +1047,14 @@ struct phy_error_log_reply{
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u8 function; /* 0x11 */
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u8 function_result;
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u8 response_length;
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u16 expander_change_count;
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__be16 expander_change_count;
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u8 reserved_1[3];
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u8 phy_identifier;
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u8 reserved_2[2];
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u32 invalid_dword;
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u32 running_disparity_error;
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u32 loss_of_dword_sync;
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u32 phy_reset_problem;
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__be32 invalid_dword;
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__be32 running_disparity_error;
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__be32 loss_of_dword_sync;
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__be32 phy_reset_problem;
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};
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/**
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@ -1085,7 +1083,6 @@ _transport_get_expander_phy_error_log(struct MPT2SAS_ADAPTER *ioc,
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void *data_out = NULL;
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dma_addr_t data_out_dma;
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u32 sz;
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u64 *sas_address_le;
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u16 wait_state_count;
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if (ioc->shost_recovery || ioc->pci_error_recovery) {
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@ -1160,8 +1157,7 @@ _transport_get_expander_phy_error_log(struct MPT2SAS_ADAPTER *ioc,
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mpi_request->PhysicalPort = 0xFF;
|
||||
mpi_request->VF_ID = 0; /* TODO */
|
||||
mpi_request->VP_ID = 0;
|
||||
sas_address_le = (u64 *)&mpi_request->SASAddress;
|
||||
*sas_address_le = cpu_to_le64(phy->identify.sas_address);
|
||||
mpi_request->SASAddress = cpu_to_le64(phy->identify.sas_address);
|
||||
mpi_request->RequestDataLength =
|
||||
cpu_to_le16(sizeof(struct phy_error_log_request));
|
||||
psge = &mpi_request->SGL;
|
||||
|
|
@ -1406,7 +1402,6 @@ _transport_expander_phy_control(struct MPT2SAS_ADAPTER *ioc,
|
|||
void *data_out = NULL;
|
||||
dma_addr_t data_out_dma;
|
||||
u32 sz;
|
||||
u64 *sas_address_le;
|
||||
u16 wait_state_count;
|
||||
|
||||
if (ioc->shost_recovery) {
|
||||
|
|
@ -1486,8 +1481,7 @@ _transport_expander_phy_control(struct MPT2SAS_ADAPTER *ioc,
|
|||
mpi_request->PhysicalPort = 0xFF;
|
||||
mpi_request->VF_ID = 0; /* TODO */
|
||||
mpi_request->VP_ID = 0;
|
||||
sas_address_le = (u64 *)&mpi_request->SASAddress;
|
||||
*sas_address_le = cpu_to_le64(phy->identify.sas_address);
|
||||
mpi_request->SASAddress = cpu_to_le64(phy->identify.sas_address);
|
||||
mpi_request->RequestDataLength =
|
||||
cpu_to_le16(sizeof(struct phy_error_log_request));
|
||||
psge = &mpi_request->SGL;
|
||||
|
|
@ -1914,7 +1908,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
|
|||
mpi_request->PhysicalPort = 0xFF;
|
||||
mpi_request->VF_ID = 0; /* TODO */
|
||||
mpi_request->VP_ID = 0;
|
||||
*((u64 *)&mpi_request->SASAddress) = (rphy) ?
|
||||
mpi_request->SASAddress = (rphy) ?
|
||||
cpu_to_le64(rphy->identify.sas_address) :
|
||||
cpu_to_le64(ioc->sas_hba.sas_address);
|
||||
mpi_request->RequestDataLength = cpu_to_le16(blk_rq_bytes(req) - 4);
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче