PCI: pcie, aer: checkpatch style cleanup in pcie/aer/*
Before: drivers/pci/pcie/aer/aer_inject.c total: 4 errors, 4 warnings, 473 lines checked drivers/pci/pcie/aer/aerdrv.c total: 5 errors, 2 warnings, 333 lines checked drivers/pci/pcie/aer/aerdrv.h total: 1 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 4 errors, 3 warnings, 872 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 12 errors, 11 warnings, 248 lines checked After: drivers/pci/pcie/aer/aer_inject.c total: 0 errors, 0 warnings, 466 lines checked drivers/pci/pcie/aer/aerdrv.c total: 0 errors, 0 warnings, 335 lines checked drivers/pci/pcie/aer/aerdrv.h total: 0 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 0 errors, 0 warnings, 869 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 0 errors, 10 warnings, 247 lines checked Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Hidetoshi Seto
Jesse Barnes
Родитель
b439b1d4e3
Коммит
c9a918838c
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@ -22,11 +22,10 @@
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#include <linux/miscdevice.h>
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#include <linux/pci.h>
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#include <linux/fs.h>
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#include <asm/uaccess.h>
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#include <linux/uaccess.h>
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#include "aerdrv.h"
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struct aer_error_inj
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{
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struct aer_error_inj {
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u8 bus;
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u8 dev;
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u8 fn;
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@ -38,8 +37,7 @@ struct aer_error_inj
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u32 header_log3;
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};
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struct aer_error
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{
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struct aer_error {
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struct list_head list;
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unsigned int bus;
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unsigned int devfn;
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@ -55,8 +53,7 @@ struct aer_error
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u32 source_id;
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};
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struct pci_bus_ops
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{
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struct pci_bus_ops {
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struct list_head list;
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struct pci_bus *bus;
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struct pci_ops *ops;
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@ -150,7 +147,7 @@ static u32 *find_pci_config_dword(struct aer_error *err, int where,
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target = &err->header_log1;
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break;
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case PCI_ERR_HEADER_LOG+8:
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target = &err->header_log2;
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target = &err->header_log2;
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break;
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case PCI_ERR_HEADER_LOG+12:
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target = &err->header_log3;
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@ -258,8 +255,7 @@ static int pci_bus_set_aer_ops(struct pci_bus *bus)
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bus_ops = NULL;
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out:
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spin_unlock_irqrestore(&inject_lock, flags);
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if (bus_ops)
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kfree(bus_ops);
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kfree(bus_ops);
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return 0;
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}
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@ -401,10 +397,8 @@ static int aer_inject(struct aer_error_inj *einj)
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else
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ret = -EINVAL;
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out_put:
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if (err_alloc)
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kfree(err_alloc);
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if (rperr_alloc)
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kfree(rperr_alloc);
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kfree(err_alloc);
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kfree(rperr_alloc);
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pci_dev_put(dev);
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return ret;
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}
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@ -458,8 +452,7 @@ static void __exit aer_inject_exit(void)
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}
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spin_lock_irqsave(&inject_lock, flags);
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list_for_each_entry_safe(err, err_next,
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&pci_bus_ops_list, list) {
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list_for_each_entry_safe(err, err_next, &pci_bus_ops_list, list) {
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list_del(&err->list);
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kfree(err);
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}
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@ -38,7 +38,7 @@ MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL");
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static int __devinit aer_probe (struct pcie_device *dev);
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static int __devinit aer_probe(struct pcie_device *dev);
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static void aer_remove(struct pcie_device *dev);
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static pci_ers_result_t aer_error_detected(struct pci_dev *dev,
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enum pci_channel_state error);
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@ -47,7 +47,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev);
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static struct pci_error_handlers aer_error_handlers = {
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.error_detected = aer_error_detected,
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.resume = aer_error_resume,
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.resume = aer_error_resume,
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};
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static struct pcie_port_service_driver aerdriver = {
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@ -134,12 +134,12 @@ EXPORT_SYMBOL_GPL(aer_irq);
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*
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* Invoked when Root Port's AER service is loaded.
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**/
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static struct aer_rpc* aer_alloc_rpc(struct pcie_device *dev)
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static struct aer_rpc *aer_alloc_rpc(struct pcie_device *dev)
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{
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struct aer_rpc *rpc;
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if (!(rpc = kzalloc(sizeof(struct aer_rpc),
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GFP_KERNEL)))
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rpc = kzalloc(sizeof(struct aer_rpc), GFP_KERNEL);
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if (!rpc)
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return NULL;
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/*
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@ -189,26 +189,28 @@ static void aer_remove(struct pcie_device *dev)
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*
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* Invoked when PCI Express bus loads AER service driver.
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**/
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static int __devinit aer_probe (struct pcie_device *dev)
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static int __devinit aer_probe(struct pcie_device *dev)
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{
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int status;
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struct aer_rpc *rpc;
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struct device *device = &dev->device;
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/* Init */
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if ((status = aer_init(dev)))
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status = aer_init(dev);
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if (status)
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return status;
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/* Alloc rpc data structure */
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if (!(rpc = aer_alloc_rpc(dev))) {
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rpc = aer_alloc_rpc(dev);
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if (!rpc) {
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dev_printk(KERN_DEBUG, device, "alloc rpc failed\n");
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aer_remove(dev);
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return -ENOMEM;
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}
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/* Request IRQ ISR */
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if ((status = request_irq(dev->irq, aer_irq, IRQF_SHARED, "aerdrv",
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dev))) {
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status = request_irq(dev->irq, aer_irq, IRQF_SHARED, "aerdrv", dev);
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if (status) {
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dev_printk(KERN_DEBUG, device, "request IRQ failed\n");
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aer_remove(dev);
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return status;
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@ -21,7 +21,7 @@
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#define AER_ERROR(d) (d & AER_ERROR_MASK)
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/* Root Error Status Register Bits */
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#define ROOT_ERR_STATUS_MASKS 0x0f
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#define ROOT_ERR_STATUS_MASKS 0x0f
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#define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \
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PCI_EXP_RTCTL_SENFEE| \
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@ -65,7 +65,7 @@ struct aer_err_info {
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int severity; /* 0:NONFATAL | 1:FATAL | 2:COR */
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int flags;
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unsigned int status; /* COR/UNCOR Error Status */
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struct header_log_regs tlp; /* TLP Header */
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struct header_log_regs tlp; /* TLP Header */
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};
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struct aer_err_source {
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@ -136,4 +136,4 @@ static inline int aer_osc_setup(struct pcie_device *pciedev)
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}
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#endif
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#endif //_AERDRV_H_
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#endif /* _AERDRV_H_ */
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@ -49,10 +49,11 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev)
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PCI_EXP_DEVCTL_NFERE |
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PCI_EXP_DEVCTL_FERE |
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PCI_EXP_DEVCTL_URRE;
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pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
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reg16);
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pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, reg16);
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return 0;
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}
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EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
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int pci_disable_pcie_error_reporting(struct pci_dev *dev)
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{
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@ -68,10 +69,11 @@ int pci_disable_pcie_error_reporting(struct pci_dev *dev)
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PCI_EXP_DEVCTL_NFERE |
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PCI_EXP_DEVCTL_FERE |
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PCI_EXP_DEVCTL_URRE);
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pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
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reg16);
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pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, reg16);
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return 0;
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}
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EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
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int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
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{
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@ -92,6 +94,7 @@ int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
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return 0;
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}
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EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
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#if 0
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int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
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@ -110,7 +113,6 @@ int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
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}
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#endif /* 0 */
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static int set_device_error_reporting(struct pci_dev *dev, void *data)
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{
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bool enable = *((bool *)data);
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@ -164,8 +166,9 @@ static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
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e_info->dev[e_info->error_dev_num] = dev;
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e_info->error_dev_num++;
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return 1;
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} else
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return 0;
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}
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return 0;
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}
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@ -411,8 +414,7 @@ static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
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pci_cleanup_aer_uncorrect_error_status(dev);
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dev->error_state = pci_channel_io_normal;
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}
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}
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else {
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} else {
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/*
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* If the error is reported by an end point, we think this
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* error is related to the upstream link of the end point.
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@ -473,7 +475,7 @@ static pci_ers_result_t reset_link(struct pcie_device *aerdev,
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if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)
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udev = dev;
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else
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udev= dev->bus->self;
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udev = dev->bus->self;
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data.is_downstream = 0;
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data.aer_driver = NULL;
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@ -576,7 +578,7 @@ static pci_ers_result_t do_recovery(struct pcie_device *aerdev,
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*
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* Invoked when an error being detected by Root Port.
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*/
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static void handle_error_source(struct pcie_device * aerdev,
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static void handle_error_source(struct pcie_device *aerdev,
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struct pci_dev *dev,
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struct aer_err_info *info)
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{
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@ -682,7 +684,7 @@ static void disable_root_aer(struct aer_rpc *rpc)
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*
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* Invoked by DPC handler to consume an error.
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*/
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static struct aer_err_source* get_e_source(struct aer_rpc *rpc)
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static struct aer_err_source *get_e_source(struct aer_rpc *rpc)
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{
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struct aer_err_source *e_source;
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unsigned long flags;
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@ -865,8 +867,3 @@ int aer_init(struct pcie_device *dev)
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return AER_SUCCESS;
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}
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EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
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EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
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EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
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@ -33,7 +33,7 @@
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#define AER_AGENT_COMPLETER_MASK PCI_ERR_UNC_COMP_ABORT
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#define AER_AGENT_TRANSMITTER_MASK(t, e) (e & (PCI_ERR_COR_REP_ROLL| \
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((t == AER_CORRECTABLE) ? PCI_ERR_COR_REP_TIMER: 0)))
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((t == AER_CORRECTABLE) ? PCI_ERR_COR_REP_TIMER : 0)))
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#define AER_GET_AGENT(t, e) \
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((e & AER_AGENT_COMPLETER_MASK) ? AER_AGENT_COMPLETER : \
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@ -44,11 +44,11 @@
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#define AER_PHYSICAL_LAYER_ERROR_MASK PCI_ERR_COR_RCVR
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#define AER_DATA_LINK_LAYER_ERROR_MASK(t, e) \
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(PCI_ERR_UNC_DLP| \
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PCI_ERR_COR_BAD_TLP| \
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PCI_ERR_COR_BAD_TLP| \
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PCI_ERR_COR_BAD_DLLP| \
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PCI_ERR_COR_REP_ROLL| \
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PCI_ERR_COR_REP_ROLL| \
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((t == AER_CORRECTABLE) ? \
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PCI_ERR_COR_REP_TIMER: 0))
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PCI_ERR_COR_REP_TIMER : 0))
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#define AER_PHYSICAL_LAYER_ERROR 0
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#define AER_DATA_LINK_LAYER_ERROR 1
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@ -58,38 +58,38 @@
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((e & AER_PHYSICAL_LAYER_ERROR_MASK) ? \
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AER_PHYSICAL_LAYER_ERROR : \
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(e & AER_DATA_LINK_LAYER_ERROR_MASK(t, e)) ? \
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AER_DATA_LINK_LAYER_ERROR : \
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AER_DATA_LINK_LAYER_ERROR : \
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AER_TRANSACTION_LAYER_ERROR)
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/*
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* AER error strings
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*/
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static char* aer_error_severity_string[] = {
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static char *aer_error_severity_string[] = {
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"Uncorrected (Non-Fatal)",
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"Uncorrected (Fatal)",
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"Corrected"
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};
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static char* aer_error_layer[] = {
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static char *aer_error_layer[] = {
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"Physical Layer",
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"Data Link Layer",
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"Transaction Layer"
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};
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static char* aer_correctable_error_string[] = {
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"Receiver Error ", /* Bit Position 0 */
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static char *aer_correctable_error_string[] = {
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"Receiver Error ", /* Bit Position 0 */
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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"Bad TLP ", /* Bit Position 6 */
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"Bad DLLP ", /* Bit Position 7 */
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"RELAY_NUM Rollover ", /* Bit Position 8 */
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"Bad TLP ", /* Bit Position 6 */
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"Bad DLLP ", /* Bit Position 7 */
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"RELAY_NUM Rollover ", /* Bit Position 8 */
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NULL,
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NULL,
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NULL,
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"Replay Timer Timeout ", /* Bit Position 12 */
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"Advisory Non-Fatal ", /* Bit Position 13 */
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"Replay Timer Timeout ", /* Bit Position 12 */
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"Advisory Non-Fatal ", /* Bit Position 13 */
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NULL,
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NULL,
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NULL,
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@ -110,7 +110,7 @@ static char* aer_correctable_error_string[] = {
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NULL,
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};
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static char* aer_uncorrectable_error_string[] = {
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static char *aer_uncorrectable_error_string[] = {
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NULL,
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NULL,
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NULL,
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@ -123,10 +123,10 @@ static char* aer_uncorrectable_error_string[] = {
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NULL,
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NULL,
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NULL,
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"Poisoned TLP ", /* Bit Position 12 */
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"Poisoned TLP ", /* Bit Position 12 */
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"Flow Control Protocol ", /* Bit Position 13 */
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"Completion Timeout ", /* Bit Position 14 */
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"Completer Abort ", /* Bit Position 15 */
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"Completion Timeout ", /* Bit Position 14 */
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"Completer Abort ", /* Bit Position 15 */
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"Unexpected Completion ", /* Bit Position 16 */
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"Receiver Overflow ", /* Bit Position 17 */
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"Malformed TLP ", /* Bit Position 18 */
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@ -145,19 +145,19 @@ static char* aer_uncorrectable_error_string[] = {
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NULL,
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};
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static char* aer_agent_string[] = {
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static char *aer_agent_string[] = {
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"Receiver ID",
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"Requester ID",
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"Completer ID",
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"Transmitter ID"
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};
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static char * aer_get_error_source_name(int severity,
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static char *aer_get_error_source_name(int severity,
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unsigned int status,
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char errmsg_buff[])
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{
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int i;
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char * errmsg = NULL;
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char *errmsg = NULL;
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for (i = 0; i < 32; i++) {
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if (!(status & (1 << i)))
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@ -183,9 +183,9 @@ static DEFINE_SPINLOCK(logbuf_lock);
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static char errmsg_buff[100];
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void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
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{
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char * errmsg;
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char *errmsg;
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int err_layer, agent;
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char * loglevel;
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char *loglevel;
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if (info->severity == AER_CORRECTABLE)
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loglevel = KERN_WARNING;
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@ -196,7 +196,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
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printk("%sError Severity\t\t: %s\n", loglevel,
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aer_error_severity_string[info->severity]);
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if ( info->status == 0) {
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if (info->status == 0) {
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printk("%sPCIE Bus Error type\t: (Unaccessible)\n", loglevel);
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printk("%sUnaccessible Received\t: %s\n", loglevel,
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info->flags & AER_MULTI_ERROR_VALID_FLAG ?
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@ -245,4 +245,3 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
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}
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}
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}
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Загрузка…
Ссылка в новой задаче