RISC-V: Move to queued RW locks
Now that we have fair spinlocks we can use the generic queued rwlocks, so we might as well do so. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -39,6 +39,7 @@ config RISCV
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select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU
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select ARCH_SUPPORTS_HUGETLBFS if MMU
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select ARCH_USE_MEMTEST
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
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select ARCH_WANT_FRAME_POINTERS
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select ARCH_WANT_GENERAL_HUGETLB
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@ -3,6 +3,8 @@ generic-y += early_ioremap.h
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generic-y += flat.h
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generic-y += kvm_para.h
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generic-y += parport.h
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generic-y += spinlock.h
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generic-y += spinlock_types.h
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generic-y += qrwlock.h
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generic-y += qrwlock_types.h
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generic-y += user.h
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@ -1,99 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*/
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#ifndef _ASM_RISCV_SPINLOCK_H
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#define _ASM_RISCV_SPINLOCK_H
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/* This is horible, but the whole file is going away in the next commit. */
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#define __ASM_GENERIC_QRWLOCK_H
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#include <linux/kernel.h>
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#include <asm/current.h>
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#include <asm/fence.h>
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#include <asm-generic/spinlock.h>
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static inline void arch_read_lock(arch_rwlock_t *lock)
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{
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int tmp;
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__asm__ __volatile__(
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"1: lr.w %1, %0\n"
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" bltz %1, 1b\n"
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" addi %1, %1, 1\n"
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" sc.w %1, %1, %0\n"
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" bnez %1, 1b\n"
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RISCV_ACQUIRE_BARRIER
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: "+A" (lock->lock), "=&r" (tmp)
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:: "memory");
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}
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static inline void arch_write_lock(arch_rwlock_t *lock)
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{
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int tmp;
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__asm__ __volatile__(
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"1: lr.w %1, %0\n"
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" bnez %1, 1b\n"
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" li %1, -1\n"
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" sc.w %1, %1, %0\n"
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" bnez %1, 1b\n"
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RISCV_ACQUIRE_BARRIER
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: "+A" (lock->lock), "=&r" (tmp)
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:: "memory");
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}
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static inline int arch_read_trylock(arch_rwlock_t *lock)
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{
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int busy;
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__asm__ __volatile__(
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"1: lr.w %1, %0\n"
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" bltz %1, 1f\n"
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" addi %1, %1, 1\n"
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" sc.w %1, %1, %0\n"
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" bnez %1, 1b\n"
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RISCV_ACQUIRE_BARRIER
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"1:\n"
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: "+A" (lock->lock), "=&r" (busy)
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:: "memory");
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return !busy;
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}
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static inline int arch_write_trylock(arch_rwlock_t *lock)
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{
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int busy;
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__asm__ __volatile__(
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"1: lr.w %1, %0\n"
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" bnez %1, 1f\n"
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" li %1, -1\n"
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" sc.w %1, %1, %0\n"
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" bnez %1, 1b\n"
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RISCV_ACQUIRE_BARRIER
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"1:\n"
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: "+A" (lock->lock), "=&r" (busy)
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:: "memory");
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return !busy;
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}
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static inline void arch_read_unlock(arch_rwlock_t *lock)
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{
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__asm__ __volatile__(
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RISCV_RELEASE_BARRIER
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" amoadd.w x0, %1, %0\n"
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: "+A" (lock->lock)
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: "r" (-1)
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: "memory");
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}
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static inline void arch_write_unlock(arch_rwlock_t *lock)
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{
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smp_store_release(&lock->lock, 0);
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}
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#endif /* _ASM_RISCV_SPINLOCK_H */
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@ -1,24 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_SPINLOCK_TYPES_H
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#define _ASM_RISCV_SPINLOCK_TYPES_H
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/* This is horible, but the whole file is going away in the next commit. */
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#define __ASM_GENERIC_QRWLOCK_TYPES_H
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#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
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# error "please don't include this file directly"
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#endif
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#include <asm-generic/spinlock_types.h>
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typedef struct {
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volatile unsigned int lock;
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} arch_rwlock_t;
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#define __ARCH_RW_LOCK_UNLOCKED { 0 }
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#endif /* _ASM_RISCV_SPINLOCK_TYPES_H */
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