ARM: dts: sunxi: Conform to DT spec for NAND controller
The NAND controller node name should be nand-controller and not nand as we used previously according to the devicetree specification. Let's fix our DTs. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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@ -267,7 +267,7 @@
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#dma-cells = <2>;
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#dma-cells = <2>;
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};
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};
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nfc: nand@1c03000 {
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nfc: nand-controller@1c03000 {
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compatible = "allwinner,sun4i-a10-nand";
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compatible = "allwinner,sun4i-a10-nand";
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reg = <0x01c03000 0x1000>;
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reg = <0x01c03000 0x1000>;
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interrupts = <37>;
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interrupts = <37>;
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@ -189,7 +189,7 @@
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#dma-cells = <2>;
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#dma-cells = <2>;
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};
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};
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nfc: nand@1c03000 {
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nfc: nand-controller@1c03000 {
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compatible = "allwinner,sun4i-a10-nand";
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compatible = "allwinner,sun4i-a10-nand";
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reg = <0x01c03000 0x1000>;
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reg = <0x01c03000 0x1000>;
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interrupts = <37>;
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interrupts = <37>;
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@ -333,7 +333,7 @@
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#dma-cells = <2>;
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#dma-cells = <2>;
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};
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};
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nfc: nand@1c03000 {
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nfc: nand-controller@1c03000 {
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compatible = "allwinner,sun4i-a10-nand";
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compatible = "allwinner,sun4i-a10-nand";
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reg = <0x01c03000 0x1000>;
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reg = <0x01c03000 0x1000>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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@ -161,7 +161,7 @@
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#dma-cells = <1>;
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#dma-cells = <1>;
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};
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};
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nfc: nand@1c03000 {
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nfc: nand-controller@1c03000 {
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compatible = "allwinner,sun4i-a10-nand";
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compatible = "allwinner,sun4i-a10-nand";
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reg = <0x01c03000 0x1000>;
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reg = <0x01c03000 0x1000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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