kvm: nVMX: Split VMCS checks from nested_vmx_run()
The checks performed on the contents of the vmcs12 are extracted from nested_vmx_run so that they can be used to validate a vmcs12 that has been restored from a checkpoint. Signed-off-by: Jim Mattson <jmattson@google.com> [Change prepare_vmcs02 and nested_vmx_load_cr3's last argument to u32, to match check_vmentry_postreqs. Update comments for singlestep handling. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -10035,7 +10035,7 @@ static bool nested_cr3_valid(struct kvm_vcpu *vcpu, unsigned long val)
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* is assigned to entry_failure_code on failure.
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*/
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static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool nested_ept,
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unsigned long *entry_failure_code)
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u32 *entry_failure_code)
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{
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if (cr3 != kvm_read_cr3(vcpu) || (!nested_ept && pdptrs_changed(vcpu))) {
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if (!nested_cr3_valid(vcpu, cr3)) {
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@ -10075,7 +10075,7 @@ static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool ne
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* is assigned to entry_failure_code on failure.
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*/
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static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
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bool from_vmentry, unsigned long *entry_failure_code)
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bool from_vmentry, u32 *entry_failure_code)
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{
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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u32 exec_control;
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@ -10411,6 +10411,102 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
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return 0;
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}
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static int check_vmentry_prereqs(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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{
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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if (vmcs12->guest_activity_state != GUEST_ACTIVITY_ACTIVE &&
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vmcs12->guest_activity_state != GUEST_ACTIVITY_HLT)
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return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
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if (nested_vmx_check_msr_bitmap_controls(vcpu, vmcs12))
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return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
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if (nested_vmx_check_apicv_controls(vcpu, vmcs12))
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return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
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if (nested_vmx_check_msr_switch_controls(vcpu, vmcs12))
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return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
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if (!vmx_control_verify(vmcs12->cpu_based_vm_exec_control,
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vmx->nested.nested_vmx_procbased_ctls_low,
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vmx->nested.nested_vmx_procbased_ctls_high) ||
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!vmx_control_verify(vmcs12->secondary_vm_exec_control,
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vmx->nested.nested_vmx_secondary_ctls_low,
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vmx->nested.nested_vmx_secondary_ctls_high) ||
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!vmx_control_verify(vmcs12->pin_based_vm_exec_control,
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vmx->nested.nested_vmx_pinbased_ctls_low,
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vmx->nested.nested_vmx_pinbased_ctls_high) ||
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!vmx_control_verify(vmcs12->vm_exit_controls,
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vmx->nested.nested_vmx_exit_ctls_low,
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vmx->nested.nested_vmx_exit_ctls_high) ||
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!vmx_control_verify(vmcs12->vm_entry_controls,
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vmx->nested.nested_vmx_entry_ctls_low,
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vmx->nested.nested_vmx_entry_ctls_high))
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return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
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if (!nested_host_cr0_valid(vcpu, vmcs12->host_cr0) ||
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!nested_host_cr4_valid(vcpu, vmcs12->host_cr4) ||
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!nested_cr3_valid(vcpu, vmcs12->host_cr3))
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return VMXERR_ENTRY_INVALID_HOST_STATE_FIELD;
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return 0;
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}
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static int check_vmentry_postreqs(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
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u32 *exit_qual)
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{
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bool ia32e;
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*exit_qual = ENTRY_FAIL_DEFAULT;
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if (!nested_guest_cr0_valid(vcpu, vmcs12->guest_cr0) ||
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!nested_guest_cr4_valid(vcpu, vmcs12->guest_cr4))
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return 1;
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if (!nested_cpu_has2(vmcs12, SECONDARY_EXEC_SHADOW_VMCS) &&
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vmcs12->vmcs_link_pointer != -1ull) {
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*exit_qual = ENTRY_FAIL_VMCS_LINK_PTR;
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return 1;
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}
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/*
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* If the load IA32_EFER VM-entry control is 1, the following checks
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* are performed on the field for the IA32_EFER MSR:
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* - Bits reserved in the IA32_EFER MSR must be 0.
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* - Bit 10 (corresponding to IA32_EFER.LMA) must equal the value of
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* the IA-32e mode guest VM-exit control. It must also be identical
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* to bit 8 (LME) if bit 31 in the CR0 field (corresponding to
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* CR0.PG) is 1.
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*/
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if (to_vmx(vcpu)->nested.nested_run_pending &&
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(vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_EFER)) {
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ia32e = (vmcs12->vm_entry_controls & VM_ENTRY_IA32E_MODE) != 0;
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if (!kvm_valid_efer(vcpu, vmcs12->guest_ia32_efer) ||
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ia32e != !!(vmcs12->guest_ia32_efer & EFER_LMA) ||
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((vmcs12->guest_cr0 & X86_CR0_PG) &&
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ia32e != !!(vmcs12->guest_ia32_efer & EFER_LME)))
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return 1;
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}
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/*
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* If the load IA32_EFER VM-exit control is 1, bits reserved in the
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* IA32_EFER MSR must be 0 in the field for that register. In addition,
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* the values of the LMA and LME bits in the field must each be that of
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* the host address-space size VM-exit control.
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*/
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if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER) {
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ia32e = (vmcs12->vm_exit_controls &
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VM_EXIT_HOST_ADDR_SPACE_SIZE) != 0;
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if (!kvm_valid_efer(vcpu, vmcs12->host_ia32_efer) ||
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ia32e != !!(vmcs12->host_ia32_efer & EFER_LMA) ||
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ia32e != !!(vmcs12->host_ia32_efer & EFER_LME))
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return 1;
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}
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return 0;
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}
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/*
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* nested_vmx_run() handles a nested entry, i.e., a VMLAUNCH or VMRESUME on L1
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* for running an L2 nested guest.
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@ -10421,9 +10517,9 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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int cpu;
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struct loaded_vmcs *vmcs02;
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bool ia32e;
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u32 msr_entry_idx;
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unsigned long exit_qualification;
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u32 exit_qual;
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int ret;
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if (!nested_vmx_check_permission(vcpu))
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return 1;
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@ -10453,104 +10549,26 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
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goto out;
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}
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if (vmcs12->guest_activity_state != GUEST_ACTIVITY_ACTIVE &&
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vmcs12->guest_activity_state != GUEST_ACTIVITY_HLT) {
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nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
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ret = check_vmentry_prereqs(vcpu, vmcs12);
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if (ret) {
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nested_vmx_failValid(vcpu, ret);
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goto out;
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}
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if (nested_vmx_check_msr_bitmap_controls(vcpu, vmcs12)) {
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nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
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goto out;
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}
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if (nested_vmx_check_apicv_controls(vcpu, vmcs12)) {
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nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
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goto out;
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}
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if (nested_vmx_check_msr_switch_controls(vcpu, vmcs12)) {
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nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
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goto out;
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}
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if (!vmx_control_verify(vmcs12->cpu_based_vm_exec_control,
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vmx->nested.nested_vmx_procbased_ctls_low,
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vmx->nested.nested_vmx_procbased_ctls_high) ||
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!vmx_control_verify(vmcs12->secondary_vm_exec_control,
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vmx->nested.nested_vmx_secondary_ctls_low,
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vmx->nested.nested_vmx_secondary_ctls_high) ||
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!vmx_control_verify(vmcs12->pin_based_vm_exec_control,
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vmx->nested.nested_vmx_pinbased_ctls_low,
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vmx->nested.nested_vmx_pinbased_ctls_high) ||
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!vmx_control_verify(vmcs12->vm_exit_controls,
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vmx->nested.nested_vmx_exit_ctls_low,
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vmx->nested.nested_vmx_exit_ctls_high) ||
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!vmx_control_verify(vmcs12->vm_entry_controls,
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vmx->nested.nested_vmx_entry_ctls_low,
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vmx->nested.nested_vmx_entry_ctls_high))
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{
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nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
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goto out;
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}
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if (!nested_host_cr0_valid(vcpu, vmcs12->host_cr0) ||
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!nested_host_cr4_valid(vcpu, vmcs12->host_cr4) ||
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!nested_cr3_valid(vcpu, vmcs12->host_cr3)) {
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nested_vmx_failValid(vcpu,
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VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
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goto out;
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}
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if (!nested_guest_cr0_valid(vcpu, vmcs12->guest_cr0) ||
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!nested_guest_cr4_valid(vcpu, vmcs12->guest_cr4)) {
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nested_vmx_entry_failure(vcpu, vmcs12,
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EXIT_REASON_INVALID_STATE, ENTRY_FAIL_DEFAULT);
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return 1;
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}
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if (vmcs12->vmcs_link_pointer != -1ull) {
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nested_vmx_entry_failure(vcpu, vmcs12,
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EXIT_REASON_INVALID_STATE, ENTRY_FAIL_VMCS_LINK_PTR);
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return 1;
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}
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/*
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* If the load IA32_EFER VM-entry control is 1, the following checks
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* are performed on the field for the IA32_EFER MSR:
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* - Bits reserved in the IA32_EFER MSR must be 0.
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* - Bit 10 (corresponding to IA32_EFER.LMA) must equal the value of
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* the IA-32e mode guest VM-exit control. It must also be identical
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* to bit 8 (LME) if bit 31 in the CR0 field (corresponding to
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* CR0.PG) is 1.
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* After this point, the trap flag no longer triggers a singlestep trap
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* on the vm entry instructions; don't call kvm_skip_emulated_instruction.
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* This is not 100% correct; for performance reasons, we delegate most
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* of the checks on host state to the processor. If those fail,
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* the singlestep trap is missed.
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*/
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if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_EFER) {
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ia32e = (vmcs12->vm_entry_controls & VM_ENTRY_IA32E_MODE) != 0;
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if (!kvm_valid_efer(vcpu, vmcs12->guest_ia32_efer) ||
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ia32e != !!(vmcs12->guest_ia32_efer & EFER_LMA) ||
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((vmcs12->guest_cr0 & X86_CR0_PG) &&
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ia32e != !!(vmcs12->guest_ia32_efer & EFER_LME))) {
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nested_vmx_entry_failure(vcpu, vmcs12,
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EXIT_REASON_INVALID_STATE, ENTRY_FAIL_DEFAULT);
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return 1;
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}
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}
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skip_emulated_instruction(vcpu);
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/*
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* If the load IA32_EFER VM-exit control is 1, bits reserved in the
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* IA32_EFER MSR must be 0 in the field for that register. In addition,
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* the values of the LMA and LME bits in the field must each be that of
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* the host address-space size VM-exit control.
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*/
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if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER) {
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ia32e = (vmcs12->vm_exit_controls &
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VM_EXIT_HOST_ADDR_SPACE_SIZE) != 0;
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if (!kvm_valid_efer(vcpu, vmcs12->host_ia32_efer) ||
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ia32e != !!(vmcs12->host_ia32_efer & EFER_LMA) ||
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ia32e != !!(vmcs12->host_ia32_efer & EFER_LME)) {
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nested_vmx_entry_failure(vcpu, vmcs12,
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EXIT_REASON_INVALID_STATE, ENTRY_FAIL_DEFAULT);
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return 1;
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}
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ret = check_vmentry_postreqs(vcpu, vmcs12, &exit_qual);
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if (ret) {
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nested_vmx_entry_failure(vcpu, vmcs12,
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EXIT_REASON_INVALID_STATE, exit_qual);
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return 1;
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}
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/*
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@ -10562,12 +10580,6 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
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if (!vmcs02)
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return -ENOMEM;
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/*
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* After this point, the trap flag no longer triggers a singlestep trap
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* on the vm entry instructions. Don't call
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* kvm_skip_emulated_instruction.
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*/
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skip_emulated_instruction(vcpu);
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enter_guest_mode(vcpu);
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if (!(vmcs12->vm_entry_controls & VM_ENTRY_LOAD_DEBUG_CONTROLS))
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@ -10582,11 +10594,11 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
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vmx_segment_cache_clear(vmx);
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if (prepare_vmcs02(vcpu, vmcs12, true, &exit_qualification)) {
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if (prepare_vmcs02(vcpu, vmcs12, true, &exit_qual)) {
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leave_guest_mode(vcpu);
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vmx_load_vmcs01(vcpu);
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nested_vmx_entry_failure(vcpu, vmcs12,
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EXIT_REASON_INVALID_STATE, exit_qualification);
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EXIT_REASON_INVALID_STATE, exit_qual);
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return 1;
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}
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@ -10937,7 +10949,7 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
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struct vmcs12 *vmcs12)
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{
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struct kvm_segment seg;
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unsigned long entry_failure_code;
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u32 entry_failure_code;
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if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER)
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vcpu->arch.efer = vmcs12->host_ia32_efer;
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