PCI: designware: Fix missing MSI IRQs

The interrupts were cleared after the IRQ handler was called.  This means
that new interrupts that occur after the handler handled the previous IRQ
but before the interrupt is cleared will be missed.

Tested-by: Marek Vasut <marex@denx.de>
Tested-by:  Matthias Mann <m.mann@arkona-technologies.de>
Signed-off-by: Harro Haan <hrhaan@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Mohit Kumar <mohit.kumar@st.com>
Cc: Richard Zhu <hong-xing.zhu@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Juergen Beisert <jbe@pengutronix.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
Cc: Sean Cross <xobs@kosagi.com>
This commit is contained in:
Harro Haan 2013-12-12 19:29:03 +01:00 коммит произвёл Bjorn Helgaas
Родитель 0b8cfb6aa3
Коммит ca1658921b
1 изменённых файлов: 3 добавлений и 1 удалений

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@ -167,11 +167,13 @@ void dw_handle_msi_irq(struct pcie_port *pp)
while ((pos = find_next_bit(&val, 32, pos)) != 32) {
irq = irq_find_mapping(pp->irq_domain,
i * 32 + pos);
dw_pcie_wr_own_conf(pp,
PCIE_MSI_INTR0_STATUS + i * 12,
4, 1 << pos);
generic_handle_irq(irq);
pos++;
}
}
dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + i * 12, 4, val);
}
}