drm/tegra: sor - Change power down ordering
Lanes are powered up in decreasing order. Power them down in increasing order for consistency. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -748,7 +748,7 @@ static int tegra_sor_power_down(struct tegra_sor *sor)
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tegra_sor_writel(sor, value, SOR_DP_PADCTL_0);
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/* stop lane sequencer */
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value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_DOWN |
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value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_UP |
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SOR_LANE_SEQ_CTL_POWER_STATE_DOWN;
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tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL);
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