ARM: shmobile: Add A4S cpuidle state on sh7372
Add a "C5" cpuidle state to the SH7372 SoC connected to the A4S power domain in such a way that A4S may be turned off by cpuidle if all I/O devices in that domain have been suspended (or do not have attached drivers). This requires some reorganization of the initialization of SH7372 power management which affects the the boards based on it, Mackerel and AP4EVB. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Magnus Damm <damm@opensource.se>
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Родитель
6bf9af464c
Коммит
caaca999d3
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@ -1486,6 +1486,6 @@ MACHINE_START(AP4EVB, "ap4evb")
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.init_irq = sh7372_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = ap4evb_init,
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.init_late = shmobile_init_late,
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.init_late = sh7372_pm_init_late,
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.timer = &shmobile_timer,
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MACHINE_END
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@ -1654,6 +1654,6 @@ MACHINE_START(MACKEREL, "mackerel")
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.init_irq = sh7372_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = mackerel_init,
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.init_late = shmobile_init_late,
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.init_late = sh7372_pm_init_late,
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.timer = &shmobile_timer,
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MACHINE_END
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@ -489,4 +489,6 @@ extern void __init sh7372_init_pm_domains(void);
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static inline void sh7372_init_pm_domains(void) {}
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#endif
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extern void __init sh7372_pm_init_late(void);
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#endif /* __ASM_SH7372_H__ */
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@ -339,6 +339,21 @@ static void sh7372_enter_a3sm_common(int pllc0_on)
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sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
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sh7372_enter_sysc(pllc0_on, 1 << 12);
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}
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static void sh7372_enter_a4s_common(int pllc0_on)
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{
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sh7372_intca_suspend();
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sh7372_set_reset_vector(SMFRAM);
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sh7372_enter_sysc(pllc0_on, 1 << 10);
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sh7372_intca_resume();
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}
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static void sh7372_pm_setup_smfram(void)
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{
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memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
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}
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#else
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static inline void sh7372_pm_setup_smfram(void) {}
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#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */
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#ifdef CONFIG_CPU_IDLE
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@ -378,11 +393,24 @@ static int sh7372_enter_a3sm_pll_off(struct cpuidle_device *dev,
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return 3;
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}
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static int sh7372_enter_a4s(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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{
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unsigned long msk, msk2;
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if (!sh7372_sysc_valid(&msk, &msk2))
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return sh7372_enter_a3sm_pll_off(dev, drv, index);
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sh7372_setup_sysc(msk, msk2);
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sh7372_enter_a4s_common(0);
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return 4;
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}
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static struct cpuidle_driver sh7372_cpuidle_driver = {
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.name = "sh7372_cpuidle",
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.owner = THIS_MODULE,
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.en_core_tk_irqen = 1,
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.state_count = 4,
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.state_count = 5,
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.safe_state_index = 0, /* C1 */
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.states[0] = ARM_CPUIDLE_WFI_STATE,
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.states[0].enter = shmobile_enter_wfi,
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@ -410,6 +438,15 @@ static struct cpuidle_driver sh7372_cpuidle_driver = {
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.enter = sh7372_enter_a3sm_pll_off,
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},
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.states[4] = {
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.name = "C5",
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.desc = "A4S PLL OFF",
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.exit_latency = 240,
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.target_residency = 30 + 240,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.enter = sh7372_enter_a4s,
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.disabled = true,
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},
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};
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static void sh7372_cpuidle_init(void)
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@ -421,15 +458,6 @@ static void sh7372_cpuidle_init(void) {}
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#endif
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#ifdef CONFIG_SUSPEND
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static void sh7372_enter_a4s_common(int pllc0_on)
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{
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sh7372_intca_suspend();
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memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
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sh7372_set_reset_vector(SMFRAM);
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sh7372_enter_sysc(pllc0_on, 1 << 10);
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sh7372_intca_resume();
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}
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static int sh7372_enter_suspend(suspend_state_t suspend_state)
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{
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unsigned long msk, msk2;
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@ -497,6 +525,14 @@ void __init sh7372_pm_init(void)
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/* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
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__raw_writel(0, PDNSEL);
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sh7372_pm_setup_smfram();
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sh7372_suspend_init();
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sh7372_cpuidle_init();
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}
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void __init sh7372_pm_init_late(void)
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{
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shmobile_init_late();
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pm_genpd_name_attach_cpuidle("A4S", 4);
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}
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