ASoC: amd: add ACP5x pcm dma driver ops
This patch adds ACP5x PCM driver DMA operations. Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20210721180430.11571-8-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Vijendar Mukunda
Mark Brown
Родитель
fc2c8067c7
Коммит
cab396d8b2
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@ -17,8 +17,42 @@
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#define DRV_NAME "acp5x_i2s_dma"
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static const struct snd_soc_component_driver acp5x_i2s_component = {
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.name = DRV_NAME,
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static const struct snd_pcm_hardware acp5x_pcm_hardware_playback = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
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.period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
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.period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
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.periods_min = PLAYBACK_MIN_NUM_PERIODS,
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.periods_max = PLAYBACK_MAX_NUM_PERIODS,
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};
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static const struct snd_pcm_hardware acp5x_pcm_hardware_capture = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
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.period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
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.period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
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.periods_min = CAPTURE_MIN_NUM_PERIODS,
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.periods_max = CAPTURE_MAX_NUM_PERIODS,
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};
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static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
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@ -65,6 +99,274 @@ static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
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return IRQ_NONE;
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}
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static void config_acp5x_dma(struct i2s_stream_instance *rtd, int direction)
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{
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u16 page_idx;
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u32 low, high, val, acp_fifo_addr, reg_fifo_addr;
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u32 reg_dma_size, reg_fifo_size;
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dma_addr_t addr;
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addr = rtd->dma_addr;
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (rtd->i2s_instance) {
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case I2S_HS_INSTANCE:
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val = ACP_SRAM_HS_PB_PTE_OFFSET;
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break;
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case I2S_SP_INSTANCE:
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default:
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val = ACP_SRAM_SP_PB_PTE_OFFSET;
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}
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} else {
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switch (rtd->i2s_instance) {
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case I2S_HS_INSTANCE:
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val = ACP_SRAM_HS_CP_PTE_OFFSET;
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break;
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case I2S_SP_INSTANCE:
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default:
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val = ACP_SRAM_SP_CP_PTE_OFFSET;
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}
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}
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/* Group Enable */
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acp_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp5x_base +
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ACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
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acp_writel(PAGE_SIZE_4K_ENABLE, rtd->acp5x_base +
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ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
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for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
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/* Load the low address of page int ACP SRAM through SRBM */
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low = lower_32_bits(addr);
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high = upper_32_bits(addr);
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acp_writel(low, rtd->acp5x_base + ACP_SCRATCH_REG_0 + val);
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high |= BIT(31);
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acp_writel(high, rtd->acp5x_base + ACP_SCRATCH_REG_0 + val + 4);
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/* Move to next physically contiguous page */
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val += 8;
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addr += PAGE_SIZE;
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}
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (rtd->i2s_instance) {
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case I2S_HS_INSTANCE:
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reg_dma_size = ACP_HS_TX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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HS_PB_FIFO_ADDR_OFFSET;
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reg_fifo_addr = ACP_HS_TX_FIFOADDR;
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reg_fifo_size = ACP_HS_TX_FIFOSIZE;
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acp_writel(I2S_HS_TX_MEM_WINDOW_START,
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rtd->acp5x_base + ACP_HS_TX_RINGBUFADDR);
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break;
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case I2S_SP_INSTANCE:
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default:
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reg_dma_size = ACP_I2S_TX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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SP_PB_FIFO_ADDR_OFFSET;
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reg_fifo_addr = ACP_I2S_TX_FIFOADDR;
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reg_fifo_size = ACP_I2S_TX_FIFOSIZE;
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acp_writel(I2S_SP_TX_MEM_WINDOW_START,
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rtd->acp5x_base + ACP_I2S_TX_RINGBUFADDR);
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}
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} else {
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switch (rtd->i2s_instance) {
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case I2S_HS_INSTANCE:
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reg_dma_size = ACP_HS_RX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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HS_CAPT_FIFO_ADDR_OFFSET;
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reg_fifo_addr = ACP_HS_RX_FIFOADDR;
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reg_fifo_size = ACP_HS_RX_FIFOSIZE;
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acp_writel(I2S_HS_RX_MEM_WINDOW_START,
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rtd->acp5x_base + ACP_HS_RX_RINGBUFADDR);
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break;
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case I2S_SP_INSTANCE:
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default:
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reg_dma_size = ACP_I2S_RX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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SP_CAPT_FIFO_ADDR_OFFSET;
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reg_fifo_addr = ACP_I2S_RX_FIFOADDR;
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reg_fifo_size = ACP_I2S_RX_FIFOSIZE;
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acp_writel(I2S_SP_RX_MEM_WINDOW_START,
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rtd->acp5x_base + ACP_I2S_RX_RINGBUFADDR);
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}
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}
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acp_writel(DMA_SIZE, rtd->acp5x_base + reg_dma_size);
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acp_writel(acp_fifo_addr, rtd->acp5x_base + reg_fifo_addr);
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acp_writel(FIFO_SIZE, rtd->acp5x_base + reg_fifo_size);
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acp_writel(BIT(I2S_RX_THRESHOLD) | BIT(HS_RX_THRESHOLD)
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| BIT(I2S_TX_THRESHOLD) | BIT(HS_TX_THRESHOLD),
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rtd->acp5x_base + ACP_EXTERNAL_INTR_CNTL);
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}
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static int acp5x_dma_open(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime;
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struct snd_soc_pcm_runtime *prtd;
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struct i2s_dev_data *adata;
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struct i2s_stream_instance *i2s_data;
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int ret;
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runtime = substream->runtime;
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prtd = asoc_substream_to_rtd(substream);
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component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
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adata = dev_get_drvdata(component->dev);
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i2s_data = kzalloc(sizeof(*i2s_data), GFP_KERNEL);
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if (!i2s_data)
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return -ENOMEM;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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runtime->hw = acp5x_pcm_hardware_playback;
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else
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runtime->hw = acp5x_pcm_hardware_capture;
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ret = snd_pcm_hw_constraint_integer(runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0) {
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dev_err(component->dev, "set integer constraint failed\n");
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kfree(i2s_data);
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return ret;
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}
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i2s_data->acp5x_base = adata->acp5x_base;
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runtime->private_data = i2s_data;
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return ret;
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}
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static int acp5x_dma_hw_params(struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct i2s_stream_instance *rtd;
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struct snd_soc_pcm_runtime *prtd;
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struct snd_soc_card *card;
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struct acp5x_platform_info *pinfo;
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struct i2s_dev_data *adata;
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u64 size;
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prtd = asoc_substream_to_rtd(substream);
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card = prtd->card;
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pinfo = snd_soc_card_get_drvdata(card);
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adata = dev_get_drvdata(component->dev);
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rtd = substream->runtime->private_data;
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if (!rtd)
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return -EINVAL;
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if (pinfo) {
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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rtd->i2s_instance = pinfo->play_i2s_instance;
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switch (rtd->i2s_instance) {
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case I2S_HS_INSTANCE:
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adata->play_stream = substream;
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break;
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case I2S_SP_INSTANCE:
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default:
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adata->i2ssp_play_stream = substream;
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}
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} else {
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rtd->i2s_instance = pinfo->cap_i2s_instance;
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switch (rtd->i2s_instance) {
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case I2S_HS_INSTANCE:
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adata->capture_stream = substream;
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break;
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case I2S_SP_INSTANCE:
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default:
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adata->i2ssp_capture_stream = substream;
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}
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}
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} else {
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dev_err(component->dev, "pinfo failed\n");
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return -EINVAL;
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}
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size = params_buffer_bytes(params);
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rtd->dma_addr = substream->dma_buffer.addr;
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rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
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config_acp5x_dma(rtd, substream->stream);
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return 0;
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}
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static snd_pcm_uframes_t acp5x_dma_pointer(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct i2s_stream_instance *rtd;
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u32 pos;
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u32 buffersize;
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u64 bytescount;
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rtd = substream->runtime->private_data;
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buffersize = frames_to_bytes(substream->runtime,
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substream->runtime->buffer_size);
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bytescount = acp_get_byte_count(rtd, substream->stream);
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if (bytescount > rtd->bytescount)
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bytescount -= rtd->bytescount;
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pos = do_div(bytescount, buffersize);
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return bytes_to_frames(substream->runtime, pos);
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}
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static int acp5x_dma_new(struct snd_soc_component *component,
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struct snd_soc_pcm_runtime *rtd)
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{
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struct device *parent = component->dev->parent;
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snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
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parent, MIN_BUFFER, MAX_BUFFER);
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return 0;
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}
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static int acp5x_dma_mmap(struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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struct vm_area_struct *vma)
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{
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return snd_pcm_lib_default_mmap(substream, vma);
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}
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static int acp5x_dma_close(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *prtd;
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struct i2s_dev_data *adata;
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struct i2s_stream_instance *ins;
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prtd = asoc_substream_to_rtd(substream);
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component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
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adata = dev_get_drvdata(component->dev);
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ins = substream->runtime->private_data;
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if (!ins)
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return -EINVAL;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (ins->i2s_instance) {
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case I2S_HS_INSTANCE:
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adata->play_stream = NULL;
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break;
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case I2S_SP_INSTANCE:
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default:
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adata->i2ssp_play_stream = NULL;
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}
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} else {
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switch (ins->i2s_instance) {
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case I2S_HS_INSTANCE:
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adata->capture_stream = NULL;
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break;
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case I2S_SP_INSTANCE:
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default:
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adata->i2ssp_capture_stream = NULL;
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}
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}
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kfree(ins);
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return 0;
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}
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static const struct snd_soc_component_driver acp5x_i2s_component = {
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.name = DRV_NAME,
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.open = acp5x_dma_open,
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.close = acp5x_dma_close,
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.hw_params = acp5x_dma_hw_params,
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.pointer = acp5x_dma_pointer,
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.mmap = acp5x_dma_mmap,
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.pcm_construct = acp5x_dma_new,
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};
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static int acp5x_audio_probe(struct platform_device *pdev)
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{
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struct resource *res;
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@ -6,6 +6,7 @@
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*/
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#include "vg_chip_offset_byte.h"
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#include <sound/pcm.h>
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#define ACP5x_PHY_BASE_ADDRESS 0x1240000
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#define ACP_DEVICE_ID 0x15E2
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@ -37,6 +38,39 @@
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#define HS_TX_THRESHOLD 24
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#define HS_RX_THRESHOLD 23
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#define I2S_SP_INSTANCE 1
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#define I2S_HS_INSTANCE 2
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#define ACP_SRAM_PTE_OFFSET 0x02050000
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#define ACP_SRAM_SP_PB_PTE_OFFSET 0x0
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#define ACP_SRAM_SP_CP_PTE_OFFSET 0x100
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#define ACP_SRAM_HS_PB_PTE_OFFSET 0x200
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#define ACP_SRAM_HS_CP_PTE_OFFSET 0x300
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#define PAGE_SIZE_4K_ENABLE 0x2
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#define I2S_SP_TX_MEM_WINDOW_START 0x4000000
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#define I2S_SP_RX_MEM_WINDOW_START 0x4020000
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#define I2S_HS_TX_MEM_WINDOW_START 0x4040000
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#define I2S_HS_RX_MEM_WINDOW_START 0x4060000
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#define SP_PB_FIFO_ADDR_OFFSET 0x500
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#define SP_CAPT_FIFO_ADDR_OFFSET 0x700
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#define HS_PB_FIFO_ADDR_OFFSET 0x900
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#define HS_CAPT_FIFO_ADDR_OFFSET 0xB00
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#define PLAYBACK_MIN_NUM_PERIODS 2
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#define PLAYBACK_MAX_NUM_PERIODS 8
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#define PLAYBACK_MAX_PERIOD_SIZE 8192
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#define PLAYBACK_MIN_PERIOD_SIZE 1024
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#define CAPTURE_MIN_NUM_PERIODS 2
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#define CAPTURE_MAX_NUM_PERIODS 8
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#define CAPTURE_MAX_PERIOD_SIZE 8192
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#define CAPTURE_MIN_PERIOD_SIZE 1024
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#define MAX_BUFFER (PLAYBACK_MAX_PERIOD_SIZE * PLAYBACK_MAX_NUM_PERIODS)
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#define MIN_BUFFER MAX_BUFFER
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#define FIFO_SIZE 0x100
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#define DMA_SIZE 0x40
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#define FRM_LEN 0x100
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struct i2s_dev_data {
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unsigned int i2s_irq;
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void __iomem *acp5x_base;
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@ -46,6 +80,31 @@ struct i2s_dev_data {
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struct snd_pcm_substream *i2ssp_capture_stream;
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};
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struct i2s_stream_instance {
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u16 num_pages;
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u16 i2s_instance;
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u16 direction;
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u16 channels;
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u32 xfer_resolution;
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u32 val;
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dma_addr_t dma_addr;
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u64 bytescount;
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void __iomem *acp5x_base;
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};
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union acp_dma_count {
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struct {
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u32 low;
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u32 high;
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} bcount;
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u64 bytescount;
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};
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struct acp5x_platform_info {
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u16 play_i2s_instance;
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u16 cap_i2s_instance;
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};
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/* common header file uses exact offset rather than relative
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* offset which requires subtraction logic from base_addr
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* for accessing ACP5x MMIO space registers
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@ -59,3 +118,50 @@ static inline void acp_writel(u32 val, void __iomem *base_addr)
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{
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writel(val, base_addr - ACP5x_PHY_BASE_ADDRESS);
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}
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static inline u64 acp_get_byte_count(struct i2s_stream_instance *rtd,
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int direction)
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{
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union acp_dma_count byte_count;
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|
||||
if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
switch (rtd->i2s_instance) {
|
||||
case I2S_HS_INSTANCE:
|
||||
byte_count.bcount.high =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_HS_TX_LINEARPOSCNTR_HIGH);
|
||||
byte_count.bcount.low =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_HS_TX_LINEARPOSCNTR_LOW);
|
||||
break;
|
||||
case I2S_SP_INSTANCE:
|
||||
default:
|
||||
byte_count.bcount.high =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_I2S_TX_LINEARPOSCNTR_HIGH);
|
||||
byte_count.bcount.low =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_I2S_TX_LINEARPOSCNTR_LOW);
|
||||
}
|
||||
} else {
|
||||
switch (rtd->i2s_instance) {
|
||||
case I2S_HS_INSTANCE:
|
||||
byte_count.bcount.high =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_HS_RX_LINEARPOSCNTR_HIGH);
|
||||
byte_count.bcount.low =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_HS_RX_LINEARPOSCNTR_LOW);
|
||||
break;
|
||||
case I2S_SP_INSTANCE:
|
||||
default:
|
||||
byte_count.bcount.high =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_I2S_RX_LINEARPOSCNTR_HIGH);
|
||||
byte_count.bcount.low =
|
||||
acp_readl(rtd->acp5x_base +
|
||||
ACP_I2S_RX_LINEARPOSCNTR_LOW);
|
||||
}
|
||||
}
|
||||
return byte_count.bytescount;
|
||||
}
|
||||
|
|
|
|||
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Ссылка в новой задаче