ASoC: rsnd: fixup ADG register mask
[ Upstream commit d5aa24825d
]
BRGCKR should use 0x80770000, instead of 0x80FF0000.
R-Car Gen2 xxx_TIMSEL should use 0x0F1F,
R-Car Gen3 xxx_TIMSEL should use 0x1F1F.
Here, Gen3 doesn't support AVD, thus, both case can use 0x0F1F.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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caca324f93
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@ -216,7 +216,7 @@ int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *cmd_mod,
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NULL, &val, NULL);
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val = val << shift;
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mask = 0xffff << shift;
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mask = 0x0f1f << shift;
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rsnd_mod_bset(adg_mod, CMDOUT_TIMSEL, mask, val);
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@ -244,7 +244,7 @@ int rsnd_adg_set_src_timesel_gen2(struct rsnd_mod *src_mod,
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in = in << shift;
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out = out << shift;
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mask = 0xffff << shift;
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mask = 0x0f1f << shift;
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switch (id / 2) {
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case 0:
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@ -374,7 +374,7 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *ssi_mod, unsigned int rate)
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ckr = 0x80000000;
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}
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rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, adg->ckr | ckr);
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rsnd_mod_bset(adg_mod, BRGCKR, 0x80770000, adg->ckr | ckr);
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rsnd_mod_write(adg_mod, BRRA, adg->rbga);
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rsnd_mod_write(adg_mod, BRRB, adg->rbgb);
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