- Fix a small memory leak in mach-mxs code.
 - Correct PCIe pad configuration for imx8mp-evk board.
 - Fix ref/tcxo clock frequency property for imx6q-prti6q board.
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Merge tag 'imx-fixes-6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.1, part 3:

- Fix a small memory leak in mach-mxs code.
- Correct PCIe pad configuration for imx8mp-evk board.
- Fix ref/tcxo clock frequency property for imx6q-prti6q board.

* tag 'imx-fixes-6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6q-prti6q: Fix ref/tcxo-clock-frequency properties
  arm64: dts: imx8mp-evk: correct pcie pad settings
  ARM: mxs: fix memory leak in mxs_machine_init()

Link: https://lore.kernel.org/r/20221119073812.GQ16229@T480
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-11-21 12:26:57 +01:00
Родитель e7135a2843 e68be7b39f
Коммит cafd3d346a
3 изменённых файлов: 8 добавлений и 6 удалений

Просмотреть файл

@ -364,8 +364,8 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi>; pinctrl-0 = <&pinctrl_wifi>;
interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>; interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>;
ref-clock-frequency = "38400000"; ref-clock-frequency = <38400000>;
tcxo-clock-frequency = "19200000"; tcxo-clock-frequency = <19200000>;
}; };
}; };

Просмотреть файл

@ -393,8 +393,10 @@ static void __init mxs_machine_init(void)
root = of_find_node_by_path("/"); root = of_find_node_by_path("/");
ret = of_property_read_string(root, "model", &soc_dev_attr->machine); ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
if (ret) if (ret) {
kfree(soc_dev_attr);
return; return;
}
soc_dev_attr->family = "Freescale MXS Family"; soc_dev_attr->family = "Freescale MXS Family";
soc_dev_attr->soc_id = mxs_get_soc_id(); soc_dev_attr->soc_id = mxs_get_soc_id();

Просмотреть файл

@ -544,14 +544,14 @@
pinctrl_pcie0: pcie0grp { pinctrl_pcie0: pcie0grp {
fsl,pins = < fsl,pins = <
MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x61 /* open drain, pull up */ MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x60 /* open drain, pull up */
MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x41 MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x40
>; >;
}; };
pinctrl_pcie0_reg: pcie0reggrp { pinctrl_pcie0_reg: pcie0reggrp {
fsl,pins = < fsl,pins = <
MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x41 MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
>; >;
}; };