pinctrl: sunxi: Rename wemac functions to emac
The pin functions associated to the ethernet controller were introduced with the label "wemac", which was the name of the ethernet driver in the allwinner source tree, while the real name of the IP is actually "emac", as advertised in several documents including the datasheet. Since this is part of the device tree bindings, and that these part of the bindings have not yet be released in a kernel version, it seems like the good timing to change it and assure consistency. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -32,101 +32,101 @@ static const struct sunxi_desc_pin sun4i_a10_pins[] = {
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA0,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA0,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ERXD3 */
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SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
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SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
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SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
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SUNXI_FUNCTION(0x4, "uart2")), /* RTS */
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SUNXI_FUNCTION(0x4, "uart2")), /* RTS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA1,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA1,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ERXD2 */
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SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
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SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
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SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
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SUNXI_FUNCTION(0x4, "uart2")), /* CTS */
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SUNXI_FUNCTION(0x4, "uart2")), /* CTS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA2,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA2,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ERXD1 */
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SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
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SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
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SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
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SUNXI_FUNCTION(0x4, "uart2")), /* TX */
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SUNXI_FUNCTION(0x4, "uart2")), /* TX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA3,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA3,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ERXD0 */
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SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
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SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
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SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
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SUNXI_FUNCTION(0x4, "uart2")), /* RX */
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SUNXI_FUNCTION(0x4, "uart2")), /* RX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA4,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA4,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ETXD3 */
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SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
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SUNXI_FUNCTION(0x3, "spi1")), /* CS1 */
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SUNXI_FUNCTION(0x3, "spi1")), /* CS1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA5,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA5,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ETXD2 */
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SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
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SUNXI_FUNCTION(0x3, "spi3")), /* CS0 */
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SUNXI_FUNCTION(0x3, "spi3")), /* CS0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA6,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA6,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ETXD1 */
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SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
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SUNXI_FUNCTION(0x3, "spi3")), /* CLK */
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SUNXI_FUNCTION(0x3, "spi3")), /* CLK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA7,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA7,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ETXD0 */
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SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
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SUNXI_FUNCTION(0x3, "spi3")), /* MOSI */
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SUNXI_FUNCTION(0x3, "spi3")), /* MOSI */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA8,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA8,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ERXCK */
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SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
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SUNXI_FUNCTION(0x3, "spi3")), /* MISO */
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SUNXI_FUNCTION(0x3, "spi3")), /* MISO */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA9,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA9,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ERXERR */
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SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
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SUNXI_FUNCTION(0x3, "spi3")), /* CS1 */
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SUNXI_FUNCTION(0x3, "spi3")), /* CS1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA10,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA10,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ERXDV */
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SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
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SUNXI_FUNCTION(0x4, "uart1")), /* TX */
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SUNXI_FUNCTION(0x4, "uart1")), /* TX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA11,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA11,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* EMDC */
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SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
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SUNXI_FUNCTION(0x4, "uart1")), /* RX */
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SUNXI_FUNCTION(0x4, "uart1")), /* RX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA12,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA12,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* EMDIO */
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SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
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SUNXI_FUNCTION(0x3, "uart6"), /* TX */
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SUNXI_FUNCTION(0x3, "uart6"), /* TX */
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SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
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SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA13,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA13,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ETXEN */
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SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
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SUNXI_FUNCTION(0x3, "uart6"), /* RX */
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SUNXI_FUNCTION(0x3, "uart6"), /* RX */
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SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
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SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA14,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA14,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ETXCK */
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SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
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SUNXI_FUNCTION(0x3, "uart7"), /* TX */
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SUNXI_FUNCTION(0x3, "uart7"), /* TX */
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SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
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SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA15,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA15,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ECRS */
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SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
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SUNXI_FUNCTION(0x3, "uart7"), /* RX */
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SUNXI_FUNCTION(0x3, "uart7"), /* RX */
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SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
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SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA16,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA16,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ECOL */
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SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
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SUNXI_FUNCTION(0x3, "can"), /* TX */
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SUNXI_FUNCTION(0x3, "can"), /* TX */
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SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
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SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA17,
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SUNXI_PIN(SUNXI_PINCTRL_PIN_PA17,
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "wemac"), /* ETXERR */
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SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
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SUNXI_FUNCTION(0x3, "can"), /* RX */
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SUNXI_FUNCTION(0x3, "can"), /* RX */
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SUNXI_FUNCTION(0x4, "uart1")), /* RING */
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SUNXI_FUNCTION(0x4, "uart1")), /* RING */
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/* Hole */
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/* Hole */
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