crypto: qat - fix default value of WDT timer
The QAT HW supports an hardware mechanism to detect an accelerator hang.
The reporting of a hang occurs after a watchdog timer (WDT) expires.
The value of the WDT set previously was too small and was causing false
positives.
Change the default value of the WDT to 0x7000000ULL to avoid this.
Fixes: 1c4d9d5bbb
("crypto: qat - enable detection of accelerators hang")
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Lucas Segarra Fernandez <lucas.segarra.fernandez@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Родитель
442f06067f
Коммит
cc40b04c08
|
@ -107,7 +107,7 @@ do { \
|
||||||
* Timeout is in cycles. Clock speed may vary across products but this
|
* Timeout is in cycles. Clock speed may vary across products but this
|
||||||
* value should be a few milli-seconds.
|
* value should be a few milli-seconds.
|
||||||
*/
|
*/
|
||||||
#define ADF_SSM_WDT_DEFAULT_VALUE 0x200000
|
#define ADF_SSM_WDT_DEFAULT_VALUE 0x7000000ULL
|
||||||
#define ADF_SSM_WDT_PKE_DEFAULT_VALUE 0x8000000
|
#define ADF_SSM_WDT_PKE_DEFAULT_VALUE 0x8000000
|
||||||
#define ADF_SSMWDTL_OFFSET 0x54
|
#define ADF_SSMWDTL_OFFSET 0x54
|
||||||
#define ADF_SSMWDTH_OFFSET 0x5C
|
#define ADF_SSMWDTH_OFFSET 0x5C
|
||||||
|
|
Загрузка…
Ссылка в новой задаче