powerpc/eeh: Cleanup function names in the EEH core
The EEH has been implemented on pSeries platform. The original code looks a little bit nasty. The patch does cleanup on the current EEH implementation so that it looks more clean. * Try adding prefix "eeh" for functions. * Some function names have been adjusted so that they looks shorter and meaningful. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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cce4b2d243
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@ -58,16 +58,16 @@ struct pci_dev *pci_get_device_by_addr(unsigned long addr);
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void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
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#define EEH_THAW_MMIO 2
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#define EEH_THAW_DMA 3
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int rtas_pci_enable(struct pci_dn *pdn, int function);
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int rtas_set_slot_reset (struct pci_dn *);
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int eeh_pci_enable(struct pci_dn *pdn, int function);
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int eeh_reset_pe(struct pci_dn *);
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int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
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void eeh_restore_bars(struct pci_dn *);
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void rtas_configure_bridge(struct pci_dn *);
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void eeh_configure_bridge(struct pci_dn *);
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int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
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int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
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void eeh_mark_slot(struct device_node *dn, int mode_flag);
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void eeh_clear_slot(struct device_node *dn, int mode_flag);
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struct device_node *find_device_pe(struct device_node *dn);
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struct device_node *eeh_find_device_pe(struct device_node *dn);
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void eeh_sysfs_add_device(struct pci_dev *pdev);
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void eeh_sysfs_remove_device(struct pci_dev *pdev);
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@ -130,7 +130,7 @@ static unsigned long slot_resets;
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#define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
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/**
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* rtas_slot_error_detail - Retrieve error log through RTAS call
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* eeh_rtas_slot_error_detail - Retrieve error log through RTAS call
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* @pdn: device node
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* @severity: temporary or permanent error log
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* @driver_log: driver log to be combined with the retrieved error log
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@ -139,7 +139,7 @@ static unsigned long slot_resets;
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* This routine should be called to retrieve error log through the dedicated
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* RTAS call.
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*/
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static void rtas_slot_error_detail(struct pci_dn *pdn, int severity,
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static void eeh_rtas_slot_error_detail(struct pci_dn *pdn, int severity,
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char *driver_log, size_t loglen)
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{
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int config_addr;
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@ -170,7 +170,7 @@ static void rtas_slot_error_detail(struct pci_dn *pdn, int severity,
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}
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/**
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* gather_pci_data - Copy assorted PCI config space registers to buff
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* eeh_gather_pci_data - Copy assorted PCI config space registers to buff
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* @pdn: device to report data for
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* @buf: point to buffer in which to log
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* @len: amount of room in buffer
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@ -178,7 +178,7 @@ static void rtas_slot_error_detail(struct pci_dn *pdn, int severity,
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* This routine captures assorted PCI configuration space data,
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* and puts them into a buffer for RTAS error logging.
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*/
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static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
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static size_t eeh_gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
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{
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struct pci_dev *dev = pdn->pcidev;
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u32 cfg;
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@ -258,7 +258,7 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
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for_each_child_of_node(pdn->node, dn) {
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pdn = PCI_DN(dn);
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if (pdn)
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n += gather_pci_data(pdn, buf+n, len-n);
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n += eeh_gather_pci_data(pdn, buf+n, len-n);
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}
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}
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@ -280,23 +280,23 @@ void eeh_slot_error_detail(struct pci_dn *pdn, int severity)
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size_t loglen = 0;
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pci_regs_buf[0] = 0;
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rtas_pci_enable(pdn, EEH_THAW_MMIO);
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rtas_configure_bridge(pdn);
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eeh_pci_enable(pdn, EEH_THAW_MMIO);
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eeh_configure_bridge(pdn);
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eeh_restore_bars(pdn);
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loglen = gather_pci_data(pdn, pci_regs_buf, EEH_PCI_REGS_LOG_LEN);
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loglen = eeh_gather_pci_data(pdn, pci_regs_buf, EEH_PCI_REGS_LOG_LEN);
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rtas_slot_error_detail(pdn, severity, pci_regs_buf, loglen);
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eeh_rtas_slot_error_detail(pdn, severity, pci_regs_buf, loglen);
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}
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/**
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* read_slot_reset_state - Read the reset state of a device node's slot
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* eeh_read_slot_reset_state - Read the reset state of a device node's slot
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* @dn: device node to read
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* @rets: array to return results in
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*
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* Read the reset state of a device node's slot through platform dependent
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* function call.
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*/
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static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
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static int eeh_read_slot_reset_state(struct pci_dn *pdn, int rets[])
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{
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int token, outputs;
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int config_addr;
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@ -332,15 +332,14 @@ static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
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* the max allowed wait time is exceeded, in which case
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* a -2 is returned.
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*/
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int
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eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs)
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int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs)
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{
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int rc;
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int rets[3];
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int mwait;
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while (1) {
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rc = read_slot_reset_state(pdn, rets);
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rc = eeh_read_slot_reset_state(pdn, rets);
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if (rc) return rc;
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if (rets[1] == 0) return -1; /* EEH is not supported */
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@ -389,12 +388,12 @@ static inline unsigned long eeh_token_to_phys(unsigned long token)
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}
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/**
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* find_device_pe - Retrieve the PE for the given device
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* eeh_find_device_pe - Retrieve the PE for the given device
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* @dn: device node
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*
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* Return the PE under which this device lies
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*/
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struct device_node * find_device_pe(struct device_node *dn)
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struct device_node *eeh_find_device_pe(struct device_node *dn)
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{
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while ((dn->parent) && PCI_DN(dn->parent) &&
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(PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
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@ -445,7 +444,7 @@ static void __eeh_mark_slot(struct device_node *parent, int mode_flag)
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void eeh_mark_slot(struct device_node *dn, int mode_flag)
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{
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struct pci_dev *dev;
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dn = find_device_pe(dn);
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dn = eeh_find_device_pe(dn);
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/* Back up one, since config addrs might be shared */
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if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
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@ -493,7 +492,7 @@ void eeh_clear_slot(struct device_node *dn, int mode_flag)
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unsigned long flags;
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raw_spin_lock_irqsave(&confirm_error_lock, flags);
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dn = find_device_pe(dn);
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dn = eeh_find_device_pe(dn);
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/* Back up one, since config addrs might be shared */
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if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
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@ -538,7 +537,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
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no_dn++;
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return 0;
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}
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dn = find_device_pe(dn);
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dn = eeh_find_device_pe(dn);
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pdn = PCI_DN(dn);
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/* Access to IO BARs might get this far and still not want checking. */
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@ -585,11 +584,11 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
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* function zero of a multi-function device.
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* In any case they must share a common PHB.
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*/
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ret = read_slot_reset_state(pdn, rets);
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ret = eeh_read_slot_reset_state(pdn, rets);
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/* If the call to firmware failed, punt */
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if (ret != 0) {
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printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
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printk(KERN_WARNING "EEH: eeh_read_slot_reset_state() failed; rc=%d dn=%s\n",
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ret, dn->full_name);
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false_positives++;
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pdn->eeh_false_positives ++;
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@ -687,15 +686,14 @@ EXPORT_SYMBOL(eeh_check_failure);
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/**
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* rtas_pci_enable - Enable MMIO or DMA transfers for this slot
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* eeh_pci_enable - Enable MMIO or DMA transfers for this slot
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* @pdn pci device node
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*
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* This routine should be called to reenable frozen MMIO or DMA
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* so that it would work correctly again. It's useful while doing
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* recovery or log collection on the indicated device.
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*/
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int
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rtas_pci_enable(struct pci_dn *pdn, int function)
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int eeh_pci_enable(struct pci_dn *pdn, int function)
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{
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int config_addr;
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int rc;
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@ -723,7 +721,7 @@ rtas_pci_enable(struct pci_dn *pdn, int function)
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}
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/**
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* rtas_pci_slot_reset - Raises/Lowers the pci #RST line
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* eeh_slot_reset - Raises/Lowers the pci #RST line
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* @pdn: pci device node
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* @state: 1/0 to raise/lower the #RST
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*
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@ -732,8 +730,7 @@ rtas_pci_enable(struct pci_dn *pdn, int function)
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* and drops the #RST line if 'state is '0'. This routine is
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* safe to call in an interrupt context.
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*/
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static void
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rtas_pci_slot_reset(struct pci_dn *pdn, int state)
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static void eeh_slot_reset(struct pci_dn *pdn, int state)
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{
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int config_addr;
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int rc;
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@ -786,13 +783,13 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
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switch (state) {
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case pcie_deassert_reset:
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rtas_pci_slot_reset(pdn, 0);
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eeh_slot_reset(pdn, 0);
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break;
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case pcie_hot_reset:
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rtas_pci_slot_reset(pdn, 1);
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eeh_slot_reset(pdn, 1);
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break;
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case pcie_warm_reset:
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rtas_pci_slot_reset(pdn, 3);
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eeh_slot_reset(pdn, 3);
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break;
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default:
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return -EINVAL;
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@ -839,7 +836,7 @@ void __eeh_set_pe_freset(struct device_node *parent, unsigned int *freset)
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void eeh_set_pe_freset(struct device_node *dn, unsigned int *freset)
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{
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struct pci_dev *dev;
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dn = find_device_pe(dn);
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dn = eeh_find_device_pe(dn);
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/* Back up one, since config addrs might be shared */
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if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
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@ -853,12 +850,12 @@ void eeh_set_pe_freset(struct device_node *dn, unsigned int *freset)
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}
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/**
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* __rtas_set_slot_reset - Assert the pci #RST line for 1/4 second
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* eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
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* @pdn: pci device node to be reset.
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*
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* Assert the PCI #RST line for 1/4 second.
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*/
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static void __rtas_set_slot_reset(struct pci_dn *pdn)
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static void eeh_reset_pe_once(struct pci_dn *pdn)
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{
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unsigned int freset = 0;
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@ -871,9 +868,9 @@ static void __rtas_set_slot_reset(struct pci_dn *pdn)
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eeh_set_pe_freset(pdn->node, &freset);
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if (freset)
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rtas_pci_slot_reset(pdn, 3);
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eeh_slot_reset(pdn, 3);
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else
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rtas_pci_slot_reset(pdn, 1);
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eeh_slot_reset(pdn, 1);
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/* The PCI bus requires that the reset be held high for at least
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* a 100 milliseconds. We wait a bit longer 'just in case'.
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@ -887,7 +884,7 @@ static void __rtas_set_slot_reset(struct pci_dn *pdn)
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*/
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eeh_clear_slot(pdn->node, EEH_MODE_ISOLATED);
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rtas_pci_slot_reset(pdn, 0);
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eeh_slot_reset(pdn, 0);
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/* After a PCI slot has been reset, the PCI Express spec requires
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* a 1.5 second idle time for the bus to stabilize, before starting
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@ -898,20 +895,20 @@ static void __rtas_set_slot_reset(struct pci_dn *pdn)
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}
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/**
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* rtas_set_slot_reset - Reset the indicated PE
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* eeh_reset_pe - Reset the indicated PE
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* @pdn: PCI device node
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*
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* This routine should be called to reset indicated device, including
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* PE. A PE might include multiple PCI devices and sometimes PCI bridges
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* might be involved as well.
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*/
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int rtas_set_slot_reset(struct pci_dn *pdn)
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int eeh_reset_pe(struct pci_dn *pdn)
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{
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int i, rc;
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/* Take three shots at resetting the bus */
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for (i=0; i<3; i++) {
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__rtas_set_slot_reset(pdn);
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eeh_reset_pe_once(pdn);
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rc = eeh_wait_for_slot_status(pdn, PCI_BUS_RESET_WAIT_MSEC);
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if (rc == 0)
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@ -938,14 +935,14 @@ int rtas_set_slot_reset(struct pci_dn *pdn)
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*/
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/**
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* __restore_bars - Restore the Base Address Registers
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* eeh_restore_one_device_bars - Restore the Base Address Registers for one device
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* @pdn: pci device node
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*
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* Loads the PCI configuration space base address registers,
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* the expansion ROM base address, the latency timer, and etc.
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* from the saved values in the device node.
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*/
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static inline void __restore_bars(struct pci_dn *pdn)
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static inline void eeh_restore_one_device_bars(struct pci_dn *pdn)
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{
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int i;
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u32 cmd;
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@ -999,7 +996,7 @@ void eeh_restore_bars(struct pci_dn *pdn)
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return;
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if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
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__restore_bars(pdn);
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eeh_restore_one_device_bars(pdn);
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for_each_child_of_node(pdn->node, dn)
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eeh_restore_bars(PCI_DN(dn));
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@ -1026,15 +1023,14 @@ static void eeh_save_bars(struct pci_dn *pdn)
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}
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/**
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* rtas_configure_bridge - Configure PCI bridges for the indicated PE
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* eeh_configure_bridge - Configure PCI bridges for the indicated PE
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* @pdn: PCI device node
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*
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* PCI bridges might be included in PE. In order to make the PE work
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* again. The included PCI bridges should be recovered after the PE
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* encounters frozen state.
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*/
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void
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rtas_configure_bridge(struct pci_dn *pdn)
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void eeh_configure_bridge(struct pci_dn *pdn)
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{
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int config_addr;
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int rc;
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@ -1069,7 +1065,7 @@ struct eeh_early_enable_info {
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};
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/**
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* get_pe_addr - Retrieve PE address with given BDF address
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* eeh_get_pe_addr - Retrieve PE address with given BDF address
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* @config_addr: BDF address
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* @info: BUID of the associated PHB
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*
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@ -1079,7 +1075,7 @@ struct eeh_early_enable_info {
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* the given BDF address. Further more, we prefer PE address on BDF
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* address in EEH core components.
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*/
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static int get_pe_addr(int config_addr,
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static int eeh_get_pe_addr(int config_addr,
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struct eeh_early_enable_info *info)
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{
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unsigned int rets[3];
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@ -1112,7 +1108,7 @@ static int get_pe_addr(int config_addr,
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}
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/**
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* early_enable_eeh - Early enable EEH on the indicated device
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* eeh_early_enable - Early enable EEH on the indicated device
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* @dn: device node
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* @data: BUID
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*
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@ -1120,7 +1116,7 @@ static int get_pe_addr(int config_addr,
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* is expected to be called before real PCI probing is done. However,
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* the PHBs have been initialized at this point.
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*/
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static void *early_enable_eeh(struct device_node *dn, void *data)
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static void *eeh_early_enable(struct device_node *dn, void *data)
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{
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unsigned int rets[3];
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struct eeh_early_enable_info *info = data;
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@ -1170,14 +1166,14 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
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/* If the newer, better, ibm,get-config-addr-info is supported,
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* then use that instead.
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*/
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pdn->eeh_pe_config_addr = get_pe_addr(pdn->eeh_config_addr, info);
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pdn->eeh_pe_config_addr = eeh_get_pe_addr(pdn->eeh_config_addr, info);
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/* Some older systems (Power4) allow the
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* ibm,set-eeh-option call to succeed even on nodes
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* where EEH is not supported. Verify support
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* explicitly.
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*/
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ret = read_slot_reset_state(pdn, rets);
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ret = eeh_read_slot_reset_state(pdn, rets);
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if ((ret == 0) && (rets[1] == 1))
|
||||
enable = 1;
|
||||
}
|
||||
|
@ -1272,7 +1268,7 @@ void __init eeh_init(void)
|
|||
|
||||
info.buid_lo = BUID_LO(buid);
|
||||
info.buid_hi = BUID_HI(buid);
|
||||
traverse_pci_devices(phb, early_enable_eeh, &info);
|
||||
traverse_pci_devices(phb, eeh_early_enable, &info);
|
||||
}
|
||||
|
||||
if (eeh_subsystem_enabled)
|
||||
|
@ -1308,7 +1304,7 @@ static void eeh_add_device_early(struct device_node *dn)
|
|||
|
||||
info.buid_hi = BUID_HI(phb->buid);
|
||||
info.buid_lo = BUID_LO(phb->buid);
|
||||
early_enable_eeh(dn, &info);
|
||||
eeh_early_enable(dn, &info);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -282,7 +282,7 @@ static int eeh_reset_device (struct pci_dn *pe_dn, struct pci_bus *bus)
|
|||
/* Reset the pci controller. (Asserts RST#; resets config space).
|
||||
* Reconfigure bridges and devices. Don't try to bring the system
|
||||
* up if the reset failed for some reason. */
|
||||
rc = rtas_set_slot_reset(pe_dn);
|
||||
rc = eeh_reset_pe(pe_dn);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
@ -295,7 +295,7 @@ static int eeh_reset_device (struct pci_dn *pe_dn, struct pci_bus *bus)
|
|||
struct pci_dn *ppe = PCI_DN(dn);
|
||||
/* On Power4, always true because eeh_pe_config_addr=0 */
|
||||
if (pe_dn->eeh_pe_config_addr == ppe->eeh_pe_config_addr) {
|
||||
rtas_configure_bridge(ppe);
|
||||
eeh_configure_bridge(ppe);
|
||||
eeh_restore_bars(ppe);
|
||||
}
|
||||
dn = dn->sibling;
|
||||
|
@ -330,7 +330,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
|
|||
enum pci_ers_result result = PCI_ERS_RESULT_NONE;
|
||||
const char *location, *pci_str, *drv_str, *bus_pci_str, *bus_drv_str;
|
||||
|
||||
frozen_dn = find_device_pe(event->dn);
|
||||
frozen_dn = eeh_find_device_pe(event->dn);
|
||||
if (!frozen_dn) {
|
||||
|
||||
location = of_get_property(event->dn, "ibm,loc-code", NULL);
|
||||
|
@ -422,7 +422,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
|
|||
|
||||
/* If all devices reported they can proceed, then re-enable MMIO */
|
||||
if (result == PCI_ERS_RESULT_CAN_RECOVER) {
|
||||
rc = rtas_pci_enable(frozen_pdn, EEH_THAW_MMIO);
|
||||
rc = eeh_pci_enable(frozen_pdn, EEH_THAW_MMIO);
|
||||
|
||||
if (rc < 0)
|
||||
goto hard_fail;
|
||||
|
@ -436,7 +436,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
|
|||
|
||||
/* If all devices reported they can proceed, then re-enable DMA */
|
||||
if (result == PCI_ERS_RESULT_CAN_RECOVER) {
|
||||
rc = rtas_pci_enable(frozen_pdn, EEH_THAW_DMA);
|
||||
rc = eeh_pci_enable(frozen_pdn, EEH_THAW_DMA);
|
||||
|
||||
if (rc < 0)
|
||||
goto hard_fail;
|
||||
|
|
|
@ -217,7 +217,7 @@ static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
|
|||
if (!dn)
|
||||
return NULL;
|
||||
|
||||
dn = find_device_pe(dn);
|
||||
dn = eeh_find_device_pe(dn);
|
||||
if (!dn)
|
||||
return NULL;
|
||||
|
||||
|
|
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Ссылка в новой задаче