drm/i915: Remove some post-commit members from intel_crtc->atomic, v3.
fb_bits is useful to have in the crtc_state for cs flips when the code is updated to use intel_frontbuffer_flip_prepare/complete. So calculate it in advance and move it to crtc_state. The other stuff can be calculated in post_plane_update, and aren't useful elsewhere. Changes since v1: - Changing wording, remove comment about loop. Changes since v2: - Rebase. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/1457516145-32117-1-git-send-email-maarten.lankhorst@linux.intel.com
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cd202f69d8
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@ -100,6 +100,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
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crtc_state->update_wm_post = false;
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crtc_state->fb_changed = false;
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crtc_state->wm.need_postvbl_update = false;
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crtc_state->fb_bits = 0;
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return &crtc_state->base;
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}
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@ -4669,14 +4669,20 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc)
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}
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}
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static void intel_post_plane_update(struct intel_crtc *crtc)
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static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
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struct drm_atomic_state *old_state = old_crtc_state->base.state;
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struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
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struct intel_crtc_state *pipe_config =
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to_intel_crtc_state(crtc->base.state);
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_plane *primary = crtc->base.primary;
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struct drm_plane_state *old_pri_state =
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drm_atomic_get_existing_plane_state(old_state, primary);
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intel_frontbuffer_flip(dev, atomic->fb_bits);
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intel_frontbuffer_flip(dev, pipe_config->fb_bits);
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crtc->wm.cxsr_allowed = true;
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@ -4686,8 +4692,17 @@ static void intel_post_plane_update(struct intel_crtc *crtc)
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if (atomic->update_fbc)
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intel_fbc_post_update(crtc);
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if (atomic->post_enable_primary)
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intel_post_enable_primary(&crtc->base);
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if (old_pri_state) {
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struct intel_plane_state *primary_state =
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to_intel_plane_state(primary->state);
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struct intel_plane_state *old_primary_state =
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to_intel_plane_state(old_pri_state);
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if (primary_state->visible &&
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(needs_modeset(&pipe_config->base) ||
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!old_primary_state->visible))
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intel_post_enable_primary(&crtc->base);
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}
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memset(atomic, 0, sizeof(*atomic));
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}
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@ -11830,12 +11845,10 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
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to_intel_crtc_state(crtc_state)->wm.need_postvbl_update = true;
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if (visible || was_visible)
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intel_crtc->atomic.fb_bits |=
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to_intel_plane(plane)->frontbuffer_bit;
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pipe_config->fb_bits |= to_intel_plane(plane)->frontbuffer_bit;
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switch (plane->type) {
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case DRM_PLANE_TYPE_PRIMARY:
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intel_crtc->atomic.post_enable_primary = turn_on;
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intel_crtc->atomic.update_fbc = true;
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break;
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@ -13625,7 +13638,7 @@ static int intel_atomic_commit(struct drm_device *dev,
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intel_atomic_wait_for_vblanks(dev, dev_priv, crtc_vblank_mask);
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for_each_crtc_in_state(state, crtc, old_crtc_state, i) {
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intel_post_plane_update(to_intel_crtc(crtc));
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intel_post_plane_update(to_intel_crtc_state(old_crtc_state));
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if (put_domains[i])
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modeset_put_power_domains(dev_priv, put_domains[i]);
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@ -418,6 +418,7 @@ struct intel_crtc_state {
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#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
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unsigned long quirks;
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unsigned fb_bits; /* framebuffers to flip */
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bool update_pipe; /* can a fast modeset be performed? */
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bool disable_cxsr;
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bool update_wm_pre, update_wm_post; /* watermarks are updated */
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@ -605,10 +606,6 @@ struct intel_crtc_atomic_commit {
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/* Sleepable operations to perform before commit */
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/* Sleepable operations to perform after commit */
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unsigned fb_bits;
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bool post_enable_primary;
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/* Sleepable operations to perform before and after commit */
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bool update_fbc;
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};
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