ARM: plat-pxa: remove use of seq_printf return value
The seq_printf return value, because it's frequently misused,
(as it is here, it doesn't return # of chars emitted) will
eventually be converted to void.
See: commit 1f33c41c03 ("seq_file: Rename seq_overflow() to
seq_has_overflowed() and make public")
Signed-off-by: Joe Perches <joe@perches.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Joe Perches
Linus Torvalds
Родитель
4122669e52
Коммит
cd2b2937c6
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@ -51,19 +51,19 @@ static struct dentry *dbgfs_root, *dbgfs_state, **dbgfs_chan;
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static int dbg_show_requester_chan(struct seq_file *s, void *p)
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{
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int pos = 0;
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int chan = (int)s->private;
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int i;
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u32 drcmr;
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pos += seq_printf(s, "DMA channel %d requesters list :\n", chan);
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seq_printf(s, "DMA channel %d requesters list :\n", chan);
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for (i = 0; i < DMA_MAX_REQUESTERS; i++) {
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drcmr = DRCMR(i);
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if ((drcmr & DRCMR_CHLNUM) == chan)
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pos += seq_printf(s, "\tRequester %d (MAPVLD=%d)\n", i,
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!!(drcmr & DRCMR_MAPVLD));
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seq_printf(s, "\tRequester %d (MAPVLD=%d)\n",
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i, !!(drcmr & DRCMR_MAPVLD));
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}
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return pos;
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return 0;
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}
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static inline int dbg_burst_from_dcmd(u32 dcmd)
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@ -83,7 +83,6 @@ static int is_phys_valid(unsigned long addr)
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static int dbg_show_descriptors(struct seq_file *s, void *p)
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{
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int pos = 0;
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int chan = (int)s->private;
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int i, max_show = 20, burst, width;
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u32 dcmd;
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@ -94,44 +93,43 @@ static int dbg_show_descriptors(struct seq_file *s, void *p)
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spin_lock_irqsave(&dma_channels[chan].lock, flags);
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phys_desc = DDADR(chan);
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pos += seq_printf(s, "DMA channel %d descriptors :\n", chan);
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pos += seq_printf(s, "[%03d] First descriptor unknown\n", 0);
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seq_printf(s, "DMA channel %d descriptors :\n", chan);
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seq_printf(s, "[%03d] First descriptor unknown\n", 0);
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for (i = 1; i < max_show && is_phys_valid(phys_desc); i++) {
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desc = phys_to_virt(phys_desc);
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dcmd = desc->dcmd;
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burst = dbg_burst_from_dcmd(dcmd);
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width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
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pos += seq_printf(s, "[%03d] Desc at %08lx(virt %p)\n",
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i, phys_desc, desc);
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pos += seq_printf(s, "\tDDADR = %08x\n", desc->ddadr);
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pos += seq_printf(s, "\tDSADR = %08x\n", desc->dsadr);
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pos += seq_printf(s, "\tDTADR = %08x\n", desc->dtadr);
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pos += seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d"
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" width=%d len=%d)\n",
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dcmd,
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DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR),
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DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG),
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DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN),
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DCMD_STR(ENDIAN), burst, width,
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dcmd & DCMD_LENGTH);
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seq_printf(s, "[%03d] Desc at %08lx(virt %p)\n",
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i, phys_desc, desc);
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seq_printf(s, "\tDDADR = %08x\n", desc->ddadr);
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seq_printf(s, "\tDSADR = %08x\n", desc->dsadr);
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seq_printf(s, "\tDTADR = %08x\n", desc->dtadr);
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seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n",
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dcmd,
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DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR),
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DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG),
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DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN),
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DCMD_STR(ENDIAN), burst, width,
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dcmd & DCMD_LENGTH);
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phys_desc = desc->ddadr;
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}
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if (i == max_show)
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pos += seq_printf(s, "[%03d] Desc at %08lx ... max display reached\n",
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i, phys_desc);
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seq_printf(s, "[%03d] Desc at %08lx ... max display reached\n",
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i, phys_desc);
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else
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pos += seq_printf(s, "[%03d] Desc at %08lx is %s\n",
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i, phys_desc, phys_desc == DDADR_STOP ?
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"DDADR_STOP" : "invalid");
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seq_printf(s, "[%03d] Desc at %08lx is %s\n",
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i, phys_desc, phys_desc == DDADR_STOP ?
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"DDADR_STOP" : "invalid");
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spin_unlock_irqrestore(&dma_channels[chan].lock, flags);
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return pos;
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return 0;
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}
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static int dbg_show_chan_state(struct seq_file *s, void *p)
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{
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int pos = 0;
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int chan = (int)s->private;
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u32 dcsr, dcmd;
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int burst, width;
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@ -142,42 +140,39 @@ static int dbg_show_chan_state(struct seq_file *s, void *p)
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burst = dbg_burst_from_dcmd(dcmd);
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width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
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pos += seq_printf(s, "DMA channel %d\n", chan);
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pos += seq_printf(s, "\tPriority : %s\n",
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str_prio[dma_channels[chan].prio]);
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pos += seq_printf(s, "\tUnaligned transfer bit: %s\n",
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DALGN & (1 << chan) ? "yes" : "no");
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pos += seq_printf(s, "\tDCSR = %08x (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
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dcsr, DCSR_STR(RUN), DCSR_STR(NODESC),
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DCSR_STR(STOPIRQEN), DCSR_STR(EORIRQEN),
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DCSR_STR(EORJMPEN), DCSR_STR(EORSTOPEN),
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DCSR_STR(SETCMPST), DCSR_STR(CLRCMPST),
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DCSR_STR(CMPST), DCSR_STR(EORINTR), DCSR_STR(REQPEND),
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DCSR_STR(STOPSTATE), DCSR_STR(ENDINTR),
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DCSR_STR(STARTINTR), DCSR_STR(BUSERR));
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seq_printf(s, "DMA channel %d\n", chan);
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seq_printf(s, "\tPriority : %s\n", str_prio[dma_channels[chan].prio]);
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seq_printf(s, "\tUnaligned transfer bit: %s\n",
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DALGN & (1 << chan) ? "yes" : "no");
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seq_printf(s, "\tDCSR = %08x (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
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dcsr, DCSR_STR(RUN), DCSR_STR(NODESC),
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DCSR_STR(STOPIRQEN), DCSR_STR(EORIRQEN),
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DCSR_STR(EORJMPEN), DCSR_STR(EORSTOPEN),
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DCSR_STR(SETCMPST), DCSR_STR(CLRCMPST),
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DCSR_STR(CMPST), DCSR_STR(EORINTR), DCSR_STR(REQPEND),
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DCSR_STR(STOPSTATE), DCSR_STR(ENDINTR),
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DCSR_STR(STARTINTR), DCSR_STR(BUSERR));
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pos += seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d"
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" len=%d)\n",
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dcmd,
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DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR),
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DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG),
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DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN),
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DCMD_STR(ENDIAN), burst, width, dcmd & DCMD_LENGTH);
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pos += seq_printf(s, "\tDSADR = %08x\n", DSADR(chan));
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pos += seq_printf(s, "\tDTADR = %08x\n", DTADR(chan));
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pos += seq_printf(s, "\tDDADR = %08x\n", DDADR(chan));
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return pos;
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seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n",
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dcmd,
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DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR),
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DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG),
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DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN),
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DCMD_STR(ENDIAN), burst, width, dcmd & DCMD_LENGTH);
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seq_printf(s, "\tDSADR = %08x\n", DSADR(chan));
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seq_printf(s, "\tDTADR = %08x\n", DTADR(chan));
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seq_printf(s, "\tDDADR = %08x\n", DDADR(chan));
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return 0;
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}
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static int dbg_show_state(struct seq_file *s, void *p)
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{
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int pos = 0;
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/* basic device status */
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pos += seq_printf(s, "DMA engine status\n");
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pos += seq_printf(s, "\tChannel number: %d\n", num_dma_channels);
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seq_puts(s, "DMA engine status\n");
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seq_printf(s, "\tChannel number: %d\n", num_dma_channels);
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return pos;
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return 0;
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}
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#define DBGFS_FUNC_DECL(name) \
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