Blackfin arch: use the Blackfin on-chip ROM to do software reset when possible
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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/* Blackfin on-chip ROM API
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*
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* Copyright 2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __BFROM_H__
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#define __BFROM_H__
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#include <linux/types.h>
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/* Possible syscontrol action flags */
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#define SYSCTRL_READ 0x00000000 /* read registers */
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#define SYSCTRL_WRITE 0x00000001 /* write registers */
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#define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */
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#define SYSCTRL_CORERESET 0x00000004 /* perform core reset */
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#define SYSCTRL_SOFTRESET 0x00000006 /* perform core and system reset */
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#define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */
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#define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */
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#define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */
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#define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */
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#define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */
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#define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */
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#define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */
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#define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */
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typedef struct ADI_SYSCTRL_VALUES {
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uint16_t uwVrCtl;
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uint16_t uwPllCtl;
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uint16_t uwPllDiv;
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uint16_t uwPllLockCnt;
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uint16_t uwPllStat;
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} ADI_SYSCTRL_VALUES;
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static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)0xEF000038;
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/* We need a dedicated function since we need to screw with the stack pointer
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* when resetting. The on-chip ROM will save/restore registers on the stack
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* when doing a system reset, so the stack cannot be outside of the chip.
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*/
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__attribute__((__noreturn__))
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static inline void bfrom_SoftReset(void *new_stack)
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{
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while (1)
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__asm__ __volatile__(
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"sp = %[stack];"
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"jump (%[bfrom_syscontrol]);"
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: : [bfrom_syscontrol] "p"(bfrom_SysControl),
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"q0"(SYSCTRL_SOFTRESET),
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"q1"(0),
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"q2"(NULL),
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[stack] "p"(new_stack)
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);
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}
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/* OTP Functions */
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static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)0xEF000018;
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static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001A;
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static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001C;
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/* otp command: defines for "command" */
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#define OTP_INIT 0x00000001
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#define OTP_CLOSE 0x00000002
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/* otp read/write: defines for "flags" */
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#define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */
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#define OTP_UPPER_HALF 0x00000001
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#define OTP_NO_ECC 0x00000010 /* do not use ECC */
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#define OTP_LOCK 0x00000020 /* sets page protection bit for page */
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#define OTP_CHECK_FOR_PREV_WRITE 0x00000080
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/* Return values for all functions */
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#define OTP_SUCCESS 0x00000000
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#define OTP_MASTER_ERROR 0x001
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#define OTP_WRITE_ERROR 0x003
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#define OTP_READ_ERROR 0x005
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#define OTP_ACC_VIO_ERROR 0x009
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#define OTP_DATA_MULT_ERROR 0x011
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#define OTP_ECC_MULT_ERROR 0x021
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#define OTP_PREV_WR_ERROR 0x041
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#define OTP_DATA_SB_WARN 0x100
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#define OTP_ECC_SB_WARN 0x200
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#endif
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@ -10,6 +10,7 @@
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#include <asm/bfin-global.h>
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#include <asm/reboot.h>
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#include <asm/system.h>
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#include <asm/bfrom.h>
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/* A system soft reset makes external memory unusable so force
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* this function into L1. We use the compiler ssync here rather
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@ -74,7 +75,14 @@ void machine_restart(char *cmd)
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{
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native_machine_restart(cmd);
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local_irq_disable();
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bfin_reset();
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if (ANOMALY_05000353 || ANOMALY_05000386)
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bfin_reset();
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else
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/* the bootrom checks to see how it was reset and will
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* automatically perform a software reset for us when
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* it starts executing boot
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*/
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asm("raise 1;");
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}
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__attribute__((weak))
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