Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
This commit is contained in:
Коммит
cddb783552
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@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = {
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CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
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CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
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CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
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CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
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/* DSS domain clocks */
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/* DSS domain clocks */
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CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X),
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CLK("omapfb", "ick", &dss_ick, CK_243X | CK_242X),
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CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X),
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CLK("omapfb", "dss1_fck", &dss1_fck, CK_243X | CK_242X),
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CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X),
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CLK("omapfb", "dss2_fck", &dss2_fck, CK_243X | CK_242X),
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CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X),
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CLK("omapfb", "tv_fck", &dss_54m_fck, CK_243X | CK_242X),
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/* L3 domain clocks */
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/* L3 domain clocks */
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CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
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CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
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CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
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CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
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@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = {
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CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
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CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
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CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
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CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
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CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
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CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
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CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X),
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CLK("musb_hdrc", "ick", &usbhs_ick, CK_243X),
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CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X),
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CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X),
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CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X),
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CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X),
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CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X),
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CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X),
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@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = {
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CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X),
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CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X),
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CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X),
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CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X),
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CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X),
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CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X),
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CLK(NULL, "hsotgusb_ick", &hsotgusb_ick, CK_343X),
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CLK("musb_hdrc", "ick", &hsotgusb_ick, CK_343X),
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CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X),
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CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X),
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CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X),
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CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X),
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CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X),
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CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X),
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@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = {
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CLK("omap_rng", "ick", &rng_ick, CK_343X),
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CLK("omap_rng", "ick", &rng_ick, CK_343X),
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CLK(NULL, "sha11_ick", &sha11_ick, CK_343X),
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CLK(NULL, "sha11_ick", &sha11_ick, CK_343X),
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CLK(NULL, "des1_ick", &des1_ick, CK_343X),
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CLK(NULL, "des1_ick", &des1_ick, CK_343X),
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CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck, CK_343X),
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CLK("omapfb", "dss1_fck", &dss1_alwon_fck, CK_343X),
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CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_343X),
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CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X),
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CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_343X),
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CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X),
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CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_343X),
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CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X),
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CLK(NULL, "dss_ick", &dss_ick, CK_343X),
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CLK("omapfb", "ick", &dss_ick, CK_343X),
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CLK(NULL, "cam_mclk", &cam_mclk, CK_343X),
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CLK(NULL, "cam_mclk", &cam_mclk, CK_343X),
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CLK(NULL, "cam_ick", &cam_ick, CK_343X),
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CLK(NULL, "cam_ick", &cam_ick, CK_343X),
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CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X),
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CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X),
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@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = {
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static struct clk gpio1_dbck = {
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static struct clk gpio1_dbck = {
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.name = "gpio1_dbck",
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.name = "gpio1_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &wkup_32k_fck,
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.parent = &wkup_32k_fck,
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.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO1_SHIFT,
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.enable_bit = OMAP3430_EN_GPIO1_SHIFT,
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@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = {
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static struct clk gpio6_dbck = {
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static struct clk gpio6_dbck = {
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.name = "gpio6_dbck",
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.name = "gpio6_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO6_SHIFT,
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.enable_bit = OMAP3430_EN_GPIO6_SHIFT,
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@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = {
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static struct clk gpio5_dbck = {
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static struct clk gpio5_dbck = {
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.name = "gpio5_dbck",
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.name = "gpio5_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO5_SHIFT,
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.enable_bit = OMAP3430_EN_GPIO5_SHIFT,
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@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = {
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static struct clk gpio4_dbck = {
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static struct clk gpio4_dbck = {
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.name = "gpio4_dbck",
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.name = "gpio4_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO4_SHIFT,
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.enable_bit = OMAP3430_EN_GPIO4_SHIFT,
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@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = {
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static struct clk gpio3_dbck = {
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static struct clk gpio3_dbck = {
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.name = "gpio3_dbck",
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.name = "gpio3_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO3_SHIFT,
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.enable_bit = OMAP3430_EN_GPIO3_SHIFT,
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@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = {
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static struct clk gpio2_dbck = {
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static struct clk gpio2_dbck = {
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.name = "gpio2_dbck",
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.name = "gpio2_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO2_SHIFT,
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.enable_bit = OMAP3430_EN_GPIO2_SHIFT,
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@ -354,10 +354,12 @@ static void omap_init_mcspi(void)
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platform_device_register(&omap2_mcspi1);
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platform_device_register(&omap2_mcspi1);
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platform_device_register(&omap2_mcspi2);
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platform_device_register(&omap2_mcspi2);
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#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
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#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
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platform_device_register(&omap2_mcspi3);
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if (cpu_is_omap2430() || cpu_is_omap343x())
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platform_device_register(&omap2_mcspi3);
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#endif
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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#ifdef CONFIG_ARCH_OMAP3
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platform_device_register(&omap2_mcspi4);
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if (cpu_is_omap343x())
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platform_device_register(&omap2_mcspi4);
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#endif
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#endif
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}
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}
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@ -409,7 +409,7 @@
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/* PM_PREPWSTST_CAM specific bits */
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/* PM_PREPWSTST_CAM specific bits */
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/* PM_PWSTCTRL_USBHOST specific bits */
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/* PM_PWSTCTRL_USBHOST specific bits */
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#define OMAP3430ES2_SAVEANDRESTORE_SHIFT (1 << 4)
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#define OMAP3430ES2_SAVEANDRESTORE_SHIFT 4
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/* RM_RSTST_PER specific bits */
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/* RM_RSTST_PER specific bits */
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@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk)
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unsigned sysclk_ps;
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unsigned sysclk_ps;
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int status;
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int status;
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if (!refclk_psec || sysclk_ps == 0)
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if (!refclk_psec || fclk_ps == 0)
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return -ENODEV;
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return -ENODEV;
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sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
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sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
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@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void)
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config_invalid = 1;
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config_invalid = 1;
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return;
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return;
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}
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}
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if (rg.paddr)
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if (rg.paddr) {
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reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT);
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reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT);
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reserved += rg.size;
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reserved += rg.size;
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}
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omapfb_config.mem_desc.region[i] = rg;
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omapfb_config.mem_desc.region[i] = rg;
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configured_regions++;
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configured_regions++;
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}
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}
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@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio)
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return 0;
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return 0;
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if (cpu_is_omap24xx() && gpio < 128)
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if (cpu_is_omap24xx() && gpio < 128)
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return 0;
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return 0;
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if (cpu_is_omap34xx() && gpio < 160)
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if (cpu_is_omap34xx() && gpio < 192)
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return 0;
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return 0;
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return -1;
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return -1;
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}
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}
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@ -880,20 +880,22 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
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static int get_dss_clocks(void)
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static int get_dss_clocks(void)
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{
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{
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if (IS_ERR((dispc.dss_ick = clk_get(dispc.fbdev->dev, "dss_ick")))) {
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dispc.dss_ick = clk_get(dispc.fbdev->dev, "ick");
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dev_err(dispc.fbdev->dev, "can't get dss_ick\n");
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if (IS_ERR(dispc.dss_ick)) {
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dev_err(dispc.fbdev->dev, "can't get ick\n");
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return PTR_ERR(dispc.dss_ick);
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return PTR_ERR(dispc.dss_ick);
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}
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}
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if (IS_ERR((dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck")))) {
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dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck");
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if (IS_ERR(dispc.dss1_fck)) {
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dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
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dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
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clk_put(dispc.dss_ick);
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clk_put(dispc.dss_ick);
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return PTR_ERR(dispc.dss1_fck);
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return PTR_ERR(dispc.dss1_fck);
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}
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}
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if (IS_ERR((dispc.dss_54m_fck =
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dispc.dss_54m_fck = clk_get(dispc.fbdev->dev, "tv_fck");
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clk_get(dispc.fbdev->dev, "dss_54m_fck")))) {
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if (IS_ERR(dispc.dss_54m_fck)) {
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dev_err(dispc.fbdev->dev, "can't get dss_54m_fck\n");
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dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
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clk_put(dispc.dss_ick);
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clk_put(dispc.dss_ick);
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clk_put(dispc.dss1_fck);
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clk_put(dispc.dss1_fck);
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return PTR_ERR(dispc.dss_54m_fck);
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return PTR_ERR(dispc.dss_54m_fck);
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@ -83,12 +83,14 @@ static inline u32 rfbi_read_reg(int idx)
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static int rfbi_get_clocks(void)
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static int rfbi_get_clocks(void)
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{
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{
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if (IS_ERR((rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "dss_ick")))) {
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rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "ick");
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dev_err(rfbi.fbdev->dev, "can't get dss_ick\n");
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if (IS_ERR(rfbi.dss_ick)) {
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dev_err(rfbi.fbdev->dev, "can't get ick\n");
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return PTR_ERR(rfbi.dss_ick);
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return PTR_ERR(rfbi.dss_ick);
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}
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}
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if (IS_ERR((rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck")))) {
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rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck");
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if (IS_ERR(rfbi.dss1_fck)) {
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dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
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dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
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clk_put(rfbi.dss_ick);
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clk_put(rfbi.dss_ick);
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return PTR_ERR(rfbi.dss1_fck);
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return PTR_ERR(rfbi.dss1_fck);
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