spi/bcm63xx: convert to the pump message infrastructure
This patch converts the bcm63xx SPI driver to use the SPI infrastructure pump message queue. Since we were previously sleeping in the SPI driver's transfer() function (which is not allowed) this is now fixed as well. To complete that conversion a certain number of changes have been made: - the transfer len is split into multiple hardware transfers in case its size is bigger than the hardware FIFO size - the FIFO refill is no longer done in the interrupt context, which was a bad idea leading to quick interrupt handler re-entrancy Tested-by: Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Florian Fainelli
Grant Likely
Родитель
d4b9b578cb
Коммит
cde4384e10
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@ -1,7 +1,7 @@
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/*
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* Broadcom BCM63xx SPI controller support
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*
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* Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
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* Copyright (C) 2009-2012 Florian Fainelli <florian@openwrt.org>
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* Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
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*
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* This program is free software; you can redistribute it and/or
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@ -30,6 +30,8 @@
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#include <linux/spi/spi.h>
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#include <linux/completion.h>
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#include <linux/err.h>
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#include <linux/workqueue.h>
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#include <linux/pm_runtime.h>
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#include <bcm63xx_dev_spi.h>
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@ -96,17 +98,12 @@ static const unsigned bcm63xx_spi_freq_table[SPI_CLK_MASK][2] = {
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{ 391000, SPI_CLK_0_391MHZ }
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};
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static int bcm63xx_spi_setup_transfer(struct spi_device *spi,
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struct spi_transfer *t)
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static int bcm63xx_spi_check_transfer(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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u8 bits_per_word;
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u8 clk_cfg, reg;
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u32 hz;
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int i;
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bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word;
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hz = (t) ? t->speed_hz : spi->max_speed_hz;
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if (bits_per_word != 8) {
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dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
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__func__, bits_per_word);
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@ -119,6 +116,19 @@ static int bcm63xx_spi_setup_transfer(struct spi_device *spi,
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return -EINVAL;
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}
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return 0;
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}
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static void bcm63xx_spi_setup_transfer(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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u32 hz;
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u8 clk_cfg, reg;
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int i;
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hz = (t) ? t->speed_hz : spi->max_speed_hz;
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/* Find the closest clock configuration */
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for (i = 0; i < SPI_CLK_MASK; i++) {
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if (hz <= bcm63xx_spi_freq_table[i][0]) {
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@ -139,8 +149,6 @@ static int bcm63xx_spi_setup_transfer(struct spi_device *spi,
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bcm_spi_writeb(bs, reg, SPI_CLK_CFG);
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dev_dbg(&spi->dev, "Setting clock register to %02x (hz %d)\n",
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clk_cfg, hz);
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return 0;
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}
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/* the spi->mode bits understood by this driver: */
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@ -165,7 +173,7 @@ static int bcm63xx_spi_setup(struct spi_device *spi)
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return -EINVAL;
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}
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ret = bcm63xx_spi_setup_transfer(spi, NULL);
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ret = bcm63xx_spi_check_transfer(spi, NULL);
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if (ret < 0) {
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dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
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spi->mode & ~MODEBITS);
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@ -190,28 +198,29 @@ static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs)
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bs->remaining_bytes -= size;
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}
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static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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static unsigned int bcm63xx_txrx_bufs(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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u16 msg_ctl;
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u16 cmd;
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/* Disable the CMD_DONE interrupt */
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bcm_spi_writeb(bs, 0, SPI_INT_MASK);
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dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
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t->tx_buf, t->rx_buf, t->len);
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/* Transmitter is inhibited */
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bs->tx_ptr = t->tx_buf;
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bs->rx_ptr = t->rx_buf;
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init_completion(&bs->done);
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if (t->tx_buf) {
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bs->remaining_bytes = t->len;
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bcm63xx_spi_fill_tx_fifo(bs);
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}
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/* Enable the command done interrupt which
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* we use to determine completion of a command */
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bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK);
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init_completion(&bs->done);
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/* Fill in the Message control register */
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msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT);
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@ -230,33 +239,76 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
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cmd |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT);
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bcm_spi_writew(bs, cmd, SPI_CMD);
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wait_for_completion(&bs->done);
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/* Disable the CMD_DONE interrupt */
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bcm_spi_writeb(bs, 0, SPI_INT_MASK);
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/* Enable the CMD_DONE interrupt */
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bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK);
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return t->len - bs->remaining_bytes;
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}
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static int bcm63xx_transfer(struct spi_device *spi, struct spi_message *m)
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static int bcm63xx_spi_prepare_transfer(struct spi_master *master)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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pm_runtime_get_sync(&bs->pdev->dev);
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return 0;
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}
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static int bcm63xx_spi_unprepare_transfer(struct spi_master *master)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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pm_runtime_put(&bs->pdev->dev);
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return 0;
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}
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static int bcm63xx_spi_transfer_one(struct spi_master *master,
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struct spi_message *m)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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struct spi_transfer *t;
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int ret = 0;
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if (unlikely(list_empty(&m->transfers)))
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return -EINVAL;
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if (bs->stopping)
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return -ESHUTDOWN;
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struct spi_device *spi = m->spi;
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int status = 0;
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unsigned int timeout = 0;
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list_for_each_entry(t, &m->transfers, transfer_list) {
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ret += bcm63xx_txrx_bufs(spi, t);
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unsigned int len = t->len;
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u8 rx_tail;
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status = bcm63xx_spi_check_transfer(spi, t);
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if (status < 0)
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goto exit;
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/* configure adapter for a new transfer */
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bcm63xx_spi_setup_transfer(spi, t);
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while (len) {
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/* send the data */
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len -= bcm63xx_txrx_bufs(spi, t);
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timeout = wait_for_completion_timeout(&bs->done, HZ);
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if (!timeout) {
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status = -ETIMEDOUT;
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goto exit;
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}
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/* read out all data */
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rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
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/* Read out all the data */
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if (rx_tail)
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memcpy_fromio(bs->rx_ptr, bs->rx_io, rx_tail);
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}
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m->actual_length += t->len;
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}
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exit:
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m->status = status;
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spi_finalize_current_message(master);
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m->complete(m->context);
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return ret;
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return 0;
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}
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/* This driver supports single master mode only. Hence
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@ -267,39 +319,15 @@ static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id)
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struct spi_master *master = (struct spi_master *)dev_id;
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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u8 intr;
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u16 cmd;
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/* Read interupts and clear them immediately */
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intr = bcm_spi_readb(bs, SPI_INT_STATUS);
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bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
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bcm_spi_writeb(bs, 0, SPI_INT_MASK);
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/* A tansfer completed */
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if (intr & SPI_INTR_CMD_DONE) {
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u8 rx_tail;
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rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
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/* Read out all the data */
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if (rx_tail)
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memcpy_fromio(bs->rx_ptr, bs->rx_io, rx_tail);
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/* See if there is more data to send */
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if (bs->remaining_bytes > 0) {
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bcm63xx_spi_fill_tx_fifo(bs);
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/* Start the transfer */
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bcm_spi_writew(bs, SPI_HD_W << SPI_MSG_TYPE_SHIFT,
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SPI_MSG_CTL);
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cmd = bcm_spi_readw(bs, SPI_CMD);
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cmd |= SPI_CMD_START_IMMEDIATE;
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cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
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bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK);
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bcm_spi_writew(bs, cmd, SPI_CMD);
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} else {
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complete(&bs->done);
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}
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}
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/* A transfer completed */
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if (intr & SPI_INTR_CMD_DONE)
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complete(&bs->done);
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return IRQ_HANDLED;
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}
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@ -345,7 +373,6 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev)
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}
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bs = spi_master_get_devdata(master);
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init_completion(&bs->done);
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platform_set_drvdata(pdev, master);
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bs->pdev = pdev;
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@ -379,7 +406,9 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev)
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master->bus_num = pdata->bus_num;
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master->num_chipselect = pdata->num_chipselect;
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master->setup = bcm63xx_spi_setup;
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master->transfer = bcm63xx_transfer;
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master->prepare_transfer_hardware = bcm63xx_spi_prepare_transfer;
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master->unprepare_transfer_hardware = bcm63xx_spi_unprepare_transfer;
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master->transfer_one_message = bcm63xx_spi_transfer_one;
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bs->speed_hz = pdata->speed_hz;
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bs->stopping = 0;
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bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
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