Merge branch 'for-rmk/barriers' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
This commit is contained in:
Коммит
cdf0bfb012
|
@ -29,6 +29,7 @@ modules.builtin
|
|||
*.bz2
|
||||
*.lzma
|
||||
*.xz
|
||||
*.lz4
|
||||
*.lzo
|
||||
*.patch
|
||||
*.gcno
|
||||
|
|
|
@ -0,0 +1,17 @@
|
|||
What: /sys/module/xen_blkback/parameters/max_buffer_pages
|
||||
Date: March 2013
|
||||
KernelVersion: 3.11
|
||||
Contact: Roger Pau Monné <roger.pau@citrix.com>
|
||||
Description:
|
||||
Maximum number of free pages to keep in each block
|
||||
backend buffer.
|
||||
|
||||
What: /sys/module/xen_blkback/parameters/max_persistent_grants
|
||||
Date: March 2013
|
||||
KernelVersion: 3.11
|
||||
Contact: Roger Pau Monné <roger.pau@citrix.com>
|
||||
Description:
|
||||
Maximum number of grants to map persistently in
|
||||
blkback. If the frontend tries to use more than
|
||||
max_persistent_grants, the LRU kicks in and starts
|
||||
removing 5% of max_persistent_grants every 100ms.
|
|
@ -0,0 +1,10 @@
|
|||
What: /sys/module/xen_blkfront/parameters/max
|
||||
Date: June 2013
|
||||
KernelVersion: 3.11
|
||||
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
Description:
|
||||
Maximum number of segments that the frontend will negotiate
|
||||
with the backend for indirect descriptors. The default value
|
||||
is 32 - higher value means more potential throughput but more
|
||||
memory usage. The backend picks the minimum of the frontend
|
||||
and its default backend value.
|
|
@ -84,7 +84,7 @@ X!Iinclude/linux/kobject.h
|
|||
|
||||
<sect1><title>Kernel utility functions</title>
|
||||
!Iinclude/linux/kernel.h
|
||||
!Ekernel/printk.c
|
||||
!Ekernel/printk/printk.c
|
||||
!Ekernel/panic.c
|
||||
!Ekernel/sys.c
|
||||
!Ekernel/rcupdate.c
|
||||
|
|
|
@ -46,29 +46,33 @@ you format your backing devices and cache device at the same time, you won't
|
|||
have to manually attach:
|
||||
make-bcache -B /dev/sda /dev/sdb -C /dev/sdc
|
||||
|
||||
To make bcache devices known to the kernel, echo them to /sys/fs/bcache/register:
|
||||
bcache-tools now ships udev rules, and bcache devices are known to the kernel
|
||||
immediately. Without udev, you can manually register devices like this:
|
||||
|
||||
echo /dev/sdb > /sys/fs/bcache/register
|
||||
echo /dev/sdc > /sys/fs/bcache/register
|
||||
|
||||
To register your bcache devices automatically, you could add something like
|
||||
this to an init script:
|
||||
Registering the backing device makes the bcache device show up in /dev; you can
|
||||
now format it and use it as normal. But the first time using a new bcache
|
||||
device, it'll be running in passthrough mode until you attach it to a cache.
|
||||
See the section on attaching.
|
||||
|
||||
echo /dev/sd* > /sys/fs/bcache/register_quiet
|
||||
The devices show up as:
|
||||
|
||||
It'll look for bcache superblocks and ignore everything that doesn't have one.
|
||||
/dev/bcache<N>
|
||||
|
||||
Registering the backing device makes the bcache show up in /dev; you can now
|
||||
format it and use it as normal. But the first time using a new bcache device,
|
||||
it'll be running in passthrough mode until you attach it to a cache. See the
|
||||
section on attaching.
|
||||
As well as (with udev):
|
||||
|
||||
The devices show up at /dev/bcacheN, and can be controlled via sysfs from
|
||||
/sys/block/bcacheN/bcache:
|
||||
/dev/bcache/by-uuid/<uuid>
|
||||
/dev/bcache/by-label/<label>
|
||||
|
||||
To get started:
|
||||
|
||||
mkfs.ext4 /dev/bcache0
|
||||
mount /dev/bcache0 /mnt
|
||||
|
||||
You can control bcache devices through sysfs at /sys/block/bcache<N>/bcache .
|
||||
|
||||
Cache devices are managed as sets; multiple caches per set isn't supported yet
|
||||
but will allow for mirroring of metadata and dirty data in the future. Your new
|
||||
cache set shows up as /sys/fs/bcache/<UUID>
|
||||
|
@ -80,11 +84,11 @@ must be attached to your cache set to enable caching. Attaching a backing
|
|||
device to a cache set is done thusly, with the UUID of the cache set in
|
||||
/sys/fs/bcache:
|
||||
|
||||
echo <UUID> > /sys/block/bcache0/bcache/attach
|
||||
echo <CSET-UUID> > /sys/block/bcache0/bcache/attach
|
||||
|
||||
This only has to be done once. The next time you reboot, just reregister all
|
||||
your bcache devices. If a backing device has data in a cache somewhere, the
|
||||
/dev/bcache# device won't be created until the cache shows up - particularly
|
||||
/dev/bcache<N> device won't be created until the cache shows up - particularly
|
||||
important if you have writeback caching turned on.
|
||||
|
||||
If you're booting up and your cache device is gone and never coming back, you
|
||||
|
@ -191,6 +195,9 @@ want for getting the best possible numbers when benchmarking.
|
|||
|
||||
SYSFS - BACKING DEVICE:
|
||||
|
||||
Available at /sys/block/<bdev>/bcache, /sys/block/bcache*/bcache and
|
||||
(if attached) /sys/fs/bcache/<cset-uuid>/bdev*
|
||||
|
||||
attach
|
||||
Echo the UUID of a cache set to this file to enable caching.
|
||||
|
||||
|
@ -300,6 +307,8 @@ cache_readaheads
|
|||
|
||||
SYSFS - CACHE SET:
|
||||
|
||||
Available at /sys/fs/bcache/<cset-uuid>
|
||||
|
||||
average_key_size
|
||||
Average data per key in the btree.
|
||||
|
||||
|
@ -390,6 +399,8 @@ trigger_gc
|
|||
|
||||
SYSFS - CACHE DEVICE:
|
||||
|
||||
Available at /sys/block/<cdev>/bcache
|
||||
|
||||
block_size
|
||||
Minimum granularity of writes - should match hardware sector size.
|
||||
|
||||
|
|
|
@ -98,6 +98,7 @@ clocks and IDs.
|
|||
fpm 83
|
||||
mpll_osc_sel 84
|
||||
mpll_sel 85
|
||||
spll_gate 86
|
||||
|
||||
Examples:
|
||||
|
||||
|
|
|
@ -26,6 +26,7 @@ est ESTeem Wireless Modems
|
|||
fsl Freescale Semiconductor
|
||||
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
|
||||
gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
|
||||
hisilicon Hisilicon Limited.
|
||||
hp Hewlett Packard
|
||||
ibm International Business Machines (IBM)
|
||||
idt Integrated Device Technologies, Inc.
|
||||
|
@ -43,6 +44,7 @@ nxp NXP Semiconductors
|
|||
onnn ON Semiconductor Corp.
|
||||
picochip Picochip Ltd
|
||||
powervr PowerVR (deprecated, use img)
|
||||
qca Qualcomm Atheros, Inc.
|
||||
qcom Qualcomm, Inc.
|
||||
ralink Mediatek/Ralink Technology Corp.
|
||||
ramtron Ramtron International
|
||||
|
|
|
@ -11,14 +11,14 @@ for non English (read: Japanese) speakers and is not intended as a
|
|||
fork. So if you have any comments or updates for this file, please try
|
||||
to update the original English file first.
|
||||
|
||||
Last Updated: 2011/03/31
|
||||
Last Updated: 2013/07/19
|
||||
==================================
|
||||
これは、
|
||||
linux-2.6.38/Documentation/HOWTO
|
||||
linux-3.10/Documentation/HOWTO
|
||||
の和訳です。
|
||||
|
||||
翻訳団体: JF プロジェクト < http://www.linux.or.jp/JF/ >
|
||||
翻訳日: 2011/3/28
|
||||
翻訳団体: JF プロジェクト < http://linuxjf.sourceforge.jp/ >
|
||||
翻訳日: 2013/7/19
|
||||
翻訳者: Tsugikazu Shibata <tshibata at ab dot jp dot nec dot com>
|
||||
校正者: 松倉さん <nbh--mats at nifty dot com>
|
||||
小林 雅典さん (Masanori Kobayasi) <zap03216 at nifty dot ne dot jp>
|
||||
|
@ -245,7 +245,7 @@ Linux カーネルソースツリーの中に含まれる、きれいにし、
|
|||
自己参照方式で、索引がついた web 形式で、ソースコードを参照することが
|
||||
できます。この最新の素晴しいカーネルコードのリポジトリは以下で見つかり
|
||||
ます-
|
||||
http://sosdg.org/~qiyong/lxr/
|
||||
http://lxr.linux.no/+trees
|
||||
|
||||
開発プロセス
|
||||
-----------------------
|
||||
|
@ -253,24 +253,24 @@ Linux カーネルソースツリーの中に含まれる、きれいにし、
|
|||
Linux カーネルの開発プロセスは現在幾つかの異なるメインカーネル「ブラン
|
||||
チ」と多数のサブシステム毎のカーネルブランチから構成されます。
|
||||
これらのブランチとは-
|
||||
- メインの 2.6.x カーネルツリー
|
||||
- 2.6.x.y -stable カーネルツリー
|
||||
- 2.6.x -git カーネルパッチ
|
||||
- メインの 3.x カーネルツリー
|
||||
- 3.x.y -stable カーネルツリー
|
||||
- 3.x -git カーネルパッチ
|
||||
- サブシステム毎のカーネルツリーとパッチ
|
||||
- 統合テストのための 2.6.x -next カーネルツリー
|
||||
- 統合テストのための 3.x -next カーネルツリー
|
||||
|
||||
2.6.x カーネルツリー
|
||||
3.x カーネルツリー
|
||||
-----------------
|
||||
|
||||
2.6.x カーネルは Linus Torvalds によってメンテナンスされ、kernel.org
|
||||
の pub/linux/kernel/v2.6/ ディレクトリに存在します。この開発プロセスは
|
||||
3.x カーネルは Linus Torvalds によってメンテナンスされ、kernel.org
|
||||
の pub/linux/kernel/v3.x/ ディレクトリに存在します。この開発プロセスは
|
||||
以下のとおり-
|
||||
|
||||
- 新しいカーネルがリリースされた直後に、2週間の特別期間が設けられ、
|
||||
この期間中に、メンテナ達は Linus に大きな差分を送ることができます。
|
||||
このような差分は通常 -next カーネルに数週間含まれてきたパッチです。
|
||||
大きな変更は git(カーネルのソース管理ツール、詳細は
|
||||
http://git-scm.com/ 参照) を使って送るのが好ましいやり方ですが、パッ
|
||||
http://git-scm.com/ 参照) を使って送るのが好ましいやり方ですが、パッ
|
||||
チファイルの形式のまま送るのでも十分です。
|
||||
|
||||
- 2週間後、-rc1 カーネルがリリースされ、この後にはカーネル全体の安定
|
||||
|
@ -302,20 +302,20 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
|
|||
実に認識されたバグの状況によりリリースされるのであり、前もって決めら
|
||||
れた計画によってリリースされるものではないからです。」
|
||||
|
||||
2.6.x.y -stable カーネルツリー
|
||||
3.x.y -stable カーネルツリー
|
||||
---------------------------
|
||||
|
||||
バージョン番号が4つの数字に分かれているカーネルは -stable カーネルです。
|
||||
これには、2.6.x カーネルで見つかったセキュリティ問題や重大な後戻りに対
|
||||
バージョン番号が3つの数字に分かれているカーネルは -stable カーネルです。
|
||||
これには、3.x カーネルで見つかったセキュリティ問題や重大な後戻りに対
|
||||
する比較的小さい重要な修正が含まれます。
|
||||
|
||||
これは、開発/実験的バージョンのテストに協力することに興味が無く、
|
||||
最新の安定したカーネルを使いたいユーザに推奨するブランチです。
|
||||
|
||||
もし、2.6.x.y カーネルが存在しない場合には、番号が一番大きい 2.6.x が
|
||||
もし、3.x.y カーネルが存在しない場合には、番号が一番大きい 3.x が
|
||||
最新の安定版カーネルです。
|
||||
|
||||
2.6.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必
|
||||
3.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必
|
||||
要に応じてリリースされます。通常のリリース期間は 2週間毎ですが、差し迫っ
|
||||
た問題がなければもう少し長くなることもあります。セキュリティ関連の問題
|
||||
の場合はこれに対してだいたいの場合、すぐにリリースがされます。
|
||||
|
@ -324,7 +324,7 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
|
|||
イルにはどのような種類の変更が -stable ツリーに受け入れ可能か、またリ
|
||||
リースプロセスがどう動くかが記述されています。
|
||||
|
||||
2.6.x -git パッチ
|
||||
3.x -git パッチ
|
||||
------------------
|
||||
|
||||
git リポジトリで管理されているLinus のカーネルツリーの毎日のスナップ
|
||||
|
@ -358,14 +358,14 @@ quilt シリーズとして公開されているパッチキューも使われ
|
|||
をつけることができます。大部分のこれらの patchwork のサイトは
|
||||
http://patchwork.kernel.org/ でリストされています。
|
||||
|
||||
統合テストのための 2.6.x -next カーネルツリー
|
||||
統合テストのための 3.x -next カーネルツリー
|
||||
---------------------------------------------
|
||||
|
||||
サブシステムツリーの更新内容がメインラインの 2.6.x ツリーにマージされ
|
||||
サブシステムツリーの更新内容がメインラインの 3.x ツリーにマージされ
|
||||
る前に、それらは統合テストされる必要があります。この目的のため、実質的
|
||||
に全サブシステムツリーからほぼ毎日プルされてできる特別なテスト用のリ
|
||||
ポジトリが存在します-
|
||||
http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git
|
||||
http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git
|
||||
http://linux.f-seidel.de/linux-next/pmwiki/
|
||||
|
||||
このやり方によって、-next カーネルは次のマージ機会でどんなものがメイン
|
||||
|
|
|
@ -52,7 +52,7 @@ Default: 64
|
|||
|
||||
busy_read
|
||||
----------------
|
||||
Low latency busy poll timeout for socket reads. (needs CONFIG_NET_LL_RX_POLL)
|
||||
Low latency busy poll timeout for socket reads. (needs CONFIG_NET_RX_BUSY_POLL)
|
||||
Approximate time in us to busy loop waiting for packets on the device queue.
|
||||
This sets the default value of the SO_BUSY_POLL socket option.
|
||||
Can be set or overridden per socket by setting socket option SO_BUSY_POLL,
|
||||
|
@ -63,7 +63,7 @@ Default: 0 (off)
|
|||
|
||||
busy_poll
|
||||
----------------
|
||||
Low latency busy poll timeout for poll and select. (needs CONFIG_NET_LL_RX_POLL)
|
||||
Low latency busy poll timeout for poll and select. (needs CONFIG_NET_RX_BUSY_POLL)
|
||||
Approximate time in us to busy loop waiting for events.
|
||||
Recommended value depends on the number of sockets you poll on.
|
||||
For several sockets 50, for several hundreds 100.
|
||||
|
|
50
MAINTAINERS
50
MAINTAINERS
|
@ -1406,7 +1406,7 @@ ATHEROS ATH6KL WIRELESS DRIVER
|
|||
M: Kalle Valo <kvalo@qca.qualcomm.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
W: http://wireless.kernel.org/en/users/Drivers/ath6kl
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath6kl.git
|
||||
T: git git://github.com/kvalo/ath.git
|
||||
S: Supported
|
||||
F: drivers/net/wireless/ath/ath6kl/
|
||||
|
||||
|
@ -1642,7 +1642,7 @@ S: Maintained
|
|||
F: drivers/net/hamradio/baycom*
|
||||
|
||||
BCACHE (BLOCK LAYER CACHE)
|
||||
M: Kent Overstreet <koverstreet@google.com>
|
||||
M: Kent Overstreet <kmo@daterainc.com>
|
||||
L: linux-bcache@vger.kernel.org
|
||||
W: http://bcache.evilpiepirate.org
|
||||
S: Maintained:
|
||||
|
@ -2871,7 +2871,7 @@ F: drivers/media/usb/dvb-usb-v2/dvb_usb*
|
|||
F: drivers/media/usb/dvb-usb-v2/usb_urb.c
|
||||
|
||||
DYNAMIC DEBUG
|
||||
M: Jason Baron <jbaron@redhat.com>
|
||||
M: Jason Baron <jbaron@akamai.com>
|
||||
S: Maintained
|
||||
F: lib/dynamic_debug.c
|
||||
F: include/linux/dynamic_debug.h
|
||||
|
@ -3346,7 +3346,7 @@ F: Documentation/firmware_class/
|
|||
F: drivers/base/firmware*.c
|
||||
F: include/linux/firmware.h
|
||||
|
||||
FLASHSYSTEM DRIVER (IBM FlashSystem 70/80 PCI SSD Flash Card)
|
||||
FLASH ADAPTER DRIVER (IBM Flash Adapter 900GB Full Height PCI Flash Card)
|
||||
M: Joshua Morris <josh.h.morris@us.ibm.com>
|
||||
M: Philip Kelleher <pjk1939@linux.vnet.ibm.com>
|
||||
S: Maintained
|
||||
|
@ -3622,11 +3622,9 @@ F: drivers/isdn/gigaset/
|
|||
F: include/uapi/linux/gigaset_dev.h
|
||||
|
||||
GPIO SUBSYSTEM
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
S: Maintained
|
||||
L: linux-gpio@vger.kernel.org
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
F: Documentation/gpio.txt
|
||||
F: drivers/gpio/
|
||||
F: include/linux/gpio*
|
||||
|
@ -4472,8 +4470,6 @@ F: drivers/irqchip/
|
|||
|
||||
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
|
||||
M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
|
||||
S: Maintained
|
||||
F: Documentation/IRQ-domain.txt
|
||||
F: include/linux/irqdomain.h
|
||||
|
@ -4990,7 +4986,7 @@ F: arch/powerpc/platforms/44x/
|
|||
|
||||
LINUX FOR POWERPC EMBEDDED XILINX VIRTEX
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Unmaintained
|
||||
S: Orphan
|
||||
F: arch/powerpc/*/*virtex*
|
||||
F: arch/powerpc/*/*/*virtex*
|
||||
|
||||
|
@ -5886,7 +5882,7 @@ OMAP DEVICE TREE SUPPORT
|
|||
M: Benoît Cousson <b-cousson@ti.com>
|
||||
M: Tony Lindgren <tony@atomide.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: devicetree@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/*omap*
|
||||
F: arch/arm/boot/dts/*am3*
|
||||
|
@ -6050,17 +6046,28 @@ F: drivers/i2c/busses/i2c-ocores.c
|
|||
OPEN FIRMWARE AND FLATTENED DEVICE TREE
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
M: Rob Herring <rob.herring@calxeda.com>
|
||||
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: devicetree@vger.kernel.org
|
||||
W: http://fdt.secretlab.ca
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
S: Maintained
|
||||
F: Documentation/devicetree
|
||||
F: drivers/of
|
||||
F: drivers/of/
|
||||
F: include/linux/of*.h
|
||||
F: scripts/dtc
|
||||
F: scripts/dtc/
|
||||
K: of_get_property
|
||||
K: of_match_table
|
||||
|
||||
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
|
||||
M: Rob Herring <rob.herring@calxeda.com>
|
||||
M: Pawel Moll <pawel.moll@arm.com>
|
||||
M: Mark Rutland <mark.rutland@arm.com>
|
||||
M: Stephen Warren <swarren@wwwdotorg.org>
|
||||
M: Ian Campbell <ian.campbell@citrix.com>
|
||||
L: devicetree@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/
|
||||
F: arch/*/boot/dts/
|
||||
F: include/dt-bindings/
|
||||
|
||||
OPENRISC ARCHITECTURE
|
||||
M: Jonas Bonn <jonas@southpole.se>
|
||||
W: http://openrisc.net
|
||||
|
@ -6719,6 +6726,14 @@ T: git git://linuxtv.org/anttip/media_tree.git
|
|||
S: Maintained
|
||||
F: drivers/media/tuners/qt1010*
|
||||
|
||||
QUALCOMM ATHEROS ATH10K WIRELESS DRIVER
|
||||
M: Kalle Valo <kvalo@qca.qualcomm.com>
|
||||
L: ath10k@lists.infradead.org
|
||||
W: http://wireless.kernel.org/en/users/Drivers/ath10k
|
||||
T: git git://github.com/kvalo/ath.git
|
||||
S: Supported
|
||||
F: drivers/net/wireless/ath/ath10k/
|
||||
|
||||
QUALCOMM HEXAGON ARCHITECTURE
|
||||
M: Richard Kuo <rkuo@codeaurora.org>
|
||||
L: linux-hexagon@vger.kernel.org
|
||||
|
@ -7746,7 +7761,6 @@ F: drivers/clk/spear/
|
|||
|
||||
SPI SUBSYSTEM
|
||||
M: Mark Brown <broonie@kernel.org>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
L: linux-spi@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
|
||||
Q: http://patchwork.kernel.org/project/spi-devel-general/list/
|
||||
|
@ -7812,7 +7826,7 @@ F: drivers/staging/asus_oled/
|
|||
|
||||
STAGING - COMEDI
|
||||
M: Ian Abbott <abbotti@mev.co.uk>
|
||||
M: Mori Hess <fmhess@users.sourceforge.net>
|
||||
M: H Hartley Sweeten <hsweeten@visionengravers.com>
|
||||
S: Odd Fixes
|
||||
F: drivers/staging/comedi/
|
||||
|
||||
|
@ -8264,7 +8278,7 @@ S: Maintained
|
|||
F: sound/soc/codecs/twl4030*
|
||||
|
||||
TI WILINK WIRELESS DRIVERS
|
||||
M: Luciano Coelho <coelho@ti.com>
|
||||
M: Luciano Coelho <luca@coelho.fi>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
W: http://wireless.kernel.org/en/users/Drivers/wl12xx
|
||||
W: http://wireless.kernel.org/en/users/Drivers/wl1251
|
||||
|
@ -9288,7 +9302,7 @@ S: Maintained
|
|||
F: drivers/net/ethernet/xilinx/xilinx_axienet*
|
||||
|
||||
XILINX SYSTEMACE DRIVER
|
||||
S: Unmaintained
|
||||
S: Orphan
|
||||
F: drivers/block/xsysace.c
|
||||
|
||||
XILINX UARTLITE SERIAL DRIVER
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 11
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Linux for Workgroups
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -15,6 +15,7 @@ config ALPHA
|
|||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
select ARCH_HAVE_NMI_SAFE_CMPXCHG
|
||||
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
||||
select GENERIC_SMP_IDLE_THREAD
|
||||
select GENERIC_CMOS_UPDATE
|
||||
select GENERIC_STRNCPY_FROM_USER
|
||||
|
|
|
@ -186,17 +186,24 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
|||
*/
|
||||
static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
|
||||
{
|
||||
int c, old;
|
||||
c = atomic_read(v);
|
||||
for (;;) {
|
||||
if (unlikely(c == (u)))
|
||||
break;
|
||||
old = atomic_cmpxchg((v), c, c + (a));
|
||||
if (likely(old == c))
|
||||
break;
|
||||
c = old;
|
||||
}
|
||||
return c;
|
||||
int c, new, old;
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldl_l %[old],%[mem]\n"
|
||||
" cmpeq %[old],%[u],%[c]\n"
|
||||
" addl %[old],%[a],%[new]\n"
|
||||
" bne %[c],2f\n"
|
||||
" stl_c %[new],%[mem]\n"
|
||||
" beq %[new],3f\n"
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: [old] "=&r"(old), [new] "=&r"(new), [c] "=&r"(c)
|
||||
: [mem] "m"(*v), [a] "rI"(a), [u] "rI"((long)u)
|
||||
: "memory");
|
||||
smp_mb();
|
||||
return old;
|
||||
}
|
||||
|
||||
|
||||
|
@ -207,21 +214,56 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
|
|||
* @u: ...unless v is equal to u.
|
||||
*
|
||||
* Atomically adds @a to @v, so long as it was not @u.
|
||||
* Returns the old value of @v.
|
||||
* Returns true iff @v was not @u.
|
||||
*/
|
||||
static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
|
||||
{
|
||||
long c, old;
|
||||
c = atomic64_read(v);
|
||||
for (;;) {
|
||||
if (unlikely(c == (u)))
|
||||
break;
|
||||
old = atomic64_cmpxchg((v), c, c + (a));
|
||||
if (likely(old == c))
|
||||
break;
|
||||
c = old;
|
||||
}
|
||||
return c != (u);
|
||||
long c, tmp;
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldq_l %[tmp],%[mem]\n"
|
||||
" cmpeq %[tmp],%[u],%[c]\n"
|
||||
" addq %[tmp],%[a],%[tmp]\n"
|
||||
" bne %[c],2f\n"
|
||||
" stq_c %[tmp],%[mem]\n"
|
||||
" beq %[tmp],3f\n"
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: [tmp] "=&r"(tmp), [c] "=&r"(c)
|
||||
: [mem] "m"(*v), [a] "rI"(a), [u] "rI"(u)
|
||||
: "memory");
|
||||
smp_mb();
|
||||
return !c;
|
||||
}
|
||||
|
||||
/*
|
||||
* atomic64_dec_if_positive - decrement by 1 if old value positive
|
||||
* @v: pointer of type atomic_t
|
||||
*
|
||||
* The function returns the old value of *v minus 1, even if
|
||||
* the atomic variable, v, was not decremented.
|
||||
*/
|
||||
static inline long atomic64_dec_if_positive(atomic64_t *v)
|
||||
{
|
||||
long old, tmp;
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldq_l %[old],%[mem]\n"
|
||||
" subq %[old],1,%[tmp]\n"
|
||||
" ble %[old],2f\n"
|
||||
" stq_c %[tmp],%[mem]\n"
|
||||
" beq %[tmp],3f\n"
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: [old] "=&r"(old), [tmp] "=&r"(tmp)
|
||||
: [mem] "m"(*v)
|
||||
: "memory");
|
||||
smp_mb();
|
||||
return old - 1;
|
||||
}
|
||||
|
||||
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
|
||||
|
|
|
@ -3,7 +3,9 @@
|
|||
|
||||
#include <uapi/asm/param.h>
|
||||
|
||||
#define HZ CONFIG_HZ
|
||||
#define USER_HZ HZ
|
||||
# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
|
||||
# undef HZ
|
||||
# define HZ CONFIG_HZ
|
||||
# define USER_HZ 1024
|
||||
# define CLOCKS_PER_SEC USER_HZ /* frequency at which times() counts */
|
||||
|
||||
#endif /* _ASM_ALPHA_PARAM_H */
|
||||
|
|
|
@ -168,8 +168,4 @@ static inline void arch_write_unlock(arch_rwlock_t * lock)
|
|||
#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
|
||||
#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
|
||||
|
||||
#define arch_spin_relax(lock) cpu_relax()
|
||||
#define arch_read_relax(lock) cpu_relax()
|
||||
#define arch_write_relax(lock) cpu_relax()
|
||||
|
||||
#endif /* _ALPHA_SPINLOCK_H */
|
||||
|
|
|
@ -3,8 +3,7 @@
|
|||
|
||||
#include <uapi/asm/unistd.h>
|
||||
|
||||
|
||||
#define NR_SYSCALLS 506
|
||||
#define NR_SYSCALLS 508
|
||||
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
#define __ARCH_WANT_STAT64
|
||||
|
|
|
@ -1,13 +1,7 @@
|
|||
#ifndef _UAPI_ASM_ALPHA_PARAM_H
|
||||
#define _UAPI_ASM_ALPHA_PARAM_H
|
||||
|
||||
/* ??? Gross. I don't want to parameterize this, and supposedly the
|
||||
hardware ignores reprogramming. We also need userland buy-in to the
|
||||
change in HZ, since this is visible in the wait4 resources etc. */
|
||||
|
||||
#ifndef __KERNEL__
|
||||
#define HZ 1024
|
||||
#endif
|
||||
|
||||
#define EXEC_PAGESIZE 8192
|
||||
|
||||
|
@ -17,5 +11,4 @@
|
|||
|
||||
#define MAXHOSTNAMELEN 64 /* max length of hostname */
|
||||
|
||||
|
||||
#endif /* _UAPI_ASM_ALPHA_PARAM_H */
|
||||
|
|
|
@ -467,5 +467,7 @@
|
|||
#define __NR_sendmmsg 503
|
||||
#define __NR_process_vm_readv 504
|
||||
#define __NR_process_vm_writev 505
|
||||
#define __NR_kcmp 506
|
||||
#define __NR_finit_module 507
|
||||
|
||||
#endif /* _UAPI_ALPHA_UNISTD_H */
|
||||
|
|
|
@ -12,11 +12,32 @@
|
|||
|
||||
.text
|
||||
.set noat
|
||||
.cfi_sections .debug_frame
|
||||
|
||||
/* Stack offsets. */
|
||||
#define SP_OFF 184
|
||||
#define SWITCH_STACK_SIZE 320
|
||||
|
||||
.macro CFI_START_OSF_FRAME func
|
||||
.align 4
|
||||
.globl \func
|
||||
.type \func,@function
|
||||
\func:
|
||||
.cfi_startproc simple
|
||||
.cfi_return_column 64
|
||||
.cfi_def_cfa $sp, 48
|
||||
.cfi_rel_offset 64, 8
|
||||
.cfi_rel_offset $gp, 16
|
||||
.cfi_rel_offset $16, 24
|
||||
.cfi_rel_offset $17, 32
|
||||
.cfi_rel_offset $18, 40
|
||||
.endm
|
||||
|
||||
.macro CFI_END_OSF_FRAME func
|
||||
.cfi_endproc
|
||||
.size \func, . - \func
|
||||
.endm
|
||||
|
||||
/*
|
||||
* This defines the normal kernel pt-regs layout.
|
||||
*
|
||||
|
@ -27,100 +48,158 @@
|
|||
* the palcode-provided values are available to the signal handler.
|
||||
*/
|
||||
|
||||
#define SAVE_ALL \
|
||||
subq $sp, SP_OFF, $sp; \
|
||||
stq $0, 0($sp); \
|
||||
stq $1, 8($sp); \
|
||||
stq $2, 16($sp); \
|
||||
stq $3, 24($sp); \
|
||||
stq $4, 32($sp); \
|
||||
stq $28, 144($sp); \
|
||||
lda $2, alpha_mv; \
|
||||
stq $5, 40($sp); \
|
||||
stq $6, 48($sp); \
|
||||
stq $7, 56($sp); \
|
||||
stq $8, 64($sp); \
|
||||
stq $19, 72($sp); \
|
||||
stq $20, 80($sp); \
|
||||
stq $21, 88($sp); \
|
||||
ldq $2, HAE_CACHE($2); \
|
||||
stq $22, 96($sp); \
|
||||
stq $23, 104($sp); \
|
||||
stq $24, 112($sp); \
|
||||
stq $25, 120($sp); \
|
||||
stq $26, 128($sp); \
|
||||
stq $27, 136($sp); \
|
||||
stq $2, 152($sp); \
|
||||
stq $16, 160($sp); \
|
||||
stq $17, 168($sp); \
|
||||
.macro SAVE_ALL
|
||||
subq $sp, SP_OFF, $sp
|
||||
.cfi_adjust_cfa_offset SP_OFF
|
||||
stq $0, 0($sp)
|
||||
stq $1, 8($sp)
|
||||
stq $2, 16($sp)
|
||||
stq $3, 24($sp)
|
||||
stq $4, 32($sp)
|
||||
stq $28, 144($sp)
|
||||
.cfi_rel_offset $0, 0
|
||||
.cfi_rel_offset $1, 8
|
||||
.cfi_rel_offset $2, 16
|
||||
.cfi_rel_offset $3, 24
|
||||
.cfi_rel_offset $4, 32
|
||||
.cfi_rel_offset $28, 144
|
||||
lda $2, alpha_mv
|
||||
stq $5, 40($sp)
|
||||
stq $6, 48($sp)
|
||||
stq $7, 56($sp)
|
||||
stq $8, 64($sp)
|
||||
stq $19, 72($sp)
|
||||
stq $20, 80($sp)
|
||||
stq $21, 88($sp)
|
||||
ldq $2, HAE_CACHE($2)
|
||||
stq $22, 96($sp)
|
||||
stq $23, 104($sp)
|
||||
stq $24, 112($sp)
|
||||
stq $25, 120($sp)
|
||||
stq $26, 128($sp)
|
||||
stq $27, 136($sp)
|
||||
stq $2, 152($sp)
|
||||
stq $16, 160($sp)
|
||||
stq $17, 168($sp)
|
||||
stq $18, 176($sp)
|
||||
.cfi_rel_offset $5, 40
|
||||
.cfi_rel_offset $6, 48
|
||||
.cfi_rel_offset $7, 56
|
||||
.cfi_rel_offset $8, 64
|
||||
.cfi_rel_offset $19, 72
|
||||
.cfi_rel_offset $20, 80
|
||||
.cfi_rel_offset $21, 88
|
||||
.cfi_rel_offset $22, 96
|
||||
.cfi_rel_offset $23, 104
|
||||
.cfi_rel_offset $24, 112
|
||||
.cfi_rel_offset $25, 120
|
||||
.cfi_rel_offset $26, 128
|
||||
.cfi_rel_offset $27, 136
|
||||
.endm
|
||||
|
||||
#define RESTORE_ALL \
|
||||
lda $19, alpha_mv; \
|
||||
ldq $0, 0($sp); \
|
||||
ldq $1, 8($sp); \
|
||||
ldq $2, 16($sp); \
|
||||
ldq $3, 24($sp); \
|
||||
ldq $21, 152($sp); \
|
||||
ldq $20, HAE_CACHE($19); \
|
||||
ldq $4, 32($sp); \
|
||||
ldq $5, 40($sp); \
|
||||
ldq $6, 48($sp); \
|
||||
ldq $7, 56($sp); \
|
||||
subq $20, $21, $20; \
|
||||
ldq $8, 64($sp); \
|
||||
beq $20, 99f; \
|
||||
ldq $20, HAE_REG($19); \
|
||||
stq $21, HAE_CACHE($19); \
|
||||
stq $21, 0($20); \
|
||||
99:; \
|
||||
ldq $19, 72($sp); \
|
||||
ldq $20, 80($sp); \
|
||||
ldq $21, 88($sp); \
|
||||
ldq $22, 96($sp); \
|
||||
ldq $23, 104($sp); \
|
||||
ldq $24, 112($sp); \
|
||||
ldq $25, 120($sp); \
|
||||
ldq $26, 128($sp); \
|
||||
ldq $27, 136($sp); \
|
||||
ldq $28, 144($sp); \
|
||||
.macro RESTORE_ALL
|
||||
lda $19, alpha_mv
|
||||
ldq $0, 0($sp)
|
||||
ldq $1, 8($sp)
|
||||
ldq $2, 16($sp)
|
||||
ldq $3, 24($sp)
|
||||
ldq $21, 152($sp)
|
||||
ldq $20, HAE_CACHE($19)
|
||||
ldq $4, 32($sp)
|
||||
ldq $5, 40($sp)
|
||||
ldq $6, 48($sp)
|
||||
ldq $7, 56($sp)
|
||||
subq $20, $21, $20
|
||||
ldq $8, 64($sp)
|
||||
beq $20, 99f
|
||||
ldq $20, HAE_REG($19)
|
||||
stq $21, HAE_CACHE($19)
|
||||
stq $21, 0($20)
|
||||
99: ldq $19, 72($sp)
|
||||
ldq $20, 80($sp)
|
||||
ldq $21, 88($sp)
|
||||
ldq $22, 96($sp)
|
||||
ldq $23, 104($sp)
|
||||
ldq $24, 112($sp)
|
||||
ldq $25, 120($sp)
|
||||
ldq $26, 128($sp)
|
||||
ldq $27, 136($sp)
|
||||
ldq $28, 144($sp)
|
||||
addq $sp, SP_OFF, $sp
|
||||
.cfi_restore $0
|
||||
.cfi_restore $1
|
||||
.cfi_restore $2
|
||||
.cfi_restore $3
|
||||
.cfi_restore $4
|
||||
.cfi_restore $5
|
||||
.cfi_restore $6
|
||||
.cfi_restore $7
|
||||
.cfi_restore $8
|
||||
.cfi_restore $19
|
||||
.cfi_restore $20
|
||||
.cfi_restore $21
|
||||
.cfi_restore $22
|
||||
.cfi_restore $23
|
||||
.cfi_restore $24
|
||||
.cfi_restore $25
|
||||
.cfi_restore $26
|
||||
.cfi_restore $27
|
||||
.cfi_restore $28
|
||||
.cfi_adjust_cfa_offset -SP_OFF
|
||||
.endm
|
||||
|
||||
.macro DO_SWITCH_STACK
|
||||
bsr $1, do_switch_stack
|
||||
.cfi_adjust_cfa_offset SWITCH_STACK_SIZE
|
||||
.cfi_rel_offset $9, 0
|
||||
.cfi_rel_offset $10, 8
|
||||
.cfi_rel_offset $11, 16
|
||||
.cfi_rel_offset $12, 24
|
||||
.cfi_rel_offset $13, 32
|
||||
.cfi_rel_offset $14, 40
|
||||
.cfi_rel_offset $15, 48
|
||||
/* We don't really care about the FP registers for debugging. */
|
||||
.endm
|
||||
|
||||
.macro UNDO_SWITCH_STACK
|
||||
bsr $1, undo_switch_stack
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_adjust_cfa_offset -SWITCH_STACK_SIZE
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Non-syscall kernel entry points.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
.globl entInt
|
||||
.ent entInt
|
||||
entInt:
|
||||
CFI_START_OSF_FRAME entInt
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $19
|
||||
jsr $31, do_entInt
|
||||
.end entInt
|
||||
CFI_END_OSF_FRAME entInt
|
||||
|
||||
.align 4
|
||||
.globl entArith
|
||||
.ent entArith
|
||||
entArith:
|
||||
CFI_START_OSF_FRAME entArith
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $18
|
||||
jsr $31, do_entArith
|
||||
.end entArith
|
||||
CFI_END_OSF_FRAME entArith
|
||||
|
||||
.align 4
|
||||
.globl entMM
|
||||
.ent entMM
|
||||
entMM:
|
||||
CFI_START_OSF_FRAME entMM
|
||||
SAVE_ALL
|
||||
/* save $9 - $15 so the inline exception code can manipulate them. */
|
||||
subq $sp, 56, $sp
|
||||
.cfi_adjust_cfa_offset 56
|
||||
stq $9, 0($sp)
|
||||
stq $10, 8($sp)
|
||||
stq $11, 16($sp)
|
||||
|
@ -128,6 +207,13 @@ entMM:
|
|||
stq $13, 32($sp)
|
||||
stq $14, 40($sp)
|
||||
stq $15, 48($sp)
|
||||
.cfi_rel_offset $9, 0
|
||||
.cfi_rel_offset $10, 8
|
||||
.cfi_rel_offset $11, 16
|
||||
.cfi_rel_offset $12, 24
|
||||
.cfi_rel_offset $13, 32
|
||||
.cfi_rel_offset $14, 40
|
||||
.cfi_rel_offset $15, 48
|
||||
addq $sp, 56, $19
|
||||
/* handle the fault */
|
||||
lda $8, 0x3fff
|
||||
|
@ -142,28 +228,33 @@ entMM:
|
|||
ldq $14, 40($sp)
|
||||
ldq $15, 48($sp)
|
||||
addq $sp, 56, $sp
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_adjust_cfa_offset -56
|
||||
/* finish up the syscall as normal. */
|
||||
br ret_from_sys_call
|
||||
.end entMM
|
||||
CFI_END_OSF_FRAME entMM
|
||||
|
||||
.align 4
|
||||
.globl entIF
|
||||
.ent entIF
|
||||
entIF:
|
||||
CFI_START_OSF_FRAME entIF
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $17
|
||||
jsr $31, do_entIF
|
||||
.end entIF
|
||||
CFI_END_OSF_FRAME entIF
|
||||
|
||||
.align 4
|
||||
.globl entUna
|
||||
.ent entUna
|
||||
entUna:
|
||||
CFI_START_OSF_FRAME entUna
|
||||
lda $sp, -256($sp)
|
||||
.cfi_adjust_cfa_offset 256
|
||||
stq $0, 0($sp)
|
||||
.cfi_rel_offset $0, 0
|
||||
.cfi_remember_state
|
||||
ldq $0, 256($sp) /* get PS */
|
||||
stq $1, 8($sp)
|
||||
stq $2, 16($sp)
|
||||
|
@ -195,6 +286,32 @@ entUna:
|
|||
stq $28, 224($sp)
|
||||
mov $sp, $19
|
||||
stq $gp, 232($sp)
|
||||
.cfi_rel_offset $1, 1*8
|
||||
.cfi_rel_offset $2, 2*8
|
||||
.cfi_rel_offset $3, 3*8
|
||||
.cfi_rel_offset $4, 4*8
|
||||
.cfi_rel_offset $5, 5*8
|
||||
.cfi_rel_offset $6, 6*8
|
||||
.cfi_rel_offset $7, 7*8
|
||||
.cfi_rel_offset $8, 8*8
|
||||
.cfi_rel_offset $9, 9*8
|
||||
.cfi_rel_offset $10, 10*8
|
||||
.cfi_rel_offset $11, 11*8
|
||||
.cfi_rel_offset $12, 12*8
|
||||
.cfi_rel_offset $13, 13*8
|
||||
.cfi_rel_offset $14, 14*8
|
||||
.cfi_rel_offset $15, 15*8
|
||||
.cfi_rel_offset $19, 19*8
|
||||
.cfi_rel_offset $20, 20*8
|
||||
.cfi_rel_offset $21, 21*8
|
||||
.cfi_rel_offset $22, 22*8
|
||||
.cfi_rel_offset $23, 23*8
|
||||
.cfi_rel_offset $24, 24*8
|
||||
.cfi_rel_offset $25, 25*8
|
||||
.cfi_rel_offset $26, 26*8
|
||||
.cfi_rel_offset $27, 27*8
|
||||
.cfi_rel_offset $28, 28*8
|
||||
.cfi_rel_offset $29, 29*8
|
||||
lda $8, 0x3fff
|
||||
stq $31, 248($sp)
|
||||
bic $sp, $8, $8
|
||||
|
@ -228,16 +345,45 @@ entUna:
|
|||
ldq $28, 224($sp)
|
||||
ldq $gp, 232($sp)
|
||||
lda $sp, 256($sp)
|
||||
.cfi_restore $1
|
||||
.cfi_restore $2
|
||||
.cfi_restore $3
|
||||
.cfi_restore $4
|
||||
.cfi_restore $5
|
||||
.cfi_restore $6
|
||||
.cfi_restore $7
|
||||
.cfi_restore $8
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_restore $19
|
||||
.cfi_restore $20
|
||||
.cfi_restore $21
|
||||
.cfi_restore $22
|
||||
.cfi_restore $23
|
||||
.cfi_restore $24
|
||||
.cfi_restore $25
|
||||
.cfi_restore $26
|
||||
.cfi_restore $27
|
||||
.cfi_restore $28
|
||||
.cfi_restore $29
|
||||
.cfi_adjust_cfa_offset -256
|
||||
call_pal PAL_rti
|
||||
.end entUna
|
||||
|
||||
.align 4
|
||||
.ent entUnaUser
|
||||
entUnaUser:
|
||||
.cfi_restore_state
|
||||
ldq $0, 0($sp) /* restore original $0 */
|
||||
lda $sp, 256($sp) /* pop entUna's stack frame */
|
||||
.cfi_restore $0
|
||||
.cfi_adjust_cfa_offset -256
|
||||
SAVE_ALL /* setup normal kernel stack */
|
||||
lda $sp, -56($sp)
|
||||
.cfi_adjust_cfa_offset 56
|
||||
stq $9, 0($sp)
|
||||
stq $10, 8($sp)
|
||||
stq $11, 16($sp)
|
||||
|
@ -245,6 +391,13 @@ entUnaUser:
|
|||
stq $13, 32($sp)
|
||||
stq $14, 40($sp)
|
||||
stq $15, 48($sp)
|
||||
.cfi_rel_offset $9, 0
|
||||
.cfi_rel_offset $10, 8
|
||||
.cfi_rel_offset $11, 16
|
||||
.cfi_rel_offset $12, 24
|
||||
.cfi_rel_offset $13, 32
|
||||
.cfi_rel_offset $14, 40
|
||||
.cfi_rel_offset $15, 48
|
||||
lda $8, 0x3fff
|
||||
addq $sp, 56, $19
|
||||
bic $sp, $8, $8
|
||||
|
@ -257,20 +410,25 @@ entUnaUser:
|
|||
ldq $14, 40($sp)
|
||||
ldq $15, 48($sp)
|
||||
lda $sp, 56($sp)
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_adjust_cfa_offset -56
|
||||
br ret_from_sys_call
|
||||
.end entUnaUser
|
||||
CFI_END_OSF_FRAME entUna
|
||||
|
||||
.align 4
|
||||
.globl entDbg
|
||||
.ent entDbg
|
||||
entDbg:
|
||||
CFI_START_OSF_FRAME entDbg
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $16
|
||||
jsr $31, do_entDbg
|
||||
.end entDbg
|
||||
CFI_END_OSF_FRAME entDbg
|
||||
|
||||
/*
|
||||
* The system call entry point is special. Most importantly, it looks
|
||||
|
@ -285,8 +443,12 @@ entDbg:
|
|||
|
||||
.align 4
|
||||
.globl entSys
|
||||
.globl ret_from_sys_call
|
||||
.ent entSys
|
||||
.type entSys, @function
|
||||
.cfi_startproc simple
|
||||
.cfi_return_column 64
|
||||
.cfi_def_cfa $sp, 48
|
||||
.cfi_rel_offset 64, 8
|
||||
.cfi_rel_offset $gp, 16
|
||||
entSys:
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
|
@ -300,6 +462,9 @@ entSys:
|
|||
stq $17, SP_OFF+32($sp)
|
||||
s8addq $0, $5, $5
|
||||
stq $18, SP_OFF+40($sp)
|
||||
.cfi_rel_offset $16, SP_OFF+24
|
||||
.cfi_rel_offset $17, SP_OFF+32
|
||||
.cfi_rel_offset $18, SP_OFF+40
|
||||
blbs $3, strace
|
||||
beq $4, 1f
|
||||
ldq $27, 0($5)
|
||||
|
@ -310,6 +475,7 @@ entSys:
|
|||
stq $31, 72($sp) /* a3=0 => no error */
|
||||
|
||||
.align 4
|
||||
.globl ret_from_sys_call
|
||||
ret_from_sys_call:
|
||||
cmovne $26, 0, $18 /* $18 = 0 => non-restartable */
|
||||
ldq $0, SP_OFF($sp)
|
||||
|
@ -324,10 +490,12 @@ ret_to_user:
|
|||
and $17, _TIF_WORK_MASK, $2
|
||||
bne $2, work_pending
|
||||
restore_all:
|
||||
.cfi_remember_state
|
||||
RESTORE_ALL
|
||||
call_pal PAL_rti
|
||||
|
||||
ret_to_kernel:
|
||||
.cfi_restore_state
|
||||
lda $16, 7
|
||||
call_pal PAL_swpipl
|
||||
br restore_all
|
||||
|
@ -356,7 +524,6 @@ $ret_success:
|
|||
stq $0, 0($sp)
|
||||
stq $31, 72($sp) /* a3=0 => no error */
|
||||
br ret_from_sys_call
|
||||
.end entSys
|
||||
|
||||
/*
|
||||
* Do all cleanup when returning from all interrupts and system calls.
|
||||
|
@ -370,7 +537,7 @@ $ret_success:
|
|||
*/
|
||||
|
||||
.align 4
|
||||
.ent work_pending
|
||||
.type work_pending, @function
|
||||
work_pending:
|
||||
and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2
|
||||
bne $2, $work_notifysig
|
||||
|
@ -387,23 +554,22 @@ $work_resched:
|
|||
|
||||
$work_notifysig:
|
||||
mov $sp, $16
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
jsr $26, do_work_pending
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
br restore_all
|
||||
.end work_pending
|
||||
|
||||
/*
|
||||
* PTRACE syscall handler
|
||||
*/
|
||||
|
||||
.align 4
|
||||
.ent strace
|
||||
.type strace, @function
|
||||
strace:
|
||||
/* set up signal stack, call syscall_trace */
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
jsr $26, syscall_trace_enter /* returns the syscall number */
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
|
||||
/* get the arguments back.. */
|
||||
ldq $16, SP_OFF+24($sp)
|
||||
|
@ -431,9 +597,9 @@ ret_from_straced:
|
|||
$strace_success:
|
||||
stq $0, 0($sp) /* save return value */
|
||||
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
jsr $26, syscall_trace_leave
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
br $31, ret_from_sys_call
|
||||
|
||||
.align 3
|
||||
|
@ -447,26 +613,31 @@ $strace_error:
|
|||
stq $0, 0($sp)
|
||||
stq $1, 72($sp) /* a3 for return */
|
||||
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
mov $18, $9 /* save old syscall number */
|
||||
mov $19, $10 /* save old a3 */
|
||||
jsr $26, syscall_trace_leave
|
||||
mov $9, $18
|
||||
mov $10, $19
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
|
||||
mov $31, $26 /* tell "ret_from_sys_call" we can restart */
|
||||
br ret_from_sys_call
|
||||
.end strace
|
||||
CFI_END_OSF_FRAME entSys
|
||||
|
||||
/*
|
||||
* Save and restore the switch stack -- aka the balance of the user context.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
.ent do_switch_stack
|
||||
.type do_switch_stack, @function
|
||||
.cfi_startproc simple
|
||||
.cfi_return_column 64
|
||||
.cfi_def_cfa $sp, 0
|
||||
.cfi_register 64, $1
|
||||
do_switch_stack:
|
||||
lda $sp, -SWITCH_STACK_SIZE($sp)
|
||||
.cfi_adjust_cfa_offset SWITCH_STACK_SIZE
|
||||
stq $9, 0($sp)
|
||||
stq $10, 8($sp)
|
||||
stq $11, 16($sp)
|
||||
|
@ -510,10 +681,14 @@ do_switch_stack:
|
|||
stt $f0, 312($sp) # save fpcr in slot of $f31
|
||||
ldt $f0, 64($sp) # dont let "do_switch_stack" change fp state.
|
||||
ret $31, ($1), 1
|
||||
.end do_switch_stack
|
||||
.cfi_endproc
|
||||
.size do_switch_stack, .-do_switch_stack
|
||||
|
||||
.align 4
|
||||
.ent undo_switch_stack
|
||||
.type undo_switch_stack, @function
|
||||
.cfi_startproc simple
|
||||
.cfi_def_cfa $sp, 0
|
||||
.cfi_register 64, $1
|
||||
undo_switch_stack:
|
||||
ldq $9, 0($sp)
|
||||
ldq $10, 8($sp)
|
||||
|
@ -558,7 +733,8 @@ undo_switch_stack:
|
|||
ldt $f30, 304($sp)
|
||||
lda $sp, SWITCH_STACK_SIZE($sp)
|
||||
ret $31, ($1), 1
|
||||
.end undo_switch_stack
|
||||
.cfi_endproc
|
||||
.size undo_switch_stack, .-undo_switch_stack
|
||||
|
||||
/*
|
||||
* The meat of the context switch code.
|
||||
|
@ -566,17 +742,18 @@ undo_switch_stack:
|
|||
|
||||
.align 4
|
||||
.globl alpha_switch_to
|
||||
.ent alpha_switch_to
|
||||
.type alpha_switch_to, @function
|
||||
.cfi_startproc
|
||||
alpha_switch_to:
|
||||
.prologue 0
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
call_pal PAL_swpctx
|
||||
lda $8, 0x3fff
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
bic $sp, $8, $8
|
||||
mov $17, $0
|
||||
ret
|
||||
.end alpha_switch_to
|
||||
.cfi_endproc
|
||||
.size alpha_switch_to, .-alpha_switch_to
|
||||
|
||||
/*
|
||||
* New processes begin life here.
|
||||
|
|
|
@ -236,7 +236,7 @@ void __init
|
|||
init_rtc_irq(void)
|
||||
{
|
||||
irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
|
||||
handle_simple_irq, "RTC");
|
||||
handle_percpu_irq, "RTC");
|
||||
setup_irq(RTC_IRQ, &timer_irqaction);
|
||||
}
|
||||
|
||||
|
|
|
@ -264,9 +264,10 @@ recv_secondary_console_msg(void)
|
|||
if (cnt <= 0 || cnt >= 80)
|
||||
strcpy(buf, "<<< BOGUS MSG >>>");
|
||||
else {
|
||||
cp1 = (char *) &cpu->ipc_buffer[11];
|
||||
cp1 = (char *) &cpu->ipc_buffer[1];
|
||||
cp2 = buf;
|
||||
strcpy(cp2, cp1);
|
||||
memcpy(cp2, cp1, cnt);
|
||||
cp2[cnt] = '\0';
|
||||
|
||||
while ((cp2 = strchr(cp2, '\r')) != 0) {
|
||||
*cp2 = ' ';
|
||||
|
|
|
@ -190,9 +190,6 @@ static struct irq_chip clipper_irq_type = {
|
|||
static void
|
||||
dp264_device_interrupt(unsigned long vector)
|
||||
{
|
||||
#if 1
|
||||
printk("dp264_device_interrupt: NOT IMPLEMENTED YET!!\n");
|
||||
#else
|
||||
unsigned long pld;
|
||||
unsigned int i;
|
||||
|
||||
|
@ -210,12 +207,7 @@ dp264_device_interrupt(unsigned long vector)
|
|||
isa_device_interrupt(vector);
|
||||
else
|
||||
handle_irq(16 + i);
|
||||
#if 0
|
||||
TSUNAMI_cchip->dir0.csr = 1UL << i; mb();
|
||||
tmp = TSUNAMI_cchip->dir0.csr;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
@ -317,8 +317,9 @@ marvel_init_irq(void)
|
|||
}
|
||||
|
||||
static int
|
||||
marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
marvel_map_irq(const struct pci_dev *cdev, u8 slot, u8 pin)
|
||||
{
|
||||
struct pci_dev *dev = (struct pci_dev *)cdev;
|
||||
struct pci_controller *hose = dev->sysdata;
|
||||
struct io7_port *io7_port = hose->sysdata;
|
||||
struct io7 *io7 = io7_port->io7;
|
||||
|
|
|
@ -524,6 +524,8 @@ sys_call_table:
|
|||
.quad sys_sendmmsg
|
||||
.quad sys_process_vm_readv
|
||||
.quad sys_process_vm_writev /* 505 */
|
||||
.quad sys_kcmp
|
||||
.quad sys_finit_module
|
||||
|
||||
.size sys_call_table, . - sys_call_table
|
||||
.type sys_call_table, @object
|
||||
|
|
|
@ -105,9 +105,7 @@ void arch_irq_work_raise(void)
|
|||
|
||||
static inline __u32 rpcc(void)
|
||||
{
|
||||
__u32 result;
|
||||
asm volatile ("rpcc %0" : "=r"(result));
|
||||
return result;
|
||||
return __builtin_alpha_rpcc();
|
||||
}
|
||||
|
||||
int update_persistent_clock(struct timespec now)
|
||||
|
|
|
@ -66,8 +66,8 @@ dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
|
|||
{
|
||||
printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n",
|
||||
regs->pc, regs->r26, regs->ps, print_tainted());
|
||||
print_symbol("pc is at %s\n", regs->pc);
|
||||
print_symbol("ra is at %s\n", regs->r26 );
|
||||
printk("pc is at %pSR\n", (void *)regs->pc);
|
||||
printk("ra is at %pSR\n", (void *)regs->r26);
|
||||
printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
|
||||
regs->r0, regs->r1, regs->r2);
|
||||
printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
|
||||
|
@ -132,9 +132,7 @@ dik_show_trace(unsigned long *sp)
|
|||
continue;
|
||||
if (tmp >= (unsigned long) &_etext)
|
||||
continue;
|
||||
printk("[<%lx>]", tmp);
|
||||
print_symbol(" %s", tmp);
|
||||
printk("\n");
|
||||
printk("[<%lx>] %pSR\n", tmp, (void *)tmp);
|
||||
if (i > 40) {
|
||||
printk(" ...");
|
||||
break;
|
||||
|
|
|
@ -38,6 +38,7 @@
|
|||
#include <asm/ptrace.h>
|
||||
#include <asm/processor.h> /* For VMALLOC_START */
|
||||
#include <asm/thread_info.h> /* For THREAD_SIZE */
|
||||
#include <asm/mmu.h>
|
||||
|
||||
/* Note on the LD/ST addr modes with addr reg wback
|
||||
*
|
||||
|
|
|
@ -20,7 +20,6 @@ config ARM
|
|||
select GENERIC_STRNCPY_FROM_USER
|
||||
select GENERIC_STRNLEN_USER
|
||||
select HARDIRQS_SW_RESEND
|
||||
select HAVE_AOUT
|
||||
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
|
||||
select HAVE_ARCH_KGDB
|
||||
select HAVE_ARCH_SECCOMP_FILTER
|
||||
|
@ -218,7 +217,8 @@ config VECTORS_BASE
|
|||
default DRAM_BASE if REMAP_VECTORS_TO_RAM
|
||||
default 0x00000000
|
||||
help
|
||||
The base address of exception vectors.
|
||||
The base address of exception vectors. This must be two pages
|
||||
in size.
|
||||
|
||||
config ARM_PATCH_PHYS_VIRT
|
||||
bool "Patch physical to virtual translations at runtime" if EMBEDDED
|
||||
|
@ -1600,8 +1600,7 @@ config LOCAL_TIMERS
|
|||
config ARCH_NR_GPIO
|
||||
int
|
||||
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
|
||||
default 512 if SOC_OMAP5
|
||||
default 512 if ARCH_KEYSTONE
|
||||
default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
|
||||
default 392 if ARCH_U8500
|
||||
default 352 if ARCH_VT8500
|
||||
default 288 if ARCH_SUNXI
|
||||
|
|
|
@ -804,9 +804,19 @@ config DEBUG_LL_INCLUDE
|
|||
|
||||
config DEBUG_UNCOMPRESS
|
||||
bool
|
||||
default y if ARCH_MULTIPLATFORM && DEBUG_LL && \
|
||||
!DEBUG_OMAP2PLUS_UART && \
|
||||
depends on ARCH_MULTIPLATFORM
|
||||
default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
|
||||
!DEBUG_TEGRA_UART
|
||||
help
|
||||
This option influences the normal decompressor output for
|
||||
multiplatform kernels. Normally, multiplatform kernels disable
|
||||
decompressor output because it is not possible to know where to
|
||||
send the decompressor output.
|
||||
|
||||
When this option is set, the selected DEBUG_LL output method
|
||||
will be re-used for normal decompressor output on multiplatform
|
||||
kernels.
|
||||
|
||||
|
||||
config UNCOMPRESS_INCLUDE
|
||||
string
|
||||
|
|
|
@ -153,6 +153,7 @@ machine-$(CONFIG_ARCH_DAVINCI) += davinci
|
|||
machine-$(CONFIG_ARCH_DOVE) += dove
|
||||
machine-$(CONFIG_ARCH_EBSA110) += ebsa110
|
||||
machine-$(CONFIG_ARCH_EP93XX) += ep93xx
|
||||
machine-$(CONFIG_ARCH_EXYNOS) += exynos
|
||||
machine-$(CONFIG_ARCH_GEMINI) += gemini
|
||||
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
|
||||
machine-$(CONFIG_ARCH_INTEGRATOR) += integrator
|
||||
|
@ -160,15 +161,16 @@ machine-$(CONFIG_ARCH_IOP13XX) += iop13xx
|
|||
machine-$(CONFIG_ARCH_IOP32X) += iop32x
|
||||
machine-$(CONFIG_ARCH_IOP33X) += iop33x
|
||||
machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx
|
||||
machine-$(CONFIG_ARCH_KEYSTONE) += keystone
|
||||
machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood
|
||||
machine-$(CONFIG_ARCH_KS8695) += ks8695
|
||||
machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx
|
||||
machine-$(CONFIG_ARCH_MMP) += mmp
|
||||
machine-$(CONFIG_ARCH_MSM) += msm
|
||||
machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
|
||||
machine-$(CONFIG_ARCH_MVEBU) += mvebu
|
||||
machine-$(CONFIG_ARCH_MXC) += imx
|
||||
machine-$(CONFIG_ARCH_MXS) += mxs
|
||||
machine-$(CONFIG_ARCH_MVEBU) += mvebu
|
||||
machine-$(CONFIG_ARCH_NETX) += netx
|
||||
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
|
||||
machine-$(CONFIG_ARCH_NSPIRE) += nspire
|
||||
|
@ -176,7 +178,6 @@ machine-$(CONFIG_ARCH_OMAP1) += omap1
|
|||
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
|
||||
machine-$(CONFIG_ARCH_ORION5X) += orion5x
|
||||
machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
|
||||
machine-$(CONFIG_ARCH_SIRF) += prima2
|
||||
machine-$(CONFIG_ARCH_PXA) += pxa
|
||||
machine-$(CONFIG_ARCH_REALVIEW) += realview
|
||||
machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
|
||||
|
@ -186,25 +187,24 @@ machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx
|
|||
machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0
|
||||
machine-$(CONFIG_ARCH_S5PC100) += s5pc100
|
||||
machine-$(CONFIG_ARCH_S5PV210) += s5pv210
|
||||
machine-$(CONFIG_ARCH_EXYNOS) += exynos
|
||||
machine-$(CONFIG_ARCH_SA1100) += sa1100
|
||||
machine-$(CONFIG_ARCH_SHARK) += shark
|
||||
machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
|
||||
machine-$(CONFIG_ARCH_SIRF) += prima2
|
||||
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
|
||||
machine-$(CONFIG_ARCH_STI) += sti
|
||||
machine-$(CONFIG_ARCH_SUNXI) += sunxi
|
||||
machine-$(CONFIG_ARCH_TEGRA) += tegra
|
||||
machine-$(CONFIG_ARCH_U300) += u300
|
||||
machine-$(CONFIG_ARCH_U8500) += ux500
|
||||
machine-$(CONFIG_ARCH_VERSATILE) += versatile
|
||||
machine-$(CONFIG_ARCH_VEXPRESS) += vexpress
|
||||
machine-$(CONFIG_ARCH_VIRT) += virt
|
||||
machine-$(CONFIG_ARCH_VT8500) += vt8500
|
||||
machine-$(CONFIG_ARCH_W90X900) += w90x900
|
||||
machine-$(CONFIG_FOOTBRIDGE) += footbridge
|
||||
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
|
||||
machine-$(CONFIG_PLAT_SPEAR) += spear
|
||||
machine-$(CONFIG_ARCH_STI) += sti
|
||||
machine-$(CONFIG_ARCH_VIRT) += virt
|
||||
machine-$(CONFIG_ARCH_ZYNQ) += zynq
|
||||
machine-$(CONFIG_ARCH_SUNXI) += sunxi
|
||||
machine-$(CONFIG_ARCH_KEYSTONE) += keystone
|
||||
machine-$(CONFIG_FOOTBRIDGE) += footbridge
|
||||
machine-$(CONFIG_PLAT_SPEAR) += spear
|
||||
|
||||
# Platform directory name. This list is sorted alphanumerically
|
||||
# by CONFIG_* macro name.
|
||||
|
|
|
@ -485,6 +485,12 @@
|
|||
sirf,function = "usp0";
|
||||
};
|
||||
};
|
||||
usp0_uart_nostreamctrl_pins_a: usp0@1 {
|
||||
usp0 {
|
||||
sirf,pins = "usp0_uart_nostreamctrl_grp";
|
||||
sirf,function = "usp0_uart_nostreamctrl";
|
||||
};
|
||||
};
|
||||
usp1_pins_a: usp1@0 {
|
||||
usp1 {
|
||||
sirf,pins = "usp1grp";
|
||||
|
@ -515,16 +521,16 @@
|
|||
sirf,function = "pulse_count";
|
||||
};
|
||||
};
|
||||
cko0_rst_pins_a: cko0_rst@0 {
|
||||
cko0_rst {
|
||||
sirf,pins = "cko0_rstgrp";
|
||||
sirf,function = "cko0_rst";
|
||||
cko0_pins_a: cko0@0 {
|
||||
cko0 {
|
||||
sirf,pins = "cko0grp";
|
||||
sirf,function = "cko0";
|
||||
};
|
||||
};
|
||||
cko1_rst_pins_a: cko1_rst@0 {
|
||||
cko1_rst {
|
||||
sirf,pins = "cko1_rstgrp";
|
||||
sirf,function = "cko1_rst";
|
||||
cko1_pins_a: cko1@0 {
|
||||
cko1 {
|
||||
sirf,pins = "cko1grp";
|
||||
sirf,function = "cko1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -147,7 +147,7 @@
|
|||
reg = <0x0a>;
|
||||
VDDA-supply = <®_3p3v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
|
||||
clocks = <&saif0>;
|
||||
};
|
||||
|
||||
pcf8563: rtc@51 {
|
||||
|
|
|
@ -195,7 +195,7 @@
|
|||
reg = <0x0a>;
|
||||
VDDA-supply = <®_3p3v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
|
||||
clocks = <&saif0>;
|
||||
};
|
||||
|
||||
at24@51 {
|
||||
|
|
|
@ -184,7 +184,7 @@
|
|||
reg = <0x0a>;
|
||||
VDDA-supply = <®_3p3v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
|
||||
clocks = <&saif0>;
|
||||
};
|
||||
|
||||
eeprom: eeprom@51 {
|
||||
|
|
|
@ -837,6 +837,7 @@
|
|||
compatible = "fsl,imx28-saif";
|
||||
reg = <0x80042000 0x2000>;
|
||||
interrupts = <59 80>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&clks 53>;
|
||||
dmas = <&dma_apbx 4>;
|
||||
dma-names = "rx-tx";
|
||||
|
|
|
@ -61,6 +61,16 @@
|
|||
mux-int-port = <2>;
|
||||
mux-ext-port = <3>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
clk_26M: codec_clock {
|
||||
compatible = "fixed-clock";
|
||||
reg=<0>;
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <26000000>;
|
||||
gpios = <&gpio4 26 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&esdhc1 {
|
||||
|
@ -229,6 +239,7 @@
|
|||
MX51_PAD_EIM_A27__GPIO2_21 0x5
|
||||
MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
|
||||
MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
|
||||
MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
@ -255,7 +266,7 @@
|
|||
sgtl5000: codec@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clock-frequency = <26000000>;
|
||||
clocks = <&clk_26M>;
|
||||
VDDA-supply = <&vdig_reg>;
|
||||
VDDIO-supply = <&vvideo_reg>;
|
||||
};
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm2 0 50000 0 0>;
|
||||
pwms = <&pwm2 0 50000>;
|
||||
brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
|
||||
default-brightness-level = <10>;
|
||||
enable-gpios = <&gpio7 7 0>;
|
||||
|
|
|
@ -725,15 +725,15 @@
|
|||
uart1 {
|
||||
pinctrl_uart1_1: uart1grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1c5
|
||||
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1c5
|
||||
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
|
||||
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1_2: uart1grp-2 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -748,8 +748,8 @@
|
|||
uart2 {
|
||||
pinctrl_uart2_1: uart2grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -766,17 +766,17 @@
|
|||
uart3 {
|
||||
pinctrl_uart3_1: uart3grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DA_1__UART3_CTS 0x1c5
|
||||
MX53_PAD_PATA_DA_2__UART3_RTS 0x1c5
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
|
||||
MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3_2: uart3grp-2 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -785,8 +785,8 @@
|
|||
uart4 {
|
||||
pinctrl_uart4_1: uart4grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4
|
||||
MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
@ -794,8 +794,8 @@
|
|||
uart5 {
|
||||
pinctrl_uart5_1: uart5grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4
|
||||
MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -515,16 +515,16 @@
|
|||
sirf,function = "pulse_count";
|
||||
};
|
||||
};
|
||||
cko0_rst_pins_a: cko0_rst@0 {
|
||||
cko0_rst {
|
||||
sirf,pins = "cko0_rstgrp";
|
||||
sirf,function = "cko0_rst";
|
||||
cko0_pins_a: cko0@0 {
|
||||
cko0 {
|
||||
sirf,pins = "cko0grp";
|
||||
sirf,function = "cko0";
|
||||
};
|
||||
};
|
||||
cko1_rst_pins_a: cko1_rst@0 {
|
||||
cko1_rst {
|
||||
sirf,pins = "cko1_rstgrp";
|
||||
sirf,function = "cko1_rst";
|
||||
cko1_pins_a: cko1@0 {
|
||||
cko1 {
|
||||
sirf,pins = "cko1grp";
|
||||
sirf,function = "cko1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -166,6 +166,15 @@
|
|||
reg = <0x9000 0x100>;
|
||||
st,bank-name = "PIO31";
|
||||
};
|
||||
|
||||
serial2-oe {
|
||||
pinctrl_serial2_oe: serial2-1 {
|
||||
st,pins {
|
||||
output-enable = <&PIO11 3 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pin-controller-rear {
|
||||
|
@ -218,7 +227,6 @@
|
|||
st,pins {
|
||||
tx = <&PIO17 4 ALT2 OUT>;
|
||||
rx = <&PIO17 5 ALT2 IN>;
|
||||
output-enable = <&PIO11 3 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -79,7 +79,7 @@
|
|||
interrupts = <0 197 0>;
|
||||
clocks = <&CLK_S_ICN_REG_0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_serial2>;
|
||||
pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
|
||||
};
|
||||
|
||||
/* SBC_UART1 */
|
||||
|
|
|
@ -47,6 +47,12 @@
|
|||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
vmmc2: regulator-vmmc2 {
|
||||
compatible = "ti,twl4030-vmmc2";
|
||||
regulator-min-microvolt = <1850000>;
|
||||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
vusb1v5: regulator-vusb1v5 {
|
||||
compatible = "ti,twl4030-vusb1v5";
|
||||
};
|
||||
|
|
|
@ -442,8 +442,8 @@
|
|||
compatible = "fsl,mvf600-fec";
|
||||
reg = <0x400d0000 0x1000>;
|
||||
interrupts = <0 78 0x04>;
|
||||
clocks = <&clks VF610_CLK_ENET>,
|
||||
<&clks VF610_CLK_ENET>,
|
||||
clocks = <&clks VF610_CLK_ENET0>,
|
||||
<&clks VF610_CLK_ENET0>,
|
||||
<&clks VF610_CLK_ENET>;
|
||||
clock-names = "ipg", "ahb", "ptp";
|
||||
status = "disabled";
|
||||
|
@ -453,8 +453,8 @@
|
|||
compatible = "fsl,mvf600-fec";
|
||||
reg = <0x400d1000 0x1000>;
|
||||
interrupts = <0 79 0x04>;
|
||||
clocks = <&clks VF610_CLK_ENET>,
|
||||
<&clks VF610_CLK_ENET>,
|
||||
clocks = <&clks VF610_CLK_ENET1>,
|
||||
<&clks VF610_CLK_ENET1>,
|
||||
<&clks VF610_CLK_ENET>;
|
||||
clock-names = "ipg", "ahb", "ptp";
|
||||
status = "disabled";
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/edma.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_dma.h>
|
||||
|
|
|
@ -151,7 +151,7 @@ mcpm_setup_leave:
|
|||
|
||||
mov r0, #INBOUND_NOT_COMING_UP
|
||||
strb r0, [r8, #MCPM_SYNC_CLUSTER_INBOUND]
|
||||
dsb
|
||||
dsb st
|
||||
sev
|
||||
|
||||
mov r0, r11
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
dmb
|
||||
mov \rscratch, #0
|
||||
strb \rscratch, [\rbase, \rcpu]
|
||||
dsb
|
||||
dsb st
|
||||
sev
|
||||
.endm
|
||||
|
||||
|
@ -102,7 +102,7 @@ ENTRY(vlock_unlock)
|
|||
dmb
|
||||
mov r1, #VLOCK_OWNER_NONE
|
||||
strb r1, [r0, #VLOCK_OWNER_OFFSET]
|
||||
dsb
|
||||
dsb st
|
||||
sev
|
||||
bx lr
|
||||
ENDPROC(vlock_unlock)
|
||||
|
|
|
@ -102,6 +102,8 @@ CONFIG_SND_SOC=m
|
|||
CONFIG_SND_DAVINCI_SOC=m
|
||||
# CONFIG_HID_SUPPORT is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_TI_EDMA=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_XFS_FS=m
|
||||
|
|
|
@ -162,6 +162,8 @@ CONFIG_LEDS_TRIGGERS=y
|
|||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_TI_EDMA=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_XFS_FS=m
|
||||
|
|
|
@ -53,6 +53,7 @@ CONFIG_IP_PNP=y
|
|||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_OMAP_OCP2SCP=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_AHCI_PLATFORM=y
|
||||
|
@ -61,6 +62,7 @@ CONFIG_SATA_MV=y
|
|||
CONFIG_NETDEVICES=y
|
||||
CONFIG_SUN4I_EMAC=y
|
||||
CONFIG_NET_CALXEDA_XGMAC=y
|
||||
CONFIG_KS8851=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_STMMAC_ETH=y
|
||||
CONFIG_MDIO_SUN4I=y
|
||||
|
@ -89,6 +91,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
|||
CONFIG_I2C_SIRF=y
|
||||
CONFIG_I2C_TEGRA=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_OMAP24XX=y
|
||||
CONFIG_SPI_PL022=y
|
||||
CONFIG_SPI_SIRF=y
|
||||
CONFIG_SPI_TEGRA114=y
|
||||
|
@ -111,11 +114,12 @@ CONFIG_FB_SIMPLE=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_MXC=y
|
||||
CONFIG_USB_EHCI_TEGRA=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
CONFIG_USB_ISP1760_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_AB8500_USB=y
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_OMAP_USB2=y
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
|
@ -48,7 +50,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
|||
CONFIG_MTD=y
|
||||
CONFIG_MTD_TESTS=m
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND_ECC_SMC=y
|
||||
CONFIG_MTD_NAND=y
|
||||
|
@ -94,8 +95,10 @@ CONFIG_I2C_GPIO=y
|
|||
CONFIG_I2C_NOMADIK=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_CLKGATE=y
|
||||
CONFIG_MMC_UNSAFE_RESUME=y
|
||||
# CONFIG_MMC_BLOCK_BOUNCE is not set
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
|
|
|
@ -1,45 +0,0 @@
|
|||
/* a.out coredump register dumper
|
||||
*
|
||||
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
|
||||
* Written by David Howells (dhowells@redhat.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public Licence
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the Licence, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _ASM_A_OUT_CORE_H
|
||||
#define _ASM_A_OUT_CORE_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/user.h>
|
||||
#include <linux/elfcore.h>
|
||||
|
||||
/*
|
||||
* fill in the user structure for an a.out core dump
|
||||
*/
|
||||
static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
|
||||
dump->magic = CMAGIC;
|
||||
dump->start_code = tsk->mm->start_code;
|
||||
dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
|
||||
|
||||
dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
|
||||
dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
||||
dump->u_ssize = 0;
|
||||
|
||||
memset(dump->u_debugreg, 0, sizeof(dump->u_debugreg));
|
||||
|
||||
if (dump->start_stack < 0x04000000)
|
||||
dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
|
||||
|
||||
dump->regs = *regs;
|
||||
dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_A_OUT_CORE_H */
|
|
@ -220,9 +220,9 @@
|
|||
#ifdef CONFIG_SMP
|
||||
#if __LINUX_ARM_ARCH__ >= 7
|
||||
.ifeqs "\mode","arm"
|
||||
ALT_SMP(dmb)
|
||||
ALT_SMP(dmb ish)
|
||||
.else
|
||||
ALT_SMP(W(dmb))
|
||||
ALT_SMP(W(dmb) ish)
|
||||
.endif
|
||||
#elif __LINUX_ARM_ARCH__ == 6
|
||||
ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb
|
||||
|
|
|
@ -14,27 +14,27 @@
|
|||
#endif
|
||||
|
||||
#if __LINUX_ARM_ARCH__ >= 7
|
||||
#define isb() __asm__ __volatile__ ("isb" : : : "memory")
|
||||
#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
|
||||
#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
|
||||
#define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory")
|
||||
#define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory")
|
||||
#define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory")
|
||||
#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
|
||||
#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
|
||||
#define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
|
||||
: : "r" (0) : "memory")
|
||||
#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
|
||||
#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
|
||||
: : "r" (0) : "memory")
|
||||
#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
|
||||
#define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
|
||||
: : "r" (0) : "memory")
|
||||
#elif defined(CONFIG_CPU_FA526)
|
||||
#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
|
||||
#define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
|
||||
: : "r" (0) : "memory")
|
||||
#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
|
||||
#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
|
||||
: : "r" (0) : "memory")
|
||||
#define dmb() __asm__ __volatile__ ("" : : : "memory")
|
||||
#define dmb(x) __asm__ __volatile__ ("" : : : "memory")
|
||||
#else
|
||||
#define isb() __asm__ __volatile__ ("" : : : "memory")
|
||||
#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
|
||||
#define isb(x) __asm__ __volatile__ ("" : : : "memory")
|
||||
#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
|
||||
: : "r" (0) : "memory")
|
||||
#define dmb() __asm__ __volatile__ ("" : : : "memory")
|
||||
#define dmb(x) __asm__ __volatile__ ("" : : : "memory")
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_HAS_BARRIERS
|
||||
|
@ -42,7 +42,7 @@
|
|||
#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
|
||||
#define mb() do { dsb(); outer_sync(); } while (0)
|
||||
#define rmb() dsb()
|
||||
#define wmb() mb()
|
||||
#define wmb() do { dsb(st); outer_sync(); } while (0)
|
||||
#else
|
||||
#define mb() barrier()
|
||||
#define rmb() barrier()
|
||||
|
@ -54,9 +54,9 @@
|
|||
#define smp_rmb() barrier()
|
||||
#define smp_wmb() barrier()
|
||||
#else
|
||||
#define smp_mb() dmb()
|
||||
#define smp_rmb() dmb()
|
||||
#define smp_wmb() dmb()
|
||||
#define smp_mb() dmb(ish)
|
||||
#define smp_rmb() smp_mb()
|
||||
#define smp_wmb() dmb(ishst)
|
||||
#endif
|
||||
|
||||
#define read_barrier_depends() do { } while(0)
|
||||
|
|
|
@ -352,7 +352,7 @@ static inline void flush_cache_vmap(unsigned long start, unsigned long end)
|
|||
* set_pte_at() called from vmap_pte_range() does not
|
||||
* have a DSB after cleaning the cache line.
|
||||
*/
|
||||
dsb();
|
||||
dsb(ishst);
|
||||
}
|
||||
|
||||
static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
|
||||
|
|
|
@ -89,13 +89,18 @@ extern unsigned int processor_id;
|
|||
__val; \
|
||||
})
|
||||
|
||||
/*
|
||||
* The memory clobber prevents gcc 4.5 from reordering the mrc before
|
||||
* any is_smp() tests, which can cause undefined instruction aborts on
|
||||
* ARM1136 r0 due to the missing extended CP15 registers.
|
||||
*/
|
||||
#define read_cpuid_ext(ext_reg) \
|
||||
({ \
|
||||
unsigned int __val; \
|
||||
asm("mrc p15, 0, %0, c0, " ext_reg \
|
||||
: "=r" (__val) \
|
||||
: \
|
||||
: "cc"); \
|
||||
: "memory"); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
|
|
|
@ -130,4 +130,10 @@ struct mm_struct;
|
|||
extern unsigned long arch_randomize_brk(struct mm_struct *mm);
|
||||
#define arch_randomize_brk arch_randomize_brk
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
|
||||
struct linux_binprm;
|
||||
int arch_setup_additional_pages(struct linux_binprm *, int);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -6,8 +6,11 @@
|
|||
typedef struct {
|
||||
#ifdef CONFIG_CPU_HAS_ASID
|
||||
atomic64_t id;
|
||||
#else
|
||||
int switch_pending;
|
||||
#endif
|
||||
unsigned int vmalloc_seq;
|
||||
unsigned long sigpage;
|
||||
} mm_context_t;
|
||||
|
||||
#ifdef CONFIG_CPU_HAS_ASID
|
||||
|
|
|
@ -56,7 +56,7 @@ static inline void check_and_switch_context(struct mm_struct *mm,
|
|||
* on non-ASID CPUs, the old mm will remain valid until the
|
||||
* finish_arch_post_lock_switch() call.
|
||||
*/
|
||||
set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM);
|
||||
mm->context.switch_pending = 1;
|
||||
else
|
||||
cpu_switch_mm(mm->pgd, mm);
|
||||
}
|
||||
|
@ -65,9 +65,21 @@ static inline void check_and_switch_context(struct mm_struct *mm,
|
|||
finish_arch_post_lock_switch
|
||||
static inline void finish_arch_post_lock_switch(void)
|
||||
{
|
||||
if (test_and_clear_thread_flag(TIF_SWITCH_MM)) {
|
||||
struct mm_struct *mm = current->mm;
|
||||
cpu_switch_mm(mm->pgd, mm);
|
||||
struct mm_struct *mm = current->mm;
|
||||
|
||||
if (mm && mm->context.switch_pending) {
|
||||
/*
|
||||
* Preemption must be disabled during cpu_switch_mm() as we
|
||||
* have some stateful cache flush implementations. Check
|
||||
* switch_pending again in case we were preempted and the
|
||||
* switch to this mm was already done.
|
||||
*/
|
||||
preempt_disable();
|
||||
if (mm->context.switch_pending) {
|
||||
mm->context.switch_pending = 0;
|
||||
cpu_switch_mm(mm->pgd, mm);
|
||||
}
|
||||
preempt_enable_no_resched();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -142,7 +142,9 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
|
|||
#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
|
||||
extern void copy_page(void *to, const void *from);
|
||||
|
||||
#ifdef CONFIG_KUSER_HELPERS
|
||||
#define __HAVE_ARCH_GATE_AREA 1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM_LPAE
|
||||
#include <asm/pgtable-3level-types.h>
|
||||
|
|
|
@ -54,7 +54,6 @@ struct thread_struct {
|
|||
|
||||
#define start_thread(regs,pc,sp) \
|
||||
({ \
|
||||
unsigned long *stack = (unsigned long *)sp; \
|
||||
memset(regs->uregs, 0, sizeof(regs->uregs)); \
|
||||
if (current->personality & ADDR_LIMIT_32BIT) \
|
||||
regs->ARM_cpsr = USR_MODE; \
|
||||
|
@ -65,9 +64,6 @@ struct thread_struct {
|
|||
regs->ARM_cpsr |= PSR_ENDSTATE; \
|
||||
regs->ARM_pc = pc & ~1; /* pc */ \
|
||||
regs->ARM_sp = sp; /* sp */ \
|
||||
regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
|
||||
regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
|
||||
regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
|
||||
nommu_start_thread(regs); \
|
||||
})
|
||||
|
||||
|
|
|
@ -46,7 +46,7 @@ static inline void dsb_sev(void)
|
|||
{
|
||||
#if __LINUX_ARM_ARCH__ >= 7
|
||||
__asm__ __volatile__ (
|
||||
"dsb\n"
|
||||
"dsb ishst\n"
|
||||
SEV
|
||||
);
|
||||
#else
|
||||
|
|
|
@ -3,6 +3,16 @@
|
|||
|
||||
#include <linux/thread_info.h>
|
||||
|
||||
/*
|
||||
* For v7 SMP cores running a preemptible kernel we may be pre-empted
|
||||
* during a TLB maintenance operation, so execute an inner-shareable dsb
|
||||
* to ensure that the maintenance completes in case we migrate to another
|
||||
* CPU.
|
||||
*/
|
||||
#if defined(CONFIG_PREEMPT) && defined(CONFIG_SMP) && defined(CONFIG_CPU_V7)
|
||||
#define finish_arch_switch(prev) dsb(ish)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* switch_to(prev, next) should switch from task `prev' to `next'
|
||||
* `prev' will never be the same as `next'. schedule() itself
|
||||
|
|
|
@ -156,7 +156,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
|
|||
#define TIF_USING_IWMMXT 17
|
||||
#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
|
||||
#define TIF_RESTORE_SIGMASK 20
|
||||
#define TIF_SWITCH_MM 22 /* deferred switch_mm */
|
||||
|
||||
#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
|
||||
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
|
||||
|
|
|
@ -319,67 +319,110 @@ extern struct cpu_tlb_fns cpu_tlb;
|
|||
#define tlb_op(f, regs, arg) __tlb_op(f, "p15, 0, %0, " regs, arg)
|
||||
#define tlb_l2_op(f, regs, arg) __tlb_op(f, "p15, 1, %0, " regs, arg)
|
||||
|
||||
static inline void __local_flush_tlb_all(void)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
|
||||
tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
|
||||
tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
|
||||
}
|
||||
|
||||
static inline void local_flush_tlb_all(void)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb();
|
||||
dsb(nshst);
|
||||
|
||||
tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
|
||||
tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
|
||||
tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
|
||||
tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero);
|
||||
__local_flush_tlb_all();
|
||||
tlb_op(TLB_V7_UIS_FULL, "c8, c7, 0", zero);
|
||||
|
||||
if (tlb_flag(TLB_BARRIER)) {
|
||||
dsb();
|
||||
dsb(nsh);
|
||||
isb();
|
||||
}
|
||||
}
|
||||
|
||||
static inline void local_flush_tlb_mm(struct mm_struct *mm)
|
||||
static inline void __flush_tlb_all(void)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb(ishst);
|
||||
|
||||
__local_flush_tlb_all();
|
||||
tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero);
|
||||
|
||||
if (tlb_flag(TLB_BARRIER)) {
|
||||
dsb(ish);
|
||||
isb();
|
||||
}
|
||||
}
|
||||
|
||||
static inline void __local_flush_tlb_mm(struct mm_struct *mm)
|
||||
{
|
||||
const int zero = 0;
|
||||
const int asid = ASID(mm);
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb();
|
||||
|
||||
if (possible_tlb_flags & (TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
|
||||
if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
|
||||
if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) {
|
||||
tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
|
||||
tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
|
||||
tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
|
||||
}
|
||||
put_cpu();
|
||||
}
|
||||
|
||||
tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid);
|
||||
tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid);
|
||||
tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid);
|
||||
}
|
||||
|
||||
static inline void local_flush_tlb_mm(struct mm_struct *mm)
|
||||
{
|
||||
const int asid = ASID(mm);
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb(nshst);
|
||||
|
||||
__local_flush_tlb_mm(mm);
|
||||
tlb_op(TLB_V7_UIS_ASID, "c8, c7, 2", asid);
|
||||
|
||||
if (tlb_flag(TLB_BARRIER))
|
||||
dsb(nsh);
|
||||
}
|
||||
|
||||
static inline void __flush_tlb_mm(struct mm_struct *mm)
|
||||
{
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb(ishst);
|
||||
|
||||
__local_flush_tlb_mm(mm);
|
||||
#ifdef CONFIG_ARM_ERRATA_720789
|
||||
tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", zero);
|
||||
tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", 0);
|
||||
#else
|
||||
tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", asid);
|
||||
tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm));
|
||||
#endif
|
||||
|
||||
if (tlb_flag(TLB_BARRIER))
|
||||
dsb();
|
||||
dsb(ish);
|
||||
}
|
||||
|
||||
static inline void
|
||||
local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
||||
__local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb();
|
||||
|
||||
if (possible_tlb_flags & (TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
|
||||
cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
|
||||
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
|
||||
|
@ -392,6 +435,36 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
|||
tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", uaddr);
|
||||
tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr);
|
||||
tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr);
|
||||
}
|
||||
|
||||
static inline void
|
||||
local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
||||
{
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb(nshst);
|
||||
|
||||
__local_flush_tlb_page(vma, uaddr);
|
||||
tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", uaddr);
|
||||
|
||||
if (tlb_flag(TLB_BARRIER))
|
||||
dsb(nsh);
|
||||
}
|
||||
|
||||
static inline void
|
||||
__flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
||||
{
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb(ishst);
|
||||
|
||||
__local_flush_tlb_page(vma, uaddr);
|
||||
#ifdef CONFIG_ARM_ERRATA_720789
|
||||
tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 3", uaddr & PAGE_MASK);
|
||||
#else
|
||||
|
@ -399,19 +472,14 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
|||
#endif
|
||||
|
||||
if (tlb_flag(TLB_BARRIER))
|
||||
dsb();
|
||||
dsb(ish);
|
||||
}
|
||||
|
||||
static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
|
||||
static inline void __local_flush_tlb_kernel_page(unsigned long kaddr)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
kaddr &= PAGE_MASK;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb();
|
||||
|
||||
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
|
||||
tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
|
||||
tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
|
||||
|
@ -421,38 +489,103 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
|
|||
tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", kaddr);
|
||||
tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr);
|
||||
tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr);
|
||||
}
|
||||
|
||||
static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
|
||||
{
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
kaddr &= PAGE_MASK;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb(nshst);
|
||||
|
||||
__local_flush_tlb_kernel_page(kaddr);
|
||||
tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", kaddr);
|
||||
|
||||
if (tlb_flag(TLB_BARRIER)) {
|
||||
dsb(nsh);
|
||||
isb();
|
||||
}
|
||||
}
|
||||
|
||||
static inline void __flush_tlb_kernel_page(unsigned long kaddr)
|
||||
{
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
kaddr &= PAGE_MASK;
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb(ishst);
|
||||
|
||||
__local_flush_tlb_kernel_page(kaddr);
|
||||
tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", kaddr);
|
||||
|
||||
if (tlb_flag(TLB_BARRIER)) {
|
||||
dsb();
|
||||
dsb(ish);
|
||||
isb();
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Branch predictor maintenance is paired with full TLB invalidation, so
|
||||
* there is no need for any barriers here.
|
||||
*/
|
||||
static inline void __local_flush_bp_all(void)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
if (tlb_flag(TLB_V6_BP))
|
||||
asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero));
|
||||
}
|
||||
|
||||
static inline void local_flush_bp_all(void)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
__local_flush_bp_all();
|
||||
if (tlb_flag(TLB_V7_UIS_BP))
|
||||
asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));
|
||||
else if (tlb_flag(TLB_V6_BP))
|
||||
asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero));
|
||||
|
||||
if (tlb_flag(TLB_BARRIER))
|
||||
isb();
|
||||
}
|
||||
|
||||
static inline void __flush_bp_all(void)
|
||||
{
|
||||
const int zero = 0;
|
||||
const unsigned int __tlb_flag = __cpu_tlb_flags;
|
||||
|
||||
__local_flush_bp_all();
|
||||
if (tlb_flag(TLB_V7_UIS_BP))
|
||||
asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));
|
||||
}
|
||||
|
||||
#include <asm/cputype.h>
|
||||
#ifdef CONFIG_ARM_ERRATA_798181
|
||||
static inline int erratum_a15_798181(void)
|
||||
{
|
||||
unsigned int midr = read_cpuid_id();
|
||||
|
||||
/* Cortex-A15 r0p0..r3p2 affected */
|
||||
if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static inline void dummy_flush_tlb_a15_erratum(void)
|
||||
{
|
||||
/*
|
||||
* Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0.
|
||||
*/
|
||||
asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
|
||||
dsb();
|
||||
dsb(ish);
|
||||
}
|
||||
#else
|
||||
static inline int erratum_a15_798181(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void dummy_flush_tlb_a15_erratum(void)
|
||||
{
|
||||
}
|
||||
|
@ -479,7 +612,7 @@ static inline void flush_pmd_entry(void *pmd)
|
|||
tlb_l2_op(TLB_L2CLEAN_FR, "c15, c9, 1 @ L2 flush_pmd", pmd);
|
||||
|
||||
if (tlb_flag(TLB_WB))
|
||||
dsb();
|
||||
dsb(ishst);
|
||||
}
|
||||
|
||||
static inline void clean_pmd_entry(void *pmd)
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
#ifdef CONFIG_ARM_VIRT_EXT
|
||||
/*
|
||||
|
@ -41,10 +42,21 @@
|
|||
*/
|
||||
extern int __boot_cpu_mode;
|
||||
|
||||
static inline void sync_boot_mode(void)
|
||||
{
|
||||
/*
|
||||
* As secondaries write to __boot_cpu_mode with caches disabled, we
|
||||
* must flush the corresponding cache entries to ensure the visibility
|
||||
* of their writes.
|
||||
*/
|
||||
sync_cache_r(&__boot_cpu_mode);
|
||||
}
|
||||
|
||||
void __hyp_set_vectors(unsigned long phys_vector_base);
|
||||
unsigned long __hyp_get_vectors(void);
|
||||
#else
|
||||
#define __boot_cpu_mode (SVC_MODE)
|
||||
#define sync_boot_mode()
|
||||
#endif
|
||||
|
||||
#ifndef ZIMAGE
|
||||
|
|
|
@ -1,7 +1,6 @@
|
|||
# UAPI Header export list
|
||||
include include/uapi/asm-generic/Kbuild.asm
|
||||
|
||||
header-y += a.out.h
|
||||
header-y += byteorder.h
|
||||
header-y += fcntl.h
|
||||
header-y += hwcap.h
|
||||
|
|
|
@ -1,34 +0,0 @@
|
|||
#ifndef __ARM_A_OUT_H__
|
||||
#define __ARM_A_OUT_H__
|
||||
|
||||
#include <linux/personality.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
struct exec
|
||||
{
|
||||
__u32 a_info; /* Use macros N_MAGIC, etc for access */
|
||||
__u32 a_text; /* length of text, in bytes */
|
||||
__u32 a_data; /* length of data, in bytes */
|
||||
__u32 a_bss; /* length of uninitialized data area for file, in bytes */
|
||||
__u32 a_syms; /* length of symbol table data in file, in bytes */
|
||||
__u32 a_entry; /* start address */
|
||||
__u32 a_trsize; /* length of relocation info for text, in bytes */
|
||||
__u32 a_drsize; /* length of relocation info for data, in bytes */
|
||||
};
|
||||
|
||||
/*
|
||||
* This is always the same
|
||||
*/
|
||||
#define N_TXTADDR(a) (0x00008000)
|
||||
|
||||
#define N_TRSIZE(a) ((a).a_trsize)
|
||||
#define N_DRSIZE(a) ((a).a_drsize)
|
||||
#define N_SYMSIZE(a) ((a).a_syms)
|
||||
|
||||
#define M_ARM 103
|
||||
|
||||
#ifndef LIBRARY_START_TEXT
|
||||
#define LIBRARY_START_TEXT (0x00c00000)
|
||||
#endif
|
||||
|
||||
#endif /* __A_OUT_GNU_H__ */
|
|
@ -742,6 +742,18 @@ ENDPROC(__switch_to)
|
|||
#endif
|
||||
.endm
|
||||
|
||||
.macro kuser_pad, sym, size
|
||||
.if (. - \sym) & 3
|
||||
.rept 4 - (. - \sym) & 3
|
||||
.byte 0
|
||||
.endr
|
||||
.endif
|
||||
.rept (\size - (. - \sym)) / 4
|
||||
.word 0xe7fddef1
|
||||
.endr
|
||||
.endm
|
||||
|
||||
#ifdef CONFIG_KUSER_HELPERS
|
||||
.align 5
|
||||
.globl __kuser_helper_start
|
||||
__kuser_helper_start:
|
||||
|
@ -832,18 +844,13 @@ kuser_cmpxchg64_fixup:
|
|||
#error "incoherent kernel configuration"
|
||||
#endif
|
||||
|
||||
/* pad to next slot */
|
||||
.rept (16 - (. - __kuser_cmpxchg64)/4)
|
||||
.word 0
|
||||
.endr
|
||||
|
||||
.align 5
|
||||
kuser_pad __kuser_cmpxchg64, 64
|
||||
|
||||
__kuser_memory_barrier: @ 0xffff0fa0
|
||||
smp_dmb arm
|
||||
usr_ret lr
|
||||
|
||||
.align 5
|
||||
kuser_pad __kuser_memory_barrier, 32
|
||||
|
||||
__kuser_cmpxchg: @ 0xffff0fc0
|
||||
|
||||
|
@ -916,13 +923,14 @@ kuser_cmpxchg32_fixup:
|
|||
|
||||
#endif
|
||||
|
||||
.align 5
|
||||
kuser_pad __kuser_cmpxchg, 32
|
||||
|
||||
__kuser_get_tls: @ 0xffff0fe0
|
||||
ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init
|
||||
usr_ret lr
|
||||
mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code
|
||||
.rep 4
|
||||
kuser_pad __kuser_get_tls, 16
|
||||
.rep 3
|
||||
.word 0 @ 0xffff0ff0 software TLS value, then
|
||||
.endr @ pad up to __kuser_helper_version
|
||||
|
||||
|
@ -932,14 +940,16 @@ __kuser_helper_version: @ 0xffff0ffc
|
|||
.globl __kuser_helper_end
|
||||
__kuser_helper_end:
|
||||
|
||||
#endif
|
||||
|
||||
THUMB( .thumb )
|
||||
|
||||
/*
|
||||
* Vector stubs.
|
||||
*
|
||||
* This code is copied to 0xffff0200 so we can use branches in the
|
||||
* vectors, rather than ldr's. Note that this code must not
|
||||
* exceed 0x300 bytes.
|
||||
* This code is copied to 0xffff1000 so we can use branches in the
|
||||
* vectors, rather than ldr's. Note that this code must not exceed
|
||||
* a page size.
|
||||
*
|
||||
* Common stub entry macro:
|
||||
* Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
|
||||
|
@ -986,8 +996,17 @@ ENDPROC(vector_\name)
|
|||
1:
|
||||
.endm
|
||||
|
||||
.globl __stubs_start
|
||||
.section .stubs, "ax", %progbits
|
||||
__stubs_start:
|
||||
@ This must be the first word
|
||||
.word vector_swi
|
||||
|
||||
vector_rst:
|
||||
ARM( swi SYS_ERROR0 )
|
||||
THUMB( svc #0 )
|
||||
THUMB( nop )
|
||||
b vector_und
|
||||
|
||||
/*
|
||||
* Interrupt dispatcher
|
||||
*/
|
||||
|
@ -1081,6 +1100,16 @@ __stubs_start:
|
|||
|
||||
.align 5
|
||||
|
||||
/*=============================================================================
|
||||
* Address exception handler
|
||||
*-----------------------------------------------------------------------------
|
||||
* These aren't too critical.
|
||||
* (they're not supposed to happen, and won't happen in 32-bit data mode).
|
||||
*/
|
||||
|
||||
vector_addrexcptn:
|
||||
b vector_addrexcptn
|
||||
|
||||
/*=============================================================================
|
||||
* Undefined FIQs
|
||||
*-----------------------------------------------------------------------------
|
||||
|
@ -1094,45 +1123,19 @@ __stubs_start:
|
|||
vector_fiq:
|
||||
subs pc, lr, #4
|
||||
|
||||
/*=============================================================================
|
||||
* Address exception handler
|
||||
*-----------------------------------------------------------------------------
|
||||
* These aren't too critical.
|
||||
* (they're not supposed to happen, and won't happen in 32-bit data mode).
|
||||
*/
|
||||
.globl vector_fiq_offset
|
||||
.equ vector_fiq_offset, vector_fiq
|
||||
|
||||
vector_addrexcptn:
|
||||
b vector_addrexcptn
|
||||
|
||||
/*
|
||||
* We group all the following data together to optimise
|
||||
* for CPUs with separate I & D caches.
|
||||
*/
|
||||
.align 5
|
||||
|
||||
.LCvswi:
|
||||
.word vector_swi
|
||||
|
||||
.globl __stubs_end
|
||||
__stubs_end:
|
||||
|
||||
.equ stubs_offset, __vectors_start + 0x200 - __stubs_start
|
||||
|
||||
.globl __vectors_start
|
||||
.section .vectors, "ax", %progbits
|
||||
__vectors_start:
|
||||
ARM( swi SYS_ERROR0 )
|
||||
THUMB( svc #0 )
|
||||
THUMB( nop )
|
||||
W(b) vector_und + stubs_offset
|
||||
W(ldr) pc, .LCvswi + stubs_offset
|
||||
W(b) vector_pabt + stubs_offset
|
||||
W(b) vector_dabt + stubs_offset
|
||||
W(b) vector_addrexcptn + stubs_offset
|
||||
W(b) vector_irq + stubs_offset
|
||||
W(b) vector_fiq + stubs_offset
|
||||
|
||||
.globl __vectors_end
|
||||
__vectors_end:
|
||||
W(b) vector_rst
|
||||
W(b) vector_und
|
||||
W(ldr) pc, __vectors_start + 0x1000
|
||||
W(b) vector_pabt
|
||||
W(b) vector_dabt
|
||||
W(b) vector_addrexcptn
|
||||
W(b) vector_irq
|
||||
W(b) vector_fiq
|
||||
|
||||
.data
|
||||
|
||||
|
|
|
@ -49,7 +49,7 @@ __irq_entry:
|
|||
mov r1, sp
|
||||
stmdb sp!, {lr}
|
||||
@ routine called with r0 = irq number, r1 = struct pt_regs *
|
||||
bl nvic_do_IRQ
|
||||
bl nvic_handle_irq
|
||||
|
||||
pop {lr}
|
||||
@
|
||||
|
|
|
@ -47,6 +47,11 @@
|
|||
#include <asm/irq.h>
|
||||
#include <asm/traps.h>
|
||||
|
||||
#define FIQ_OFFSET ({ \
|
||||
extern void *vector_fiq_offset; \
|
||||
(unsigned)&vector_fiq_offset; \
|
||||
})
|
||||
|
||||
static unsigned long no_fiq_insn;
|
||||
|
||||
/* Default reacquire function
|
||||
|
@ -80,13 +85,16 @@ int show_fiq_list(struct seq_file *p, int prec)
|
|||
void set_fiq_handler(void *start, unsigned int length)
|
||||
{
|
||||
#if defined(CONFIG_CPU_USE_DOMAINS)
|
||||
memcpy((void *)0xffff001c, start, length);
|
||||
void *base = (void *)0xffff0000;
|
||||
#else
|
||||
memcpy(vectors_page + 0x1c, start, length);
|
||||
void *base = vectors_page;
|
||||
#endif
|
||||
flush_icache_range(0xffff001c, 0xffff001c + length);
|
||||
unsigned offset = FIQ_OFFSET;
|
||||
|
||||
memcpy(base + offset, start, length);
|
||||
flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length);
|
||||
if (!vectors_high())
|
||||
flush_icache_range(0x1c, 0x1c + length);
|
||||
flush_icache_range(offset, offset + length);
|
||||
}
|
||||
|
||||
int claim_fiq(struct fiq_handler *f)
|
||||
|
@ -144,6 +152,7 @@ EXPORT_SYMBOL(disable_fiq);
|
|||
|
||||
void __init init_FIQ(int start)
|
||||
{
|
||||
no_fiq_insn = *(unsigned long *)0xffff001c;
|
||||
unsigned offset = FIQ_OFFSET;
|
||||
no_fiq_insn = *(unsigned long *)(0xffff0000 + offset);
|
||||
fiq_start = start;
|
||||
}
|
||||
|
|
|
@ -87,6 +87,7 @@ ENTRY(stext)
|
|||
ENDPROC(stext)
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
.text
|
||||
ENTRY(secondary_startup)
|
||||
/*
|
||||
* Common entry point for secondary CPUs.
|
||||
|
|
|
@ -343,6 +343,7 @@ __turn_mmu_on_loc:
|
|||
.long __turn_mmu_on_end
|
||||
|
||||
#if defined(CONFIG_SMP)
|
||||
.text
|
||||
ENTRY(secondary_startup)
|
||||
/*
|
||||
* Common entry point for secondary CPUs.
|
||||
|
|
|
@ -56,8 +56,8 @@ ENTRY(__boot_cpu_mode)
|
|||
ldr \reg3, [\reg2]
|
||||
ldr \reg1, [\reg2, \reg3]
|
||||
cmp \mode, \reg1 @ matches primary CPU boot mode?
|
||||
orrne r7, r7, #BOOT_CPU_MODE_MISMATCH
|
||||
strne r7, [r5, r6] @ record what happened and give up
|
||||
orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
|
||||
strne \reg1, [\reg2, \reg3] @ record what happened and give up
|
||||
.endm
|
||||
|
||||
#else /* ZIMAGE */
|
||||
|
|
|
@ -197,6 +197,7 @@ void machine_shutdown(void)
|
|||
*/
|
||||
void machine_halt(void)
|
||||
{
|
||||
local_irq_disable();
|
||||
smp_send_stop();
|
||||
|
||||
local_irq_disable();
|
||||
|
@ -211,6 +212,7 @@ void machine_halt(void)
|
|||
*/
|
||||
void machine_power_off(void)
|
||||
{
|
||||
local_irq_disable();
|
||||
smp_send_stop();
|
||||
|
||||
if (pm_power_off)
|
||||
|
@ -230,6 +232,7 @@ void machine_power_off(void)
|
|||
*/
|
||||
void machine_restart(char *cmd)
|
||||
{
|
||||
local_irq_disable();
|
||||
smp_send_stop();
|
||||
|
||||
arm_pm_restart(reboot_mode, cmd);
|
||||
|
@ -426,10 +429,11 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
#ifdef CONFIG_KUSER_HELPERS
|
||||
/*
|
||||
* The vectors page is always readable from user space for the
|
||||
* atomic helpers and the signal restart code. Insert it into the
|
||||
* gate_vma so that it is visible through ptrace and /proc/<pid>/mem.
|
||||
* atomic helpers. Insert it into the gate_vma so that it is visible
|
||||
* through ptrace and /proc/<pid>/mem.
|
||||
*/
|
||||
static struct vm_area_struct gate_vma = {
|
||||
.vm_start = 0xffff0000,
|
||||
|
@ -458,9 +462,48 @@ int in_gate_area_no_mm(unsigned long addr)
|
|||
{
|
||||
return in_gate_area(NULL, addr);
|
||||
}
|
||||
#define is_gate_vma(vma) ((vma) = &gate_vma)
|
||||
#else
|
||||
#define is_gate_vma(vma) 0
|
||||
#endif
|
||||
|
||||
const char *arch_vma_name(struct vm_area_struct *vma)
|
||||
{
|
||||
return (vma == &gate_vma) ? "[vectors]" : NULL;
|
||||
return is_gate_vma(vma) ? "[vectors]" :
|
||||
(vma->vm_mm && vma->vm_start == vma->vm_mm->context.sigpage) ?
|
||||
"[sigpage]" : NULL;
|
||||
}
|
||||
|
||||
static struct page *signal_page;
|
||||
extern struct page *get_signal_page(void);
|
||||
|
||||
int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
|
||||
{
|
||||
struct mm_struct *mm = current->mm;
|
||||
unsigned long addr;
|
||||
int ret;
|
||||
|
||||
if (!signal_page)
|
||||
signal_page = get_signal_page();
|
||||
if (!signal_page)
|
||||
return -ENOMEM;
|
||||
|
||||
down_write(&mm->mmap_sem);
|
||||
addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
|
||||
if (IS_ERR_VALUE(addr)) {
|
||||
ret = addr;
|
||||
goto up_fail;
|
||||
}
|
||||
|
||||
ret = install_special_mapping(mm, addr, PAGE_SIZE,
|
||||
VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
|
||||
&signal_page);
|
||||
|
||||
if (ret == 0)
|
||||
mm->context.sigpage = addr;
|
||||
|
||||
up_fail:
|
||||
up_write(&mm->mmap_sem);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -836,6 +836,8 @@ static int __init meminfo_cmp(const void *_a, const void *_b)
|
|||
void __init hyp_mode_check(void)
|
||||
{
|
||||
#ifdef CONFIG_ARM_VIRT_EXT
|
||||
sync_boot_mode();
|
||||
|
||||
if (is_hyp_mode_available()) {
|
||||
pr_info("CPU: All CPU(s) started in HYP mode.\n");
|
||||
pr_info("CPU: Virtualization extensions available.\n");
|
||||
|
@ -971,6 +973,7 @@ static const char *hwcap_str[] = {
|
|||
"vfpv4",
|
||||
"idiva",
|
||||
"idivt",
|
||||
"vfpd32",
|
||||
"lpae",
|
||||
NULL
|
||||
};
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/errno.h>
|
||||
#include <linux/random.h>
|
||||
#include <linux/signal.h>
|
||||
#include <linux/personality.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
@ -15,12 +16,11 @@
|
|||
|
||||
#include <asm/elf.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/traps.h>
|
||||
#include <asm/ucontext.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <asm/vfp.h>
|
||||
|
||||
#include "signal.h"
|
||||
|
||||
/*
|
||||
* For ARM syscalls, we encode the syscall number into the instruction.
|
||||
*/
|
||||
|
@ -40,11 +40,13 @@
|
|||
#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))
|
||||
#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
|
||||
|
||||
const unsigned long sigreturn_codes[7] = {
|
||||
static const unsigned long sigreturn_codes[7] = {
|
||||
MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN,
|
||||
MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN,
|
||||
};
|
||||
|
||||
static unsigned long signal_return_offset;
|
||||
|
||||
#ifdef CONFIG_CRUNCH
|
||||
static int preserve_crunch_context(struct crunch_sigframe __user *frame)
|
||||
{
|
||||
|
@ -400,14 +402,20 @@ setup_return(struct pt_regs *regs, struct ksignal *ksig,
|
|||
__put_user(sigreturn_codes[idx+1], rc+1))
|
||||
return 1;
|
||||
|
||||
if ((cpsr & MODE32_BIT) && !IS_ENABLED(CONFIG_ARM_MPU)) {
|
||||
#ifdef CONFIG_MMU
|
||||
if (cpsr & MODE32_BIT) {
|
||||
struct mm_struct *mm = current->mm;
|
||||
|
||||
/*
|
||||
* 32-bit code can use the new high-page
|
||||
* signal return code support except when the MPU has
|
||||
* protected the vectors page from PL0
|
||||
* 32-bit code can use the signal return page
|
||||
* except when the MPU has protected the vectors
|
||||
* page from PL0
|
||||
*/
|
||||
retcode = KERN_SIGRETURN_CODE + (idx << 2) + thumb;
|
||||
} else {
|
||||
retcode = mm->context.sigpage + signal_return_offset +
|
||||
(idx << 2) + thumb;
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
/*
|
||||
* Ensure that the instruction cache sees
|
||||
* the return code written onto the stack.
|
||||
|
@ -608,3 +616,33 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall)
|
|||
} while (thread_flags & _TIF_WORK_MASK);
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct page *get_signal_page(void)
|
||||
{
|
||||
unsigned long ptr;
|
||||
unsigned offset;
|
||||
struct page *page;
|
||||
void *addr;
|
||||
|
||||
page = alloc_pages(GFP_KERNEL, 0);
|
||||
|
||||
if (!page)
|
||||
return NULL;
|
||||
|
||||
addr = page_address(page);
|
||||
|
||||
/* Give the signal return code some randomness */
|
||||
offset = 0x200 + (get_random_int() & 0x7fc);
|
||||
signal_return_offset = offset;
|
||||
|
||||
/*
|
||||
* Copy signal return handlers into the vector page, and
|
||||
* set sigreturn to be a pointer to these.
|
||||
*/
|
||||
memcpy(addr + offset, sigreturn_codes, sizeof(sigreturn_codes));
|
||||
|
||||
ptr = (unsigned long)addr + offset;
|
||||
flush_icache_range(ptr, ptr + sizeof(sigreturn_codes));
|
||||
|
||||
return page;
|
||||
}
|
||||
|
|
|
@ -1,12 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/kernel/signal.h
|
||||
*
|
||||
* Copyright (C) 2005-2009 Russell King.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
|
||||
|
||||
extern const unsigned long sigreturn_codes[7];
|
|
@ -70,23 +70,6 @@ static inline void ipi_flush_bp_all(void *ignored)
|
|||
local_flush_bp_all();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARM_ERRATA_798181
|
||||
static int erratum_a15_798181(void)
|
||||
{
|
||||
unsigned int midr = read_cpuid_id();
|
||||
|
||||
/* Cortex-A15 r0p0..r3p2 affected */
|
||||
if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
#else
|
||||
static int erratum_a15_798181(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void ipi_flush_tlb_a15_erratum(void *arg)
|
||||
{
|
||||
dmb();
|
||||
|
@ -121,7 +104,7 @@ void flush_tlb_all(void)
|
|||
if (tlb_ops_need_broadcast())
|
||||
on_each_cpu(ipi_flush_tlb_all, NULL, 1);
|
||||
else
|
||||
local_flush_tlb_all();
|
||||
__flush_tlb_all();
|
||||
broadcast_tlb_a15_erratum();
|
||||
}
|
||||
|
||||
|
@ -130,7 +113,7 @@ void flush_tlb_mm(struct mm_struct *mm)
|
|||
if (tlb_ops_need_broadcast())
|
||||
on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
|
||||
else
|
||||
local_flush_tlb_mm(mm);
|
||||
__flush_tlb_mm(mm);
|
||||
broadcast_tlb_mm_a15_erratum(mm);
|
||||
}
|
||||
|
||||
|
@ -143,7 +126,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
|||
on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
|
||||
&ta, 1);
|
||||
} else
|
||||
local_flush_tlb_page(vma, uaddr);
|
||||
__flush_tlb_page(vma, uaddr);
|
||||
broadcast_tlb_mm_a15_erratum(vma->vm_mm);
|
||||
}
|
||||
|
||||
|
@ -154,7 +137,7 @@ void flush_tlb_kernel_page(unsigned long kaddr)
|
|||
ta.ta_start = kaddr;
|
||||
on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
|
||||
} else
|
||||
local_flush_tlb_kernel_page(kaddr);
|
||||
__flush_tlb_kernel_page(kaddr);
|
||||
broadcast_tlb_a15_erratum();
|
||||
}
|
||||
|
||||
|
@ -190,5 +173,5 @@ void flush_bp_all(void)
|
|||
if (tlb_ops_need_broadcast())
|
||||
on_each_cpu(ipi_flush_bp_all, NULL, 1);
|
||||
else
|
||||
local_flush_bp_all();
|
||||
__flush_bp_all();
|
||||
}
|
||||
|
|
|
@ -35,8 +35,6 @@
|
|||
#include <asm/tls.h>
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
#include "signal.h"
|
||||
|
||||
static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
|
||||
|
||||
void *vectors_page;
|
||||
|
@ -800,15 +798,26 @@ void __init trap_init(void)
|
|||
return;
|
||||
}
|
||||
|
||||
static void __init kuser_get_tls_init(unsigned long vectors)
|
||||
#ifdef CONFIG_KUSER_HELPERS
|
||||
static void __init kuser_init(void *vectors)
|
||||
{
|
||||
extern char __kuser_helper_start[], __kuser_helper_end[];
|
||||
int kuser_sz = __kuser_helper_end - __kuser_helper_start;
|
||||
|
||||
memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
|
||||
|
||||
/*
|
||||
* vectors + 0xfe0 = __kuser_get_tls
|
||||
* vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8
|
||||
*/
|
||||
if (tls_emu || has_tls_reg)
|
||||
memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4);
|
||||
memcpy(vectors + 0xfe0, vectors + 0xfe8, 4);
|
||||
}
|
||||
#else
|
||||
static void __init kuser_init(void *vectors)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init early_trap_init(void *vectors_base)
|
||||
{
|
||||
|
@ -816,33 +825,30 @@ void __init early_trap_init(void *vectors_base)
|
|||
unsigned long vectors = (unsigned long)vectors_base;
|
||||
extern char __stubs_start[], __stubs_end[];
|
||||
extern char __vectors_start[], __vectors_end[];
|
||||
extern char __kuser_helper_start[], __kuser_helper_end[];
|
||||
int kuser_sz = __kuser_helper_end - __kuser_helper_start;
|
||||
unsigned i;
|
||||
|
||||
vectors_page = vectors_base;
|
||||
|
||||
/*
|
||||
* Poison the vectors page with an undefined instruction. This
|
||||
* instruction is chosen to be undefined for both ARM and Thumb
|
||||
* ISAs. The Thumb version is an undefined instruction with a
|
||||
* branch back to the undefined instruction.
|
||||
*/
|
||||
for (i = 0; i < PAGE_SIZE / sizeof(u32); i++)
|
||||
((u32 *)vectors_base)[i] = 0xe7fddef1;
|
||||
|
||||
/*
|
||||
* Copy the vectors, stubs and kuser helpers (in entry-armv.S)
|
||||
* into the vector page, mapped at 0xffff0000, and ensure these
|
||||
* are visible to the instruction stream.
|
||||
*/
|
||||
memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start);
|
||||
memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start);
|
||||
memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
|
||||
memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start);
|
||||
|
||||
/*
|
||||
* Do processor specific fixups for the kuser helpers
|
||||
*/
|
||||
kuser_get_tls_init(vectors);
|
||||
kuser_init(vectors_base);
|
||||
|
||||
/*
|
||||
* Copy signal return handlers into the vector page, and
|
||||
* set sigreturn to be a pointer to these.
|
||||
*/
|
||||
memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
|
||||
sigreturn_codes, sizeof(sigreturn_codes));
|
||||
|
||||
flush_icache_range(vectors, vectors + PAGE_SIZE);
|
||||
flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
|
||||
modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
|
||||
#else /* ifndef CONFIG_CPU_V7M */
|
||||
/*
|
||||
|
|
|
@ -148,6 +148,23 @@ SECTIONS
|
|||
. = ALIGN(PAGE_SIZE);
|
||||
__init_begin = .;
|
||||
#endif
|
||||
/*
|
||||
* The vectors and stubs are relocatable code, and the
|
||||
* only thing that matters is their relative offsets
|
||||
*/
|
||||
__vectors_start = .;
|
||||
.vectors 0 : AT(__vectors_start) {
|
||||
*(.vectors)
|
||||
}
|
||||
. = __vectors_start + SIZEOF(.vectors);
|
||||
__vectors_end = .;
|
||||
|
||||
__stubs_start = .;
|
||||
.stubs 0x1000 : AT(__stubs_start) {
|
||||
*(.stubs)
|
||||
}
|
||||
. = __stubs_start + SIZEOF(.stubs);
|
||||
__stubs_end = .;
|
||||
|
||||
INIT_TEXT_SECTION(8)
|
||||
.exit.text : {
|
||||
|
|
|
@ -142,7 +142,7 @@ target: @ We're now in the trampoline code, switch page tables
|
|||
|
||||
@ Invalidate the old TLBs
|
||||
mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH
|
||||
dsb
|
||||
dsb ish
|
||||
|
||||
eret
|
||||
|
||||
|
|
|
@ -55,7 +55,7 @@ ENTRY(__kvm_tlb_flush_vmid_ipa)
|
|||
mcrr p15, 6, r2, r3, c2 @ Write VTTBR
|
||||
isb
|
||||
mcr p15, 0, r0, c8, c3, 0 @ TLBIALLIS (rt ignored)
|
||||
dsb
|
||||
dsb ish
|
||||
isb
|
||||
mov r2, #0
|
||||
mov r3, #0
|
||||
|
@ -79,7 +79,7 @@ ENTRY(__kvm_flush_vm_context)
|
|||
mcr p15, 4, r0, c8, c3, 4
|
||||
/* Invalidate instruction caches Inner Shareable (ICIALLUIS) */
|
||||
mcr p15, 0, r0, c7, c1, 0
|
||||
dsb
|
||||
dsb ish
|
||||
isb @ Not necessary if followed by eret
|
||||
|
||||
bx lr
|
||||
|
|
|
@ -505,7 +505,7 @@ static struct vpbe_output dm365evm_vpbe_outputs[] = {
|
|||
/*
|
||||
* Amplifiers on the board
|
||||
*/
|
||||
struct ths7303_platform_data ths7303_pdata = {
|
||||
static struct ths7303_platform_data ths7303_pdata = {
|
||||
.ch_1 = 3,
|
||||
.ch_2 = 3,
|
||||
.ch_3 = 3,
|
||||
|
|
|
@ -860,7 +860,7 @@ static struct platform_device dm355_vpbe_display = {
|
|||
},
|
||||
};
|
||||
|
||||
struct venc_platform_data dm355_venc_pdata = {
|
||||
static struct venc_platform_data dm355_venc_pdata = {
|
||||
.setup_pinmux = dm355_vpbe_setup_pinmux,
|
||||
.setup_clock = dm355_venc_setup_clock,
|
||||
};
|
||||
|
|
|
@ -1349,7 +1349,7 @@ static struct platform_device dm365_vpbe_display = {
|
|||
},
|
||||
};
|
||||
|
||||
struct venc_platform_data dm365_venc_pdata = {
|
||||
static struct venc_platform_data dm365_venc_pdata = {
|
||||
.setup_pinmux = dm365_vpbe_setup_pinmux,
|
||||
.setup_clock = dm365_venc_setup_clock,
|
||||
};
|
||||
|
|
|
@ -92,6 +92,7 @@ config SOC_EXYNOS5440
|
|||
bool "SAMSUNG EXYNOS5440"
|
||||
default y
|
||||
depends on ARCH_EXYNOS5
|
||||
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
|
||||
select ARCH_HAS_OPP
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select AUTO_ZRELADDR
|
||||
|
|
|
@ -14,7 +14,7 @@ obj- :=
|
|||
|
||||
obj-$(CONFIG_ARCH_EXYNOS) += common.o
|
||||
|
||||
obj-$(CONFIG_PM) += pm.o
|
||||
obj-$(CONFIG_S5P_PM) += pm.o
|
||||
obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
|
||||
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
|
||||
|
||||
|
|
|
@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
|
|||
|
||||
static void exynos4_map_io(void);
|
||||
static void exynos5_map_io(void);
|
||||
static void exynos5440_map_io(void);
|
||||
static int exynos_init(void);
|
||||
|
||||
static struct cpu_table cpu_ids[] __initdata = {
|
||||
|
@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
}, {
|
||||
.idcode = EXYNOS5440_SOC_ID,
|
||||
.idmask = EXYNOS5_SOC_MASK,
|
||||
.map_io = exynos5440_map_io,
|
||||
.init = exynos_init,
|
||||
.name = name_exynos5440,
|
||||
},
|
||||
|
@ -149,11 +147,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_UART),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_CMU,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
|
||||
|
@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_UART),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct map_desc exynos5440_iodesc0[] __initdata = {
|
||||
{
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -388,11 +367,6 @@ static void __init exynos5_map_io(void)
|
|||
iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
|
||||
}
|
||||
|
||||
static void __init exynos5440_map_io(void)
|
||||
{
|
||||
iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
|
||||
}
|
||||
|
||||
void __init exynos_init_time(void)
|
||||
{
|
||||
of_clk_init(NULL);
|
||||
|
|
|
@ -97,6 +97,5 @@ struct exynos_pmu_conf {
|
|||
};
|
||||
|
||||
extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
|
||||
extern void s3c_cpu_resume(void);
|
||||
|
||||
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <mach/regs-pmu.h>
|
||||
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/pm.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
|
|
|
@ -15,8 +15,13 @@
|
|||
|
||||
#define PLAT_PHYS_OFFSET UL(0x40000000)
|
||||
|
||||
#ifndef CONFIG_ARM_LPAE
|
||||
/* Maximum of 256MiB in one bank */
|
||||
#define MAX_PHYSMEM_BITS 32
|
||||
#define SECTION_SIZE_BITS 28
|
||||
#else
|
||||
#define MAX_PHYSMEM_BITS 36
|
||||
#define SECTION_SIZE_BITS 31
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
|
|
|
@ -217,6 +217,9 @@ static __init int exynos_pm_drvinit(void)
|
|||
struct clk *pll_base;
|
||||
unsigned int tmp;
|
||||
|
||||
if (soc_is_exynos5440())
|
||||
return 0;
|
||||
|
||||
s3c_pm_init();
|
||||
|
||||
/* All wakeup disable */
|
||||
|
@ -340,6 +343,9 @@ static struct syscore_ops exynos_pm_syscore_ops = {
|
|||
|
||||
static __init int exynos_pm_syscore_init(void)
|
||||
{
|
||||
if (soc_is_exynos5440())
|
||||
return 0;
|
||||
|
||||
register_syscore_ops(&exynos_pm_syscore_ops);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -276,8 +276,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
|
|||
|
||||
sys->mem_offset = DC21285_PCI_MEM;
|
||||
|
||||
pci_ioremap_io(0, DC21285_PCI_IO);
|
||||
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
|
|
|
@ -115,6 +115,7 @@ static int highbank_platform_notifier(struct notifier_block *nb,
|
|||
{
|
||||
struct resource *res;
|
||||
int reg = -1;
|
||||
u32 val;
|
||||
struct device *dev = __dev;
|
||||
|
||||
if (event != BUS_NOTIFY_ADD_DEVICE)
|
||||
|
@ -141,10 +142,10 @@ static int highbank_platform_notifier(struct notifier_block *nb,
|
|||
return NOTIFY_DONE;
|
||||
|
||||
if (of_property_read_bool(dev->of_node, "dma-coherent")) {
|
||||
writel(0xff31, sregs_base + reg);
|
||||
val = readl(sregs_base + reg);
|
||||
writel(val | 0xff01, sregs_base + reg);
|
||||
set_dma_ops(dev, &arm_coherent_dma_ops);
|
||||
} else
|
||||
writel(0, sregs_base + reg);
|
||||
}
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
|
|
@ -199,7 +199,8 @@ static const char *pcie_axi_sels[] = { "axi", "ahb", };
|
|||
static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
|
||||
static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
|
||||
static const char *emi_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *emi_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
|
||||
static const char *emi_slow_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *vdo_axi_sels[] = { "axi", "ahb", };
|
||||
static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
|
||||
|
@ -392,7 +393,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
|
|||
clk[usdhc4_sel] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
|
||||
clk[enfc_sel] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels));
|
||||
clk[emi_sel] = imx_clk_mux("emi_sel", base + 0x1c, 27, 2, emi_sels, ARRAY_SIZE(emi_sels));
|
||||
clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_sels, ARRAY_SIZE(emi_sels));
|
||||
clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_slow_sels, ARRAY_SIZE(emi_slow_sels));
|
||||
clk[vdo_axi_sel] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels));
|
||||
clk[vpu_axi_sel] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels));
|
||||
clk[cko1_sel] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels));
|
||||
|
|
|
@ -183,6 +183,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
|
|||
clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
|
||||
clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
|
||||
clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);
|
||||
clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));
|
||||
clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));
|
||||
|
||||
clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));
|
||||
|
||||
|
|
|
@ -135,7 +135,7 @@
|
|||
#define MX27_INT_GPT4 (NR_IRQS_LEGACY + 4)
|
||||
#define MX27_INT_RTIC (NR_IRQS_LEGACY + 5)
|
||||
#define MX27_INT_CSPI3 (NR_IRQS_LEGACY + 6)
|
||||
#define MX27_INT_SDHC (NR_IRQS_LEGACY + 7)
|
||||
#define MX27_INT_MSHC (NR_IRQS_LEGACY + 7)
|
||||
#define MX27_INT_GPIO (NR_IRQS_LEGACY + 8)
|
||||
#define MX27_INT_SDHC3 (NR_IRQS_LEGACY + 9)
|
||||
#define MX27_INT_SDHC2 (NR_IRQS_LEGACY + 10)
|
||||
|
|
|
@ -49,7 +49,7 @@ static const char *keystone_match[] __initconst = {
|
|||
NULL,
|
||||
};
|
||||
|
||||
void keystone_restart(char mode, const char *cmd)
|
||||
void keystone_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
|
|
|
@ -62,7 +62,7 @@ config SOC_OMAP5
|
|||
select HAVE_SMP
|
||||
select COMMON_CLK
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select ARM_ERRATA_798181
|
||||
select ARM_ERRATA_798181 if SMP
|
||||
|
||||
config SOC_AM33XX
|
||||
bool "AM33XX support"
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/of_irq.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
|
@ -35,6 +36,21 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
|
|||
{ }
|
||||
};
|
||||
|
||||
/*
|
||||
* Create alias for USB host PHY clock.
|
||||
* Remove this when clock phandle can be provided via DT
|
||||
*/
|
||||
static void __init legacy_init_ehci_clk(char *clkname)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = clk_add_alias("main_clk", NULL, clkname, NULL);
|
||||
if (ret) {
|
||||
pr_err("%s:Failed to add main_clk alias to %s :%d\n",
|
||||
__func__, clkname, ret);
|
||||
}
|
||||
}
|
||||
|
||||
static void __init omap_generic_init(void)
|
||||
{
|
||||
omap_sdrc_init(NULL, NULL);
|
||||
|
@ -45,10 +61,15 @@ static void __init omap_generic_init(void)
|
|||
* HACK: call display setup code for selected boards to enable omapdss.
|
||||
* This will be removed when omapdss supports DT.
|
||||
*/
|
||||
if (of_machine_is_compatible("ti,omap4-panda"))
|
||||
if (of_machine_is_compatible("ti,omap4-panda")) {
|
||||
omap4_panda_display_init_of();
|
||||
legacy_init_ehci_clk("auxclk3_ck");
|
||||
|
||||
}
|
||||
else if (of_machine_is_compatible("ti,omap4-sdp"))
|
||||
omap_4430sdp_display_init_of();
|
||||
else if (of_machine_is_compatible("ti,omap5-uevm"))
|
||||
legacy_init_ehci_clk("auxclk1_ck");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
|
|
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