pinctrl: renesas: r8a779[56]x: Add MediaLB pins
This adds pins, groups, and functions for MediaLB devices on Renesas R-Car H3 and M3-W/N SoCs. Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Link: https://lore.kernel.org/r/20211007200250.20661-1-nikita.yoush@cogentembedded.com [geert: Fix automotive handling] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Коммит
ce34fb3cb4
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@ -2369,6 +2369,14 @@ static const unsigned int intc_ex_irq5_mux[] = {
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IRQ5_MARK,
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};
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/* - MLB+ ------------------------------------------------------------------- */
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static const unsigned int mlb_3pin_pins[] = {
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RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
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};
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static const unsigned int mlb_3pin_mux[] = {
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MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
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};
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_clk_pins[] = {
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/* SCK */
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@ -3987,6 +3995,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(intc_ex_irq3),
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SH_PFC_PIN_GROUP(intc_ex_irq4),
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SH_PFC_PIN_GROUP(intc_ex_irq5),
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SH_PFC_PIN_GROUP(mlb_3pin),
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SH_PFC_PIN_GROUP(msiof0_clk),
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SH_PFC_PIN_GROUP(msiof0_sync),
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SH_PFC_PIN_GROUP(msiof0_ss1),
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@ -4380,6 +4389,10 @@ static const char * const intc_ex_groups[] = {
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"intc_ex_irq5",
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};
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static const char * const mlb_3pin_groups[] = {
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"mlb_3pin",
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};
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static const char * const msiof0_groups[] = {
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"msiof0_clk",
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"msiof0_sync",
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@ -4709,6 +4722,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(i2c5),
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SH_PFC_FUNCTION(i2c6),
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SH_PFC_FUNCTION(intc_ex),
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SH_PFC_FUNCTION(mlb_3pin),
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SH_PFC_FUNCTION(msiof0),
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SH_PFC_FUNCTION(msiof1),
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SH_PFC_FUNCTION(msiof2),
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@ -2453,6 +2453,16 @@ static const unsigned int intc_ex_irq5_mux[] = {
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IRQ5_MARK,
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};
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#ifdef CONFIG_PINCTRL_PFC_R8A77951
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/* - MLB+ ------------------------------------------------------------------- */
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static const unsigned int mlb_3pin_pins[] = {
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RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
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};
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static const unsigned int mlb_3pin_mux[] = {
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MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
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};
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#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_clk_pins[] = {
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/* SCK */
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@ -4235,7 +4245,7 @@ static const unsigned int vin5_clk_mux[] = {
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static const struct {
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struct sh_pfc_pin_group common[328];
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#ifdef CONFIG_PINCTRL_PFC_R8A77951
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struct sh_pfc_pin_group automotive[30];
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struct sh_pfc_pin_group automotive[31];
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#endif
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} pinmux_groups = {
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.common = {
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@ -4600,6 +4610,7 @@ static const struct {
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SH_PFC_PIN_GROUP(drif3_ctrl_b),
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SH_PFC_PIN_GROUP(drif3_data0_b),
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SH_PFC_PIN_GROUP(drif3_data1_b),
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SH_PFC_PIN_GROUP(mlb_3pin),
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}
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#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
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};
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@ -4795,6 +4806,12 @@ static const char * const intc_ex_groups[] = {
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"intc_ex_irq5",
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};
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#ifdef CONFIG_PINCTRL_PFC_R8A77951
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static const char * const mlb_3pin_groups[] = {
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"mlb_3pin",
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};
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#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
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static const char * const msiof0_groups[] = {
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"msiof0_clk",
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"msiof0_sync",
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@ -5144,7 +5161,7 @@ static const char * const vin5_groups[] = {
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static const struct {
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struct sh_pfc_function common[55];
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#ifdef CONFIG_PINCTRL_PFC_R8A77951
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struct sh_pfc_function automotive[4];
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struct sh_pfc_function automotive[5];
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#endif
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} pinmux_functions = {
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.common = {
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@ -5210,6 +5227,7 @@ static const struct {
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SH_PFC_FUNCTION(drif1),
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(mlb_3pin),
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}
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#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
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};
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@ -2458,6 +2458,16 @@ static const unsigned int intc_ex_irq5_mux[] = {
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IRQ5_MARK,
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};
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#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
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/* - MLB+ ------------------------------------------------------------------- */
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static const unsigned int mlb_3pin_pins[] = {
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RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
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};
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static const unsigned int mlb_3pin_mux[] = {
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MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
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};
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#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_clk_pins[] = {
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/* SCK */
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@ -4210,7 +4220,7 @@ static const unsigned int vin5_clk_mux[] = {
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static const struct {
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struct sh_pfc_pin_group common[324];
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#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
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struct sh_pfc_pin_group automotive[30];
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struct sh_pfc_pin_group automotive[31];
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#endif
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} pinmux_groups = {
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.common = {
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@ -4571,6 +4581,7 @@ static const struct {
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SH_PFC_PIN_GROUP(drif3_ctrl_b),
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SH_PFC_PIN_GROUP(drif3_data0_b),
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SH_PFC_PIN_GROUP(drif3_data1_b),
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SH_PFC_PIN_GROUP(mlb_3pin),
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}
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#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
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};
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@ -4766,6 +4777,12 @@ static const char * const intc_ex_groups[] = {
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"intc_ex_irq5",
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};
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#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
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static const char * const mlb_3pin_groups[] = {
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"mlb_3pin",
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};
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#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
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static const char * const msiof0_groups[] = {
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"msiof0_clk",
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"msiof0_sync",
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@ -5102,7 +5119,7 @@ static const char * const vin5_groups[] = {
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static const struct {
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struct sh_pfc_function common[52];
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#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
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struct sh_pfc_function automotive[4];
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struct sh_pfc_function automotive[5];
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#endif
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} pinmux_functions = {
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.common = {
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@ -5165,6 +5182,7 @@ static const struct {
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SH_PFC_FUNCTION(drif1),
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(mlb_3pin),
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}
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#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
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};
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@ -2609,6 +2609,16 @@ static const unsigned int intc_ex_irq5_mux[] = {
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IRQ5_MARK,
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};
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#ifdef CONFIG_PINCTRL_PFC_R8A77965
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/* - MLB+ ------------------------------------------------------------------- */
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static const unsigned int mlb_3pin_pins[] = {
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RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
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};
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static const unsigned int mlb_3pin_mux[] = {
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MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
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};
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#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_clk_pins[] = {
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/* SCK */
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@ -4460,7 +4470,7 @@ static const unsigned int vin5_clk_mux[] = {
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static const struct {
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struct sh_pfc_pin_group common[326];
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#ifdef CONFIG_PINCTRL_PFC_R8A77965
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struct sh_pfc_pin_group automotive[30];
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struct sh_pfc_pin_group automotive[31];
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#endif
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} pinmux_groups = {
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.common = {
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@ -4823,6 +4833,7 @@ static const struct {
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SH_PFC_PIN_GROUP(drif3_ctrl_b),
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SH_PFC_PIN_GROUP(drif3_data0_b),
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SH_PFC_PIN_GROUP(drif3_data1_b),
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SH_PFC_PIN_GROUP(mlb_3pin),
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}
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#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
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};
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@ -5018,6 +5029,12 @@ static const char * const intc_ex_groups[] = {
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"intc_ex_irq5",
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};
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#ifdef CONFIG_PINCTRL_PFC_R8A77965
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static const char * const mlb_3pin_groups[] = {
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"mlb_3pin",
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};
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#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
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static const char * const msiof0_groups[] = {
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"msiof0_clk",
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"msiof0_sync",
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@ -5358,7 +5375,7 @@ static const char * const vin5_groups[] = {
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static const struct {
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struct sh_pfc_function common[53];
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#ifdef CONFIG_PINCTRL_PFC_R8A77965
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struct sh_pfc_function automotive[4];
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struct sh_pfc_function automotive[5];
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#endif
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} pinmux_functions = {
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.common = {
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@ -5422,6 +5439,7 @@ static const struct {
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SH_PFC_FUNCTION(drif1),
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(mlb_3pin),
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}
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#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
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};
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