arch,tile: Convert smp_mb__*()
Implement the new smp_mb__* ops as per the old ones. Signed-off-by: Peter Zijlstra <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/n/tip-euuabnf5a3u23fy4fq8m3jcg@git.kernel.org Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: Chen Gang <gang.chen@asianux.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -169,16 +169,6 @@ static inline void atomic64_set(atomic64_t *v, long long n)
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#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)
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/*
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* We need to barrier before modifying the word, since the _atomic_xxx()
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* routines just tns the lock and then read/modify/write of the word.
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* But after the word is updated, the routine issues an "mf" before returning,
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* and since it's a function call, we don't even need a compiler barrier.
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*/
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#define smp_mb__before_atomic_dec() smp_mb()
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#define smp_mb__before_atomic_inc() smp_mb()
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#define smp_mb__after_atomic_dec() do { } while (0)
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#define smp_mb__after_atomic_inc() do { } while (0)
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#endif /* !__ASSEMBLY__ */
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@ -105,12 +105,6 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
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/* Atomic dec and inc don't implement barrier, so provide them if needed. */
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#define smp_mb__before_atomic_dec() smp_mb()
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#define smp_mb__after_atomic_dec() smp_mb()
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#define smp_mb__before_atomic_inc() smp_mb()
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#define smp_mb__after_atomic_inc() smp_mb()
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/* Define this to indicate that cmpxchg is an efficient operation. */
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#define __HAVE_ARCH_CMPXCHG
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@ -72,6 +72,20 @@ mb_incoherent(void)
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#define mb() fast_mb()
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#define iob() fast_iob()
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#ifndef __tilegx__ /* 32 bit */
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/*
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* We need to barrier before modifying the word, since the _atomic_xxx()
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* routines just tns the lock and then read/modify/write of the word.
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* But after the word is updated, the routine issues an "mf" before returning,
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* and since it's a function call, we don't even need a compiler barrier.
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*/
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#define smp_mb__before_atomic() smp_mb()
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#define smp_mb__after_atomic() do { } while (0)
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#else /* 64 bit */
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#define smp_mb__before_atomic() smp_mb()
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#define smp_mb__after_atomic() smp_mb()
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#endif
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#include <asm-generic/barrier.h>
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#endif /* !__ASSEMBLY__ */
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@ -17,6 +17,7 @@
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#define _ASM_TILE_BITOPS_H
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#include <linux/types.h>
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#include <asm/barrier.h>
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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@ -49,8 +49,8 @@ static inline void set_bit(unsigned nr, volatile unsigned long *addr)
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* restricted to acting on a single-word quantity.
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*
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* clear_bit() may not contain a memory barrier, so if it is used for
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* locking purposes, you should call smp_mb__before_clear_bit() and/or
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* smp_mb__after_clear_bit() to ensure changes are visible on other cpus.
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* locking purposes, you should call smp_mb__before_atomic() and/or
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* smp_mb__after_atomic() to ensure changes are visible on other cpus.
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*/
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static inline void clear_bit(unsigned nr, volatile unsigned long *addr)
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{
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@ -121,10 +121,6 @@ static inline int test_and_change_bit(unsigned nr,
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return (_atomic_xor(addr, mask) & mask) != 0;
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}
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/* See discussion at smp_mb__before_atomic_dec() in <asm/atomic_32.h>. */
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() do {} while (0)
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#include <asm-generic/bitops/ext2-atomic.h>
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#endif /* _ASM_TILE_BITOPS_32_H */
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@ -32,10 +32,6 @@ static inline void clear_bit(unsigned nr, volatile unsigned long *addr)
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__insn_fetchand((void *)(addr + nr / BITS_PER_LONG), ~mask);
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}
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() smp_mb()
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static inline void change_bit(unsigned nr, volatile unsigned long *addr)
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{
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unsigned long mask = (1UL << (nr % BITS_PER_LONG));
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