pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375
The Marvell Armada 375 is a new ARM SoC from Marvell, part of the mvebu family, but using a Cortex-A9 CPU core. In terms of pin-muxing, it is similar to Armada 370 and XP for the register layout, only different in the number of available pins and their functions. Therefore, we simply use the existing drivers/pinctrl/mvebu/ infrastructure, with no other changes that the list of pins and corresponding functions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Thomas Petazzoni
Sebastian Hesselbarth
Родитель
78c2c3d3da
Коммит
ce3ed59dcd
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@ -0,0 +1,82 @@
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* Marvell Armada 375 SoC pinctrl driver for mpp
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Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
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part and usage.
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Required properties:
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- compatible: "marvell,88f6720-pinctrl"
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- reg: register specifier of MPP registers
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Available mpp pins/groups and functions:
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Note: brackets (x) are not part of the mpp name for marvell,function and given
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only for more detailed description in this document.
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name pins functions
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================================================================================
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mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
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mpp1 1 gpio, dev(ad3), spi0(mosi), spi1(mosi)
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mpp2 2 gpio, dev(ad4), ptp(eventreq), led(c0), audio(sdi)
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mpp3 3 gpio, dev(ad5), ptp(triggen), led(p3), audio(mclk)
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mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso)
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mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
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mpp6 6 gpio, dev(ad0), led(p1), audio(rclk)
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mpp7 7 gpio, dev(ad1), ptp(clk), led(p2), audio(extclk)
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mpp8 8 gpio, dev (bootcs), spi0(cs0), spi1(cs0)
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mpp9 9 gpio, nf(wen), spi0(sck), spi1(sck)
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mpp10 10 gpio, nf(ren), dram(vttctrl), led(c1)
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mpp11 11 gpio, dev(a0), led(c2), audio(sdo)
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mpp12 12 gpio, dev(a1), audio(bclk)
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mpp13 13 gpio, dev(readyn), pcie0(rstoutn), pcie1(rstoutn)
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mpp14 14 gpio, i2c0(sda), uart1(txd)
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mpp15 15 gpio, i2c0(sck), uart1(rxd)
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mpp16 16 gpio, uart0(txd)
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mpp17 17 gpio, uart0(rxd)
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mpp18 18 gpio, tdm(intn)
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mpp19 19 gpio, tdm(rstn)
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mpp20 20 gpio, tdm(pclk)
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mpp21 21 gpio, tdm(fsync)
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mpp22 22 gpio, tdm(drx)
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mpp23 23 gpio, tdm(dtx)
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mpp24 24 gpio, led(p0), ge1(rxd0), sd(cmd), uart0(rts)
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mpp25 25 gpio, led(p2), ge1(rxd1), sd(d0), uart0(cts)
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mpp26 26 gpio, pcie0(clkreq), ge1(rxd2), sd(d2), uart1(rts)
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mpp27 27 gpio, pcie1(clkreq), ge1(rxd3), sd(d1), uart1(cts)
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mpp28 28 gpio, led(p3), ge1(txctl), sd(clk)
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mpp29 29 gpio, pcie1(clkreq), ge1(rxclk), sd(d3)
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mpp30 30 gpio, ge1(txd0), spi1(cs0)
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mpp31 31 gpio, ge1(txd1), spi1(mosi)
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mpp32 32 gpio, ge1(txd2), spi1(sck), ptp(triggen)
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mpp33 33 gpio, ge1(txd3), spi1(miso)
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mpp34 34 gpio, ge1(txclkout), spi1(sck)
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mpp35 35 gpio, ge1(rxctl), spi1(cs1), spi0(cs2)
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mpp36 36 gpio, pcie0(clkreq)
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mpp37 37 gpio, pcie0(clkreq), tdm(intn), ge(mdc)
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mpp38 38 gpio, pcie1(clkreq), ge(mdio)
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mpp39 39 gpio, ref(clkout)
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mpp40 40 gpio, uart1(txd)
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mpp41 41 gpio, uart1(rxd)
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mpp42 42 gpio, spi1(cs2), led(c0)
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mpp43 43 gpio, sata0(prsnt), dram(vttctrl)
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mpp44 44 gpio, sata0(prsnt)
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mpp45 45 gpio, spi0(cs2), pcie0(rstoutn)
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mpp46 46 gpio, led(p0), ge0(txd0), ge1(txd0)
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mpp47 47 gpio, led(p1), ge0(txd1), ge1(txd1)
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mpp48 48 gpio, led(p2), ge0(txd2), ge1(txd2)
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mpp49 49 gpio, led(p3), ge0(txd3), ge1(txd3)
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mpp50 50 gpio, led(c0), ge0(rxd0), ge1(rxd0)
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mpp51 51 gpio, led(c1), ge0(rxd1), ge1(rxd1)
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mpp52 52 gpio, led(c2), ge0(rxd2), ge1(rxd2)
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mpp53 53 gpio, pcie1(rstoutn), ge0(rxd3), ge1(rxd3)
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mpp54 54 gpio, pcie0(rstoutn), ge0(rxctl), ge1(rxctl)
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mpp55 55 gpio, ge0(rxclk), ge1(rxclk)
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mpp56 56 gpio, ge0(txclkout), ge1(txclkout)
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mpp57 57 gpio, ge0(txctl), ge1(txctl)
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mpp58 58 gpio, led(c0)
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mpp59 59 gpio, led(c1)
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mpp60 60 gpio, uart1(txd), led(c2)
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mpp61 61 gpio, i2c1(sda), uart1(rxd), spi1(cs2), led(p0)
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mpp62 62 gpio, i2c1(sck), led(p1)
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mpp63 63 gpio, ptp(triggen), led(p2)
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mpp64 64 gpio, dram(vttctrl), led(p3)
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mpp65 65 gpio, sata1(prsnt)
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mpp66 66 gpio, ptp(eventreq), spi1(cs3)
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@ -17,6 +17,10 @@ config PINCTRL_ARMADA_370
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ARMADA_375
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ARMADA_XP
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bool
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select PINCTRL_MVEBU
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@ -2,4 +2,5 @@ obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
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obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
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obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
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obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
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obj-$(CONFIG_PINCTRL_ARMADA_375) += pinctrl-armada-375.o
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obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
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@ -0,0 +1,459 @@
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/*
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* Marvell Armada 375 pinctrl driver based on mvebu pinctrl core
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*
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* Copyright (C) 2012 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-mvebu.h"
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static void __iomem *mpp_base;
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static int armada_375_mpp_ctrl_get(unsigned pid, unsigned long *config)
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{
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return default_mpp_ctrl_get(mpp_base, pid, config);
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}
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static int armada_375_mpp_ctrl_set(unsigned pid, unsigned long config)
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{
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return default_mpp_ctrl_set(mpp_base, pid, config);
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}
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static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_MODE(0,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad2"),
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MPP_FUNCTION(0x2, "spi0", "cs1"),
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MPP_FUNCTION(0x3, "spi1", "cs1"),
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MPP_FUNCTION(0x5, "nand", "io2")),
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MPP_MODE(1,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad3"),
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MPP_FUNCTION(0x2, "spi0", "mosi"),
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MPP_FUNCTION(0x3, "spi1", "mosi"),
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MPP_FUNCTION(0x5, "nand", "io3")),
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MPP_MODE(2,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad4"),
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MPP_FUNCTION(0x2, "ptp", "eventreq"),
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MPP_FUNCTION(0x3, "led", "c0"),
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MPP_FUNCTION(0x4, "audio", "sdi"),
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MPP_FUNCTION(0x5, "nand", "io4"),
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MPP_FUNCTION(0x6, "spi1", "mosi")),
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MPP_MODE(3,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad5"),
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MPP_FUNCTION(0x2, "ptp", "triggen"),
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MPP_FUNCTION(0x3, "led", "p3"),
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MPP_FUNCTION(0x4, "audio", "mclk"),
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MPP_FUNCTION(0x5, "nand", "io5"),
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MPP_FUNCTION(0x6, "spi1", "miso")),
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MPP_MODE(4,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad6"),
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MPP_FUNCTION(0x2, "spi0", "miso"),
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MPP_FUNCTION(0x3, "spi1", "miso"),
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MPP_FUNCTION(0x5, "nand", "io6")),
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MPP_MODE(5,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad7"),
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MPP_FUNCTION(0x2, "spi0", "cs2"),
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MPP_FUNCTION(0x3, "spi1", "cs2"),
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MPP_FUNCTION(0x5, "nand", "io7"),
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MPP_FUNCTION(0x6, "spi1", "miso")),
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MPP_MODE(6,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad0"),
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MPP_FUNCTION(0x3, "led", "p1"),
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MPP_FUNCTION(0x4, "audio", "rclk"),
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MPP_FUNCTION(0x5, "nand", "io0")),
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MPP_MODE(7,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad1"),
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MPP_FUNCTION(0x2, "ptp", "clk"),
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MPP_FUNCTION(0x3, "led", "p2"),
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MPP_FUNCTION(0x4, "audio", "extclk"),
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MPP_FUNCTION(0x5, "nand", "io1")),
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MPP_MODE(8,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev ", "bootcs"),
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MPP_FUNCTION(0x2, "spi0", "cs0"),
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MPP_FUNCTION(0x3, "spi1", "cs0"),
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MPP_FUNCTION(0x5, "nand", "ce")),
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MPP_MODE(9,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "nf", "wen"),
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MPP_FUNCTION(0x2, "spi0", "sck"),
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MPP_FUNCTION(0x3, "spi1", "sck"),
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MPP_FUNCTION(0x5, "nand", "we")),
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MPP_MODE(10,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "nf", "ren"),
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MPP_FUNCTION(0x2, "dram", "vttctrl"),
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MPP_FUNCTION(0x3, "led", "c1"),
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MPP_FUNCTION(0x5, "nand", "re"),
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MPP_FUNCTION(0x6, "spi1", "sck")),
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MPP_MODE(11,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "a0"),
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MPP_FUNCTION(0x3, "led", "c2"),
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MPP_FUNCTION(0x4, "audio", "sdo"),
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MPP_FUNCTION(0x5, "nand", "cle")),
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MPP_MODE(12,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "a1"),
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MPP_FUNCTION(0x4, "audio", "bclk"),
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MPP_FUNCTION(0x5, "nand", "ale")),
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MPP_MODE(13,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "readyn"),
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MPP_FUNCTION(0x2, "pcie0", "rstoutn"),
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MPP_FUNCTION(0x3, "pcie1", "rstoutn"),
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MPP_FUNCTION(0x5, "nand", "rb"),
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MPP_FUNCTION(0x6, "spi1", "mosi")),
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MPP_MODE(14,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "i2c0", "sda"),
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MPP_FUNCTION(0x3, "uart1", "txd")),
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MPP_MODE(15,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "i2c0", "sck"),
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MPP_FUNCTION(0x3, "uart1", "rxd")),
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MPP_MODE(16,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "uart0", "txd")),
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MPP_MODE(17,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "uart0", "rxd")),
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MPP_MODE(18,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "intn")),
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MPP_MODE(19,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "rstn")),
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MPP_MODE(20,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "pclk")),
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MPP_MODE(21,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "fsync")),
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MPP_MODE(22,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "drx")),
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MPP_MODE(23,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "dtx")),
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MPP_MODE(24,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p0"),
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MPP_FUNCTION(0x2, "ge1", "rxd0"),
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MPP_FUNCTION(0x3, "sd", "cmd"),
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MPP_FUNCTION(0x4, "uart0", "rts"),
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MPP_FUNCTION(0x5, "spi0", "cs0"),
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MPP_FUNCTION(0x6, "dev", "cs1")),
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MPP_MODE(25,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p2"),
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MPP_FUNCTION(0x2, "ge1", "rxd1"),
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MPP_FUNCTION(0x3, "sd", "d0"),
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MPP_FUNCTION(0x4, "uart0", "cts"),
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MPP_FUNCTION(0x5, "spi0", "mosi"),
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MPP_FUNCTION(0x6, "dev", "cs2")),
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MPP_MODE(26,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie0", "clkreq"),
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MPP_FUNCTION(0x2, "ge1", "rxd2"),
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MPP_FUNCTION(0x3, "sd", "d2"),
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MPP_FUNCTION(0x4, "uart1", "rts"),
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MPP_FUNCTION(0x5, "spi0", "cs1"),
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MPP_FUNCTION(0x6, "led", "c1")),
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MPP_MODE(27,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie1", "clkreq"),
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MPP_FUNCTION(0x2, "ge1", "rxd3"),
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MPP_FUNCTION(0x3, "sd", "d1"),
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MPP_FUNCTION(0x4, "uart1", "cts"),
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MPP_FUNCTION(0x5, "spi0", "miso"),
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MPP_FUNCTION(0x6, "led", "c2")),
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MPP_MODE(28,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p3"),
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MPP_FUNCTION(0x2, "ge1", "txctl"),
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MPP_FUNCTION(0x3, "sd", "clk"),
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MPP_FUNCTION(0x5, "dram", "vttctrl")),
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MPP_MODE(29,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie1", "clkreq"),
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MPP_FUNCTION(0x2, "ge1", "rxclk"),
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MPP_FUNCTION(0x3, "sd", "d3"),
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MPP_FUNCTION(0x5, "spi0", "sck"),
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MPP_FUNCTION(0x6, "pcie0", "rstoutn")),
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MPP_MODE(30,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txd0"),
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MPP_FUNCTION(0x3, "spi1", "cs0"),
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||||
MPP_FUNCTION(0x5, "led", "p3"),
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MPP_FUNCTION(0x6, "ptp", "eventreq")),
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||||
MPP_MODE(31,
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MPP_FUNCTION(0x0, "gpio", NULL),
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||||
MPP_FUNCTION(0x2, "ge1", "txd1"),
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MPP_FUNCTION(0x3, "spi1", "mosi"),
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MPP_FUNCTION(0x5, "led", "p0")),
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MPP_MODE(32,
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MPP_FUNCTION(0x0, "gpio", NULL),
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||||
MPP_FUNCTION(0x2, "ge1", "txd2"),
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||||
MPP_FUNCTION(0x3, "spi1", "sck"),
|
||||
MPP_FUNCTION(0x4, "ptp", "triggen"),
|
||||
MPP_FUNCTION(0x5, "led", "c0")),
|
||||
MPP_MODE(33,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ge1", "txd3"),
|
||||
MPP_FUNCTION(0x3, "spi1", "miso"),
|
||||
MPP_FUNCTION(0x5, "led", "p2")),
|
||||
MPP_MODE(34,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ge1", "txclkout"),
|
||||
MPP_FUNCTION(0x3, "spi1", "sck"),
|
||||
MPP_FUNCTION(0x5, "led", "c1")),
|
||||
MPP_MODE(35,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ge1", "rxctl"),
|
||||
MPP_FUNCTION(0x3, "spi1", "cs1"),
|
||||
MPP_FUNCTION(0x4, "spi0", "cs2"),
|
||||
MPP_FUNCTION(0x5, "led", "p1")),
|
||||
MPP_MODE(36,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "pcie0", "clkreq"),
|
||||
MPP_FUNCTION(0x5, "led", "c2")),
|
||||
MPP_MODE(37,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "pcie0", "clkreq"),
|
||||
MPP_FUNCTION(0x2, "tdm", "intn"),
|
||||
MPP_FUNCTION(0x4, "ge", "mdc")),
|
||||
MPP_MODE(38,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "pcie1", "clkreq"),
|
||||
MPP_FUNCTION(0x4, "ge", "mdio")),
|
||||
MPP_MODE(39,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x4, "ref", "clkout"),
|
||||
MPP_FUNCTION(0x5, "led", "p3")),
|
||||
MPP_MODE(40,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x4, "uart1", "txd"),
|
||||
MPP_FUNCTION(0x5, "led", "p0")),
|
||||
MPP_MODE(41,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x4, "uart1", "rxd"),
|
||||
MPP_FUNCTION(0x5, "led", "p1")),
|
||||
MPP_MODE(42,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x3, "spi1", "cs2"),
|
||||
MPP_FUNCTION(0x4, "led", "c0"),
|
||||
MPP_FUNCTION(0x6, "ptp", "clk")),
|
||||
MPP_MODE(43,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "sata0", "prsnt"),
|
||||
MPP_FUNCTION(0x4, "dram", "vttctrl"),
|
||||
MPP_FUNCTION(0x5, "led", "c1")),
|
||||
MPP_MODE(44,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x4, "sata0", "prsnt")),
|
||||
MPP_MODE(45,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "spi0", "cs2"),
|
||||
MPP_FUNCTION(0x4, "pcie0", "rstoutn"),
|
||||
MPP_FUNCTION(0x5, "led", "c2"),
|
||||
MPP_FUNCTION(0x6, "spi1", "cs2")),
|
||||
MPP_MODE(46,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "led", "p0"),
|
||||
MPP_FUNCTION(0x2, "ge0", "txd0"),
|
||||
MPP_FUNCTION(0x3, "ge1", "txd0"),
|
||||
MPP_FUNCTION(0x6, "dev", "wen1")),
|
||||
MPP_MODE(47,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "led", "p1"),
|
||||
MPP_FUNCTION(0x2, "ge0", "txd1"),
|
||||
MPP_FUNCTION(0x3, "ge1", "txd1"),
|
||||
MPP_FUNCTION(0x5, "ptp", "triggen"),
|
||||
MPP_FUNCTION(0x6, "dev", "ale0")),
|
||||
MPP_MODE(48,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "led", "p2"),
|
||||
MPP_FUNCTION(0x2, "ge0", "txd2"),
|
||||
MPP_FUNCTION(0x3, "ge1", "txd2"),
|
||||
MPP_FUNCTION(0x6, "dev", "ale1")),
|
||||
MPP_MODE(49,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "led", "p3"),
|
||||
MPP_FUNCTION(0x2, "ge0", "txd3"),
|
||||
MPP_FUNCTION(0x3, "ge1", "txd3"),
|
||||
MPP_FUNCTION(0x6, "dev", "a2")),
|
||||
MPP_MODE(50,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "led", "c0"),
|
||||
MPP_FUNCTION(0x2, "ge0", "rxd0"),
|
||||
MPP_FUNCTION(0x3, "ge1", "rxd0"),
|
||||
MPP_FUNCTION(0x5, "ptp", "eventreq"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad12")),
|
||||
MPP_MODE(51,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "led", "c1"),
|
||||
MPP_FUNCTION(0x2, "ge0", "rxd1"),
|
||||
MPP_FUNCTION(0x3, "ge1", "rxd1"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad8")),
|
||||
MPP_MODE(52,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "led", "c2"),
|
||||
MPP_FUNCTION(0x2, "ge0", "rxd2"),
|
||||
MPP_FUNCTION(0x3, "ge1", "rxd2"),
|
||||
MPP_FUNCTION(0x5, "i2c0", "sda"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad9")),
|
||||
MPP_MODE(53,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "pcie1", "rstoutn"),
|
||||
MPP_FUNCTION(0x2, "ge0", "rxd3"),
|
||||
MPP_FUNCTION(0x3, "ge1", "rxd3"),
|
||||
MPP_FUNCTION(0x5, "i2c0", "sck"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad10")),
|
||||
MPP_MODE(54,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "pcie0", "rstoutn"),
|
||||
MPP_FUNCTION(0x2, "ge0", "rxctl"),
|
||||
MPP_FUNCTION(0x3, "ge1", "rxctl"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad11")),
|
||||
MPP_MODE(55,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ge0", "rxclk"),
|
||||
MPP_FUNCTION(0x3, "ge1", "rxclk"),
|
||||
MPP_FUNCTION(0x6, "dev", "cs0")),
|
||||
MPP_MODE(56,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ge0", "txclkout"),
|
||||
MPP_FUNCTION(0x3, "ge1", "txclkout"),
|
||||
MPP_FUNCTION(0x6, "dev", "oe")),
|
||||
MPP_MODE(57,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ge0", "txctl"),
|
||||
MPP_FUNCTION(0x3, "ge1", "txctl"),
|
||||
MPP_FUNCTION(0x6, "dev", "wen0")),
|
||||
MPP_MODE(58,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x4, "led", "c0")),
|
||||
MPP_MODE(59,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x4, "led", "c1")),
|
||||
MPP_MODE(60,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "uart1", "txd"),
|
||||
MPP_FUNCTION(0x4, "led", "c2"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad13")),
|
||||
MPP_MODE(61,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "i2c1", "sda"),
|
||||
MPP_FUNCTION(0x2, "uart1", "rxd"),
|
||||
MPP_FUNCTION(0x3, "spi1", "cs2"),
|
||||
MPP_FUNCTION(0x4, "led", "p0"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad14")),
|
||||
MPP_MODE(62,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "i2c1", "sck"),
|
||||
MPP_FUNCTION(0x4, "led", "p1"),
|
||||
MPP_FUNCTION(0x6, "dev", "ad15")),
|
||||
MPP_MODE(63,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ptp", "triggen"),
|
||||
MPP_FUNCTION(0x4, "led", "p2"),
|
||||
MPP_FUNCTION(0x6, "dev", "burst")),
|
||||
MPP_MODE(64,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "dram", "vttctrl"),
|
||||
MPP_FUNCTION(0x4, "led", "p3")),
|
||||
MPP_MODE(65,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x1, "sata1", "prsnt")),
|
||||
MPP_MODE(66,
|
||||
MPP_FUNCTION(0x0, "gpio", NULL),
|
||||
MPP_FUNCTION(0x2, "ptp", "eventreq"),
|
||||
MPP_FUNCTION(0x4, "spi1", "cs3"),
|
||||
MPP_FUNCTION(0x5, "pcie0", "rstoutn"),
|
||||
MPP_FUNCTION(0x6, "dev", "cs3")),
|
||||
};
|
||||
|
||||
static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info;
|
||||
|
||||
static struct of_device_id armada_375_pinctrl_of_match[] = {
|
||||
{ .compatible = "marvell,mv88f6720-pinctrl" },
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
|
||||
MPP_FUNC_CTRL(0, 69, NULL, armada_375_mpp_ctrl),
|
||||
};
|
||||
|
||||
static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = {
|
||||
MPP_GPIO_RANGE(0, 0, 0, 32),
|
||||
MPP_GPIO_RANGE(1, 32, 32, 32),
|
||||
MPP_GPIO_RANGE(2, 64, 64, 3),
|
||||
};
|
||||
|
||||
static int armada_375_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info;
|
||||
struct resource *res;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
mpp_base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(mpp_base))
|
||||
return PTR_ERR(mpp_base);
|
||||
|
||||
soc->variant = 0; /* no variants for Armada 375 */
|
||||
soc->controls = mv88f6720_mpp_controls;
|
||||
soc->ncontrols = ARRAY_SIZE(mv88f6720_mpp_controls);
|
||||
soc->modes = mv88f6720_mpp_modes;
|
||||
soc->nmodes = ARRAY_SIZE(mv88f6720_mpp_modes);
|
||||
soc->gpioranges = mv88f6720_mpp_gpio_ranges;
|
||||
soc->ngpioranges = ARRAY_SIZE(mv88f6720_mpp_gpio_ranges);
|
||||
|
||||
pdev->dev.platform_data = soc;
|
||||
|
||||
return mvebu_pinctrl_probe(pdev);
|
||||
}
|
||||
|
||||
static int armada_375_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
return mvebu_pinctrl_remove(pdev);
|
||||
}
|
||||
|
||||
static struct platform_driver armada_375_pinctrl_driver = {
|
||||
.driver = {
|
||||
.name = "armada-375-pinctrl",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(armada_375_pinctrl_of_match),
|
||||
},
|
||||
.probe = armada_375_pinctrl_probe,
|
||||
.remove = armada_375_pinctrl_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(armada_375_pinctrl_driver);
|
||||
|
||||
MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
|
||||
MODULE_DESCRIPTION("Marvell Armada 375 pinctrl driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Загрузка…
Ссылка в новой задаче