This release cycle's updates are mostly cleanup and some minor fixes.
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Merge tag 'pwm/for-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This release cycle's updates are mostly cleanup and some minor fixes"

* tag 'pwm/for-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  dt-bindings: pwm: renesas,pwm-rcar: Add r8a7742 support
  dt-bindings: pwm: renesas,tpu-pwm: Document r8a7742 support
  pwm: Allow store 64-bit duty cycle from sysfs interface
  pwm: img: Fix null pointer access in probe
  pwm: pca9685: Disable unused alternative addresses
  pwm: pca9685: Use BIT() macro instead of shift
  pwm: pca9685: Make comments more consistent
  pwm: sun4i: Simplify with dev_err_probe()
  pwm: sprd: Simplify with dev_err_probe()
  pwm: sifive: Simplify with dev_err_probe()
  pwm: rockchip: Simplify with dev_err_probe()
  pwm: jz4740: Simplify with dev_err_probe()
  pwm: bcm2835: Simplify with dev_err_probe()
  pwm: Convert to use DEFINE_SEQ_ATTRIBUTE macro
  pwm: rockchip: Keep enabled PWMs running while probing
  dt-bindings: pwm: renesas,pwm-rcar: Add r8a774e1 support
This commit is contained in:
Linus Torvalds 2020-10-22 12:51:32 -07:00
Родитель 00937f36b0 3b1954cd57
Коммит ceae608a54
12 изменённых файлов: 67 добавлений и 90 удалений

Просмотреть файл

@ -13,6 +13,7 @@ properties:
compatible:
items:
- enum:
- renesas,pwm-r8a7742 # RZ/G1H
- renesas,pwm-r8a7743 # RZ/G1M
- renesas,pwm-r8a7744 # RZ/G1N
- renesas,pwm-r8a7745 # RZ/G1E
@ -20,6 +21,7 @@ properties:
- renesas,pwm-r8a774a1 # RZ/G2M
- renesas,pwm-r8a774b1 # RZ/G2N
- renesas,pwm-r8a774c0 # RZ/G2E
- renesas,pwm-r8a774e1 # RZ/G2H
- renesas,pwm-r8a7778 # R-Car M1A
- renesas,pwm-r8a7779 # R-Car H1
- renesas,pwm-r8a7790 # R-Car H2

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@ -15,6 +15,7 @@ properties:
- enum:
- renesas,tpu-r8a73a4 # R-Mobile APE6
- renesas,tpu-r8a7740 # R-Mobile A1
- renesas,tpu-r8a7742 # RZ/G1H
- renesas,tpu-r8a7743 # RZ/G1M
- renesas,tpu-r8a7744 # RZ/G1N
- renesas,tpu-r8a7745 # RZ/G1E

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@ -1327,30 +1327,19 @@ static int pwm_seq_show(struct seq_file *s, void *v)
return 0;
}
static const struct seq_operations pwm_seq_ops = {
static const struct seq_operations pwm_debugfs_sops = {
.start = pwm_seq_start,
.next = pwm_seq_next,
.stop = pwm_seq_stop,
.show = pwm_seq_show,
};
static int pwm_seq_open(struct inode *inode, struct file *file)
{
return seq_open(file, &pwm_seq_ops);
}
static const struct file_operations pwm_debugfs_ops = {
.owner = THIS_MODULE,
.open = pwm_seq_open,
.read = seq_read,
.llseek = seq_lseek,
.release = seq_release,
};
DEFINE_SEQ_ATTRIBUTE(pwm_debugfs);
static int __init pwm_debugfs_init(void)
{
debugfs_create_file("pwm", S_IFREG | S_IRUGO, NULL, NULL,
&pwm_debugfs_ops);
&pwm_debugfs_fops);
return 0;
}

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@ -152,13 +152,9 @@ static int bcm2835_pwm_probe(struct platform_device *pdev)
return PTR_ERR(pc->base);
pc->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(pc->clk)) {
ret = PTR_ERR(pc->clk);
if (ret != -EPROBE_DEFER)
dev_err(&pdev->dev, "clock not found: %d\n", ret);
return ret;
}
if (IS_ERR(pc->clk))
return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
"clock not found\n");
ret = clk_prepare_enable(pc->clk);
if (ret)

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@ -277,6 +277,8 @@ static int img_pwm_probe(struct platform_device *pdev)
return PTR_ERR(pwm->pwm_clk);
}
platform_set_drvdata(pdev, pwm);
pm_runtime_set_autosuspend_delay(&pdev->dev, IMG_PWM_PM_TIMEOUT);
pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_enable(&pdev->dev);
@ -313,7 +315,6 @@ static int img_pwm_probe(struct platform_device *pdev)
goto err_suspend;
}
platform_set_drvdata(pdev, pwm);
return 0;
err_suspend:

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@ -60,12 +60,9 @@ static int jz4740_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
snprintf(name, sizeof(name), "timer%u", pwm->hwpwm);
clk = clk_get(chip->dev, name);
if (IS_ERR(clk)) {
if (PTR_ERR(clk) != -EPROBE_DEFER)
dev_err(chip->dev, "Failed to get clock: %pe", clk);
return PTR_ERR(clk);
}
if (IS_ERR(clk))
return dev_err_probe(chip->dev, PTR_ERR(clk),
"Failed to get clock\n");
err = clk_prepare_enable(clk);
if (err < 0) {

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@ -57,10 +57,14 @@
#define PCA9685_NUMREGS 0xFF
#define PCA9685_MAXCHAN 0x10
#define LED_FULL (1 << 4)
#define MODE1_SLEEP (1 << 4)
#define MODE2_INVRT (1 << 4)
#define MODE2_OUTDRV (1 << 2)
#define LED_FULL BIT(4)
#define MODE1_ALLCALL BIT(0)
#define MODE1_SUB3 BIT(1)
#define MODE1_SUB2 BIT(2)
#define MODE1_SUB1 BIT(3)
#define MODE1_SLEEP BIT(4)
#define MODE2_INVRT BIT(4)
#define MODE2_OUTDRV BIT(2)
#define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N)))
#define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N)))
@ -91,7 +95,7 @@ static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx)
mutex_lock(&pca->lock);
if (pwm_idx >= PCA9685_MAXCHAN) {
/*
* "all LEDs" channel:
* "All LEDs" channel:
* pretend already in use if any of the PWMs are requested
*/
if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) {
@ -100,7 +104,7 @@ static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx)
}
} else {
/*
* regular channel:
* Regular channel:
* pretend already in use if the "all LEDs" channel is requested
*/
if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) {
@ -257,7 +261,7 @@ static int pca9685_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
if (prescale >= PCA9685_PRESCALE_MIN &&
prescale <= PCA9685_PRESCALE_MAX) {
/*
* putting the chip briefly into SLEEP mode
* Putting the chip briefly into SLEEP mode
* at this point won't interfere with the
* pm_runtime framework, because the pm_runtime
* state is guaranteed active here.
@ -443,8 +447,8 @@ static int pca9685_pwm_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct pca9685 *pca;
unsigned int reg;
int ret;
int mode2;
pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL);
if (!pca)
@ -461,26 +465,31 @@ static int pca9685_pwm_probe(struct i2c_client *client,
i2c_set_clientdata(client, pca);
regmap_read(pca->regmap, PCA9685_MODE2, &mode2);
regmap_read(pca->regmap, PCA9685_MODE2, &reg);
if (device_property_read_bool(&client->dev, "invert"))
mode2 |= MODE2_INVRT;
reg |= MODE2_INVRT;
else
mode2 &= ~MODE2_INVRT;
reg &= ~MODE2_INVRT;
if (device_property_read_bool(&client->dev, "open-drain"))
mode2 &= ~MODE2_OUTDRV;
reg &= ~MODE2_OUTDRV;
else
mode2 |= MODE2_OUTDRV;
reg |= MODE2_OUTDRV;
regmap_write(pca->regmap, PCA9685_MODE2, mode2);
regmap_write(pca->regmap, PCA9685_MODE2, reg);
/* clear all "full off" bits */
/* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */
regmap_read(pca->regmap, PCA9685_MODE1, &reg);
reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3);
regmap_write(pca->regmap, PCA9685_MODE1, reg);
/* Clear all "full off" bits */
regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, 0);
regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, 0);
pca->chip.ops = &pca9685_pwm_ops;
/* add an extra channel for ALL_LED */
/* Add an extra channel for ALL_LED */
pca->chip.npwm = PCA9685_MAXCHAN + 1;
pca->chip.dev = &client->dev;
@ -496,10 +505,10 @@ static int pca9685_pwm_probe(struct i2c_client *client,
return ret;
}
/* the chip comes out of power-up in the active state */
/* The chip comes out of power-up in the active state */
pm_runtime_set_active(&client->dev);
/*
* enable will put the chip into suspend, which is what we
* Enable will put the chip into suspend, which is what we
* want as all outputs are disabled at this point
*/
pm_runtime_enable(&client->dev);

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@ -288,6 +288,7 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
const struct of_device_id *id;
struct rockchip_pwm_chip *pc;
struct resource *r;
u32 enable_conf, ctrl;
int ret, count;
id = of_match_device(rockchip_pwm_dt_ids, &pdev->dev);
@ -306,13 +307,9 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
pc->clk = devm_clk_get(&pdev->dev, "pwm");
if (IS_ERR(pc->clk)) {
pc->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(pc->clk)) {
ret = PTR_ERR(pc->clk);
if (ret != -EPROBE_DEFER)
dev_err(&pdev->dev, "Can't get bus clk: %d\n",
ret);
return ret;
}
if (IS_ERR(pc->clk))
return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
"Can't get bus clk\n");
}
count = of_count_phandle_with_args(pdev->dev.of_node,
@ -362,7 +359,9 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
}
/* Keep the PWM clk enabled if the PWM appears to be up and running. */
if (!pwm_is_enabled(pc->chip.pwms))
enable_conf = pc->data->enable_conf;
ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl);
if ((ctrl & enable_conf) != enable_conf)
clk_disable(pc->clk);
return 0;

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@ -254,11 +254,9 @@ static int pwm_sifive_probe(struct platform_device *pdev)
return PTR_ERR(ddata->regs);
ddata->clk = devm_clk_get(dev, NULL);
if (IS_ERR(ddata->clk)) {
if (PTR_ERR(ddata->clk) != -EPROBE_DEFER)
dev_err(dev, "Unable to find controller clock\n");
return PTR_ERR(ddata->clk);
}
if (IS_ERR(ddata->clk))
return dev_err_probe(dev, PTR_ERR(ddata->clk),
"Unable to find controller clock\n");
ret = clk_prepare_enable(ddata->clk);
if (ret) {

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@ -228,11 +228,8 @@ static int sprd_pwm_clk_init(struct sprd_pwm_chip *spc)
if (ret == -ENOENT)
break;
if (ret != -EPROBE_DEFER)
dev_err(spc->dev,
"failed to get channel clocks\n");
return ret;
return dev_err_probe(spc->dev, ret,
"failed to get channel clocks\n");
}
clk_pwm = chn->clks[SPRD_PWM_CHN_OUTPUT_CLK].clk;

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@ -423,38 +423,26 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
* back to the first clock of the PWM.
*/
pwm->clk = devm_clk_get_optional(&pdev->dev, "mod");
if (IS_ERR(pwm->clk)) {
if (PTR_ERR(pwm->clk) != -EPROBE_DEFER)
dev_err(&pdev->dev, "get mod clock failed %pe\n",
pwm->clk);
return PTR_ERR(pwm->clk);
}
if (IS_ERR(pwm->clk))
return dev_err_probe(&pdev->dev, PTR_ERR(pwm->clk),
"get mod clock failed\n");
if (!pwm->clk) {
pwm->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(pwm->clk)) {
if (PTR_ERR(pwm->clk) != -EPROBE_DEFER)
dev_err(&pdev->dev, "get unnamed clock failed %pe\n",
pwm->clk);
return PTR_ERR(pwm->clk);
}
if (IS_ERR(pwm->clk))
return dev_err_probe(&pdev->dev, PTR_ERR(pwm->clk),
"get unnamed clock failed\n");
}
pwm->bus_clk = devm_clk_get_optional(&pdev->dev, "bus");
if (IS_ERR(pwm->bus_clk)) {
if (PTR_ERR(pwm->bus_clk) != -EPROBE_DEFER)
dev_err(&pdev->dev, "get bus clock failed %pe\n",
pwm->bus_clk);
return PTR_ERR(pwm->bus_clk);
}
if (IS_ERR(pwm->bus_clk))
return dev_err_probe(&pdev->dev, PTR_ERR(pwm->bus_clk),
"get bus clock failed\n");
pwm->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
if (IS_ERR(pwm->rst)) {
if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
dev_err(&pdev->dev, "get reset failed %pe\n",
pwm->rst);
return PTR_ERR(pwm->rst);
}
if (IS_ERR(pwm->rst))
return dev_err_probe(&pdev->dev, PTR_ERR(pwm->rst),
"get reset failed\n");
/* Deassert reset */
ret = reset_control_deassert(pwm->rst);

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@ -87,10 +87,10 @@ static ssize_t duty_cycle_store(struct device *child,
struct pwm_export *export = child_to_pwm_export(child);
struct pwm_device *pwm = export->pwm;
struct pwm_state state;
unsigned int val;
u64 val;
int ret;
ret = kstrtouint(buf, 0, &val);
ret = kstrtou64(buf, 0, &val);
if (ret)
return ret;