drivers/video: fsl-diu-fb: don't touch registers for unused features

We don't use the writeback buffer, so don't initialize the registers for
that feature.

The default value for SYN_POL is already zero, so don't re-initialize it.

Writing the INT_STATUS register does nothing.

The value that we write to the PLUT register only makes sense on the
MPC8610 and P1022, so don't touch that register on the MPC5121.

Signed-off-by: Timur Tabi <timur@freescale.com>

drivers/video/fsl-diu-fb.c

@@ -825,12 +825,8 @@ static void update_lcdc(struct fb_info *info)
 	out_be32(&hw->gamma, DMA_ADDR(data, gamma));
 	out_be32(&hw->cursor, DMA_ADDR(data, cursor));
 
-	out_be32(&hw->bgnd, 0x007F7F7F); 	/* BGND */
+	out_be32(&hw->bgnd, 0x007F7F7F); /* Set background to grey */
-	out_be32(&hw->bgnd_wb, 0); 		/* BGND_WB */
+	out_be32(&hw->disp_size, (var->yres << 16) | var->xres);
-	out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
-						/* DISP SIZE */
-	out_be32(&hw->wb_size, 0); /* WB SIZE */
-	out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
 
 	/* Horizontal and vertical configuration register */
 	temp = var->left_margin << 22 | /* BP_H */
@@ -847,9 +843,20 @@ static void update_lcdc(struct fb_info *info)
 
 	diu_ops.set_pixel_clock(var->pixclock);
 
-	out_be32(&hw->syn_pol, 0);	/* SYNC SIGNALS POLARITY */
+#ifndef CONFIG_PPC_MPC512x
-	out_be32(&hw->int_status, 0);	/* INTERRUPT STATUS */
+	/*
+	 * The PLUT register is defined differently on the MPC5121 than it
+	 * is on other SOCs.  Unfortunately, there's no documentation that
+	 * explains how it's supposed to be programmed, so for now, we leave
+	 * it at the default value on the MPC5121.
+	 *
+	 * For other SOCs, program it for the highest priority, which will
+	 * reduce the chance of underrun. Technically, we should scale the
+	 * priority to match the screen resolution, but doing that properly
+	 * requires delicate fine-tuning for each use-case.
+	 */
 	out_be32(&hw->plut, 0x01F5F666);
+#endif
 
 	/* Enable the DIU */
 	enable_lcdc(info);