MIPS: ingenic: DTS: Respect cell count of common properties
If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N*X) cells. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Paul Cercueil
Thomas Bogendoerfer
Родитель
59bd128a41
Коммит
cf2e6b8e6f
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@ -55,10 +55,10 @@
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#clock-cells = <1>;
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clocks = <&cgu JZ4740_CLK_RTC
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&cgu JZ4740_CLK_EXT
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&cgu JZ4740_CLK_PCLK
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&cgu JZ4740_CLK_TCU>;
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clocks = <&cgu JZ4740_CLK_RTC>,
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<&cgu JZ4740_CLK_EXT>,
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<&cgu JZ4740_CLK_PCLK>,
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<&cgu JZ4740_CLK_TCU>;
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clock-names = "rtc", "ext", "pclk", "tcu";
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interrupt-controller;
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@ -241,10 +241,10 @@
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reg = <0x13010000 0x54>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0x18000000 0x4000000
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2 0 0x14000000 0x4000000
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3 0 0x0c000000 0x4000000
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4 0 0x08000000 0x4000000>;
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ranges = <1 0 0x18000000 0x4000000>,
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<2 0 0x14000000 0x4000000>,
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<3 0 0x0c000000 0x4000000>,
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<4 0 0x08000000 0x4000000>;
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clocks = <&cgu JZ4740_CLK_MCLK>;
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};
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@ -258,8 +258,7 @@
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dmac: dma-controller@13020000 {
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compatible = "ingenic,jz4740-dma";
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reg = <0x13020000 0xbc
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0x13020300 0x14>;
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reg = <0x13020000 0xbc>, <0x13020300 0x14>;
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#dma-cells = <2>;
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interrupt-parent = <&intc>;
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@ -55,9 +55,9 @@
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#clock-cells = <1>;
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clocks = <&cgu JZ4770_CLK_RTC
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&cgu JZ4770_CLK_EXT
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&cgu JZ4770_CLK_PCLK>;
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clocks = <&cgu JZ4770_CLK_RTC>,
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<&cgu JZ4770_CLK_EXT>,
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<&cgu JZ4770_CLK_PCLK>;
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clock-names = "rtc", "ext", "pclk";
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interrupt-controller;
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@ -219,8 +219,7 @@
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dmac0: dma-controller@13420000 {
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compatible = "ingenic,jz4770-dma";
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reg = <0x13420000 0xC0
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0x13420300 0x20>;
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reg = <0x13420000 0xC0>, <0x13420300 0x20>;
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#dma-cells = <2>;
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@ -234,8 +233,7 @@
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dmac1: dma-controller@13420100 {
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compatible = "ingenic,jz4770-dma";
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reg = <0x13420100 0xC0
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0x13420400 0x20>;
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reg = <0x13420100 0xC0>, <0x13420400 0x20>;
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#dma-cells = <2>;
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@ -58,9 +58,9 @@
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#clock-cells = <1>;
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clocks = <&cgu JZ4780_CLK_RTCLK
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&cgu JZ4780_CLK_EXCLK
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&cgu JZ4780_CLK_PCLK>;
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clocks = <&cgu JZ4780_CLK_RTCLK>,
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<&cgu JZ4780_CLK_EXCLK>,
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<&cgu JZ4780_CLK_PCLK>;
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clock-names = "rtc", "ext", "pclk";
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interrupt-controller;
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@ -196,8 +196,7 @@
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gpio-miso = <&gpe 14 0>;
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gpio-sck = <&gpe 15 0>;
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gpio-mosi = <&gpe 17 0>;
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cs-gpios = <&gpe 16 0
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&gpe 18 0>;
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cs-gpios = <&gpe 16 0>, <&gpe 18 0>;
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spidev@0 {
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compatible = "spidev";
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@ -362,13 +361,13 @@
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reg = <0x13410000 0x10000>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x13410000 0x10000
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1 0 0x1b000000 0x1000000
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2 0 0x1a000000 0x1000000
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3 0 0x19000000 0x1000000
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4 0 0x18000000 0x1000000
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5 0 0x17000000 0x1000000
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6 0 0x16000000 0x1000000>;
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ranges = <0 0 0x13410000 0x10000>,
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<1 0 0x1b000000 0x1000000>,
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<2 0 0x1a000000 0x1000000>,
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<3 0 0x19000000 0x1000000>,
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<4 0 0x18000000 0x1000000>,
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<5 0 0x17000000 0x1000000>,
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<6 0 0x16000000 0x1000000>;
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clocks = <&cgu JZ4780_CLK_NEMC>;
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@ -391,8 +390,7 @@
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dma: dma@13420000 {
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compatible = "ingenic,jz4780-dma";
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reg = <0x13420000 0x400
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0x13421000 0x40>;
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reg = <0x13420000 0x400>, <0x13421000 0x40>;
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#dma-cells = <2>;
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interrupt-parent = <&intc>;
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@ -58,9 +58,9 @@
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#clock-cells = <1>;
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clocks = <&cgu X1000_CLK_RTCLK
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&cgu X1000_CLK_EXCLK
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&cgu X1000_CLK_PCLK>;
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clocks = <&cgu X1000_CLK_RTCLK>,
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<&cgu X1000_CLK_EXCLK>,
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<&cgu X1000_CLK_PCLK>;
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clock-names = "rtc", "ext", "pclk";
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interrupt-controller;
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@ -239,8 +239,7 @@
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pdma: dma-controller@13420000 {
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compatible = "ingenic,x1000-dma";
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reg = <0x13420000 0x400
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0x13421000 0x40>;
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reg = <0x13420000 0x400>, <0x13421000 0x40>;
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#dma-cells = <2>;
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interrupt-parent = <&intc>;
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