staging: sm750fb: remove '#if 1' conditionals
The code enclosed in '#if 1' anyway gets compiled. Removing useless conditionals. Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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f741554e25
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cfac7d6a70
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@ -60,11 +60,10 @@ static void setChipClock(unsigned int frequency)
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{
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pll_value_t pll;
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unsigned int ulActualMxClk;
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#if 1
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/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
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if (getChipType() == SM750LE)
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return;
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#endif
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if (frequency) {
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/*
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@ -88,11 +87,11 @@ static void setChipClock(unsigned int frequency)
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static void setMemoryClock(unsigned int frequency)
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{
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unsigned int ulReg, divisor;
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#if 1
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/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
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if (getChipType() == SM750LE)
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return;
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#endif
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if (frequency) {
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/* Set the frequency to the maximum frequency that the DDR Memory can take
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which is 336MHz. */
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@ -135,11 +134,11 @@ static void setMemoryClock(unsigned int frequency)
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static void setMasterClock(unsigned int frequency)
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{
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unsigned int ulReg, divisor;
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#if 1
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/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
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if (getChipType() == SM750LE)
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return;
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#endif
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if (frequency) {
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/* Set the frequency to the maximum frequency that the SM750 engine can
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run, which is about 190 MHz. */
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@ -332,13 +331,11 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
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unsigned int tmpClock, ret;
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pllcalparam *xparm;
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#if 1
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if (getChipType() == SM750LE) {
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/* SM750LE don't have prgrammable PLL and M/N values to work on.
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Just return the requested clock. */
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return request_orig;
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}
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#endif
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ret = 0;
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mini_diff = ~0;
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@ -168,14 +168,13 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
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*/
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POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
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#if 1
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while ((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) {
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cnt++;
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if (cnt > 1000)
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break;
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POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
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}
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#endif
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} else {
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ret = -1;
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}
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@ -276,7 +276,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
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ret = 0;
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par = container_of(crtc, struct lynxfb_par, crtc);
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share = par->share;
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#if 1
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if (!share->accel_off) {
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/* set 2d engine pixel format according to mode bpp */
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switch (var->bits_per_pixel) {
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@ -293,7 +293,6 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
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}
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hw_set2dformat(&share->accel, fmt);
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}
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#endif
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/* set timing */
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modparm.pixel_clock = ps_to_hz(var->pixclock);
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