Merge branch 'x86-apic-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-apic-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: apic: Cleanup and simplify setup_local_APIC() x86: Further simplify mp_irq info handling x86: Unify 3 similar ways of saving mp_irqs info x86, ioapic: Avoid writing io_apic id if already correct x86, x2apic: Don't map lapic addr for preenabled x2apic systems x86, sfi: Use register_lapic_address() x86, apic: Use register_lapic_address() in init_apic_mapping() x86, apic: Remove early_init_lapic_mapping() x86, apic: Unify identical register_lapic_address() functions
This commit is contained in:
Коммит
d004e4d332
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@ -234,6 +234,7 @@ extern void init_bsp_APIC(void);
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extern void setup_local_APIC(void);
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extern void end_local_APIC_setup(void);
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extern void init_apic_mappings(void);
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void register_lapic_address(unsigned long address);
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extern void setup_boot_APIC_clock(void);
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extern void setup_secondary_APIC_clock(void);
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extern int APIC_init_uniprocessor(void);
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@ -244,7 +245,6 @@ extern int apic_force_enable(void);
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* On 32bit this is mach-xxx local
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*/
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#ifdef CONFIG_X86_64
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extern void early_init_lapic_mapping(void);
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extern int apic_is_clustered_box(void);
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#else
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static inline int apic_is_clustered_box(void)
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@ -169,6 +169,7 @@ extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
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extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
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extern int get_nr_irqs_gsi(void);
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extern void setup_ioapic_ids_from_mpc(void);
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extern void setup_ioapic_ids_from_mpc_nocheck(void);
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@ -183,6 +184,8 @@ int mp_find_ioapic_pin(int ioapic, u32 gsi);
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void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
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extern void __init pre_init_apic_IRQ0(void);
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extern void mp_save_irq(struct mpc_intsrc *m);
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#else /* !CONFIG_X86_IO_APIC */
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#define io_apic_assign_pci_irqs 0
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@ -852,18 +852,6 @@ static int __init acpi_parse_fadt(struct acpi_table_header *table)
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* returns 0 on success, < 0 on error
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*/
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static void __init acpi_register_lapic_address(unsigned long address)
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{
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mp_lapic_addr = address;
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set_fixmap_nocache(FIX_APIC_BASE, address);
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if (boot_cpu_physical_apicid == -1U) {
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boot_cpu_physical_apicid = read_apic_id();
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apic_version[boot_cpu_physical_apicid] =
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GET_APIC_VERSION(apic_read(APIC_LVR));
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}
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}
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static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
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{
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int count;
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@ -885,7 +873,7 @@ static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
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return count;
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}
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acpi_register_lapic_address(acpi_lapic_addr);
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register_lapic_address(acpi_lapic_addr);
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return count;
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}
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@ -912,7 +900,7 @@ static int __init acpi_parse_madt_lapic_entries(void)
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return count;
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}
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acpi_register_lapic_address(acpi_lapic_addr);
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register_lapic_address(acpi_lapic_addr);
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count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC,
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acpi_parse_sapic, MAX_LOCAL_APIC);
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@ -954,32 +942,6 @@ static int __init acpi_parse_madt_lapic_entries(void)
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extern int es7000_plat;
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#endif
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static void assign_to_mp_irq(struct mpc_intsrc *m,
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struct mpc_intsrc *mp_irq)
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{
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memcpy(mp_irq, m, sizeof(struct mpc_intsrc));
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}
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static int mp_irq_cmp(struct mpc_intsrc *mp_irq,
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struct mpc_intsrc *m)
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{
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return memcmp(mp_irq, m, sizeof(struct mpc_intsrc));
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}
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static void save_mp_irq(struct mpc_intsrc *m)
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{
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int i;
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for (i = 0; i < mp_irq_entries; i++) {
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if (!mp_irq_cmp(&mp_irqs[i], m))
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return;
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}
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assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
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if (++mp_irq_entries == MAX_IRQ_SOURCES)
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panic("Max # of irq sources exceeded!!\n");
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}
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void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
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{
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int ioapic;
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@ -1010,7 +972,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
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mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */
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mp_irq.dstirq = pin; /* INTIN# */
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save_mp_irq(&mp_irq);
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mp_save_irq(&mp_irq);
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isa_irq_to_gsi[bus_irq] = gsi;
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}
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@ -1085,7 +1047,7 @@ void __init mp_config_acpi_legacy_irqs(void)
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mp_irq.srcbusirq = i; /* Identity mapped */
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mp_irq.dstirq = pin;
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save_mp_irq(&mp_irq);
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mp_save_irq(&mp_irq);
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}
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}
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@ -1122,7 +1084,7 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
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mp_irq.dstapic = mp_ioapics[ioapic].apicid;
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mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
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save_mp_irq(&mp_irq);
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mp_save_irq(&mp_irq);
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#endif
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return 0;
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}
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@ -1191,12 +1191,15 @@ static void __cpuinit lapic_setup_esr(void)
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oldvalue, value);
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}
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/**
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* setup_local_APIC - setup the local APIC
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*
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* Used to setup local APIC while initializing BSP or bringin up APs.
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* Always called with preemption disabled.
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*/
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void __cpuinit setup_local_APIC(void)
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{
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int cpu = smp_processor_id();
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unsigned int value, queued;
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int i, j, acked = 0;
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unsigned long long tsc = 0, ntsc;
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@ -1221,8 +1224,6 @@ void __cpuinit setup_local_APIC(void)
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#endif
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perf_events_lapic_init();
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preempt_disable();
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/*
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* Double-check whether this APIC is really registered.
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* This is meaningless in clustered apic mode, so we skip it.
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@ -1338,21 +1339,19 @@ void __cpuinit setup_local_APIC(void)
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* TODO: set up through-local-APIC from through-I/O-APIC? --macro
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*/
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value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
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if (!smp_processor_id() && (pic_mode || !value)) {
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if (!cpu && (pic_mode || !value)) {
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value = APIC_DM_EXTINT;
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apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n",
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smp_processor_id());
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apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu);
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} else {
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value = APIC_DM_EXTINT | APIC_LVT_MASKED;
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apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n",
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smp_processor_id());
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apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu);
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}
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apic_write(APIC_LVT0, value);
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/*
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* only the BP should see the LINT1 NMI signal, obviously.
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*/
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if (!smp_processor_id())
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if (!cpu)
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value = APIC_DM_NMI;
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else
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value = APIC_DM_NMI | APIC_LVT_MASKED;
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@ -1360,11 +1359,9 @@ void __cpuinit setup_local_APIC(void)
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value |= APIC_LVT_LEVEL_TRIGGER;
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apic_write(APIC_LVT1, value);
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preempt_enable();
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#ifdef CONFIG_X86_MCE_INTEL
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/* Recheck CMCI information after local APIC is up on CPU #0 */
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if (smp_processor_id() == 0)
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if (!cpu)
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cmci_recheck();
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#endif
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}
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@ -1633,28 +1630,6 @@ no_apic:
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}
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#endif
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#ifdef CONFIG_X86_64
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void __init early_init_lapic_mapping(void)
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{
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/*
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* If no local APIC can be found then go out
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* : it means there is no mpatable and MADT
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*/
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if (!smp_found_config)
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return;
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set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
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apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",
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APIC_BASE, mp_lapic_addr);
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/*
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* Fetch the APIC ID of the BSP in case we have a
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* default configuration (or the MP table is broken).
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*/
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boot_cpu_physical_apicid = read_apic_id();
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}
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#endif
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/**
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* init_apic_mappings - initialize APIC mappings
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*/
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@ -1680,10 +1655,7 @@ void __init init_apic_mappings(void)
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* acpi_register_lapic_address()
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*/
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if (!acpi_lapic && !smp_found_config)
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set_fixmap_nocache(FIX_APIC_BASE, apic_phys);
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apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n",
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APIC_BASE, apic_phys);
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register_lapic_address(apic_phys);
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}
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/*
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@ -1705,6 +1677,22 @@ void __init init_apic_mappings(void)
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}
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}
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void __init register_lapic_address(unsigned long address)
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{
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mp_lapic_addr = address;
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if (!x2apic_mode) {
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set_fixmap_nocache(FIX_APIC_BASE, address);
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apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",
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APIC_BASE, mp_lapic_addr);
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}
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if (boot_cpu_physical_apicid == -1U) {
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boot_cpu_physical_apicid = read_apic_id();
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apic_version[boot_cpu_physical_apicid] =
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GET_APIC_VERSION(apic_read(APIC_LVR));
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}
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}
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/*
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* This initializes the IO-APIC and APIC hardware if this is
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* a UP kernel.
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@ -125,6 +125,26 @@ static int __init parse_noapic(char *str)
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}
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early_param("noapic", parse_noapic);
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/* Will be called in mpparse/acpi/sfi codes for saving IRQ info */
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void mp_save_irq(struct mpc_intsrc *m)
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{
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int i;
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apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
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" IRQ %02x, APIC ID %x, APIC INT %02x\n",
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m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
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m->srcbusirq, m->dstapic, m->dstirq);
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for (i = 0; i < mp_irq_entries; i++) {
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if (!memcmp(&mp_irqs[i], m, sizeof(*m)))
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return;
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}
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memcpy(&mp_irqs[mp_irq_entries], m, sizeof(*m));
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if (++mp_irq_entries == MAX_IRQ_SOURCES)
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panic("Max # of irq sources exceeded!!\n");
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}
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struct irq_pin_list {
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int apic, pin;
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struct irq_pin_list *next;
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@ -135,6 +155,7 @@ static struct irq_pin_list *alloc_irq_pin_list(int node)
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return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node);
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}
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/* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */
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#ifdef CONFIG_SPARSE_IRQ
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static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY];
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@ -2006,9 +2027,12 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
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= mp_ioapics[apic_id].apicid;
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/*
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* Read the right value from the MPC table and
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* write it into the ID register.
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* Update the ID register according to the right value
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* from the MPC table if they are different.
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*/
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if (mp_ioapics[apic_id].apicid == reg_00.bits.ID)
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continue;
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apic_printk(APIC_VERBOSE, KERN_INFO
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"...changing IO-APIC physical APIC ID to %d ...",
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mp_ioapics[apic_id].apicid);
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@ -118,21 +118,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
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static void __init MP_ioapic_info(struct mpc_ioapic *m)
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{
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if (!(m->flags & MPC_APIC_USABLE))
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return;
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printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
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m->apicid, m->apicver, m->apicaddr);
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mp_register_ioapic(m->apicid, m->apicaddr, gsi_top);
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}
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static void print_MP_intsrc_info(struct mpc_intsrc *m)
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{
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apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
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" IRQ %02x, APIC ID %x, APIC INT %02x\n",
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m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
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m->srcbusirq, m->dstapic, m->dstirq);
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if (m->flags & MPC_APIC_USABLE)
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mp_register_ioapic(m->apicid, m->apicaddr, gsi_top);
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}
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static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
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@ -144,73 +131,11 @@ static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
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mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
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}
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static void __init assign_to_mp_irq(struct mpc_intsrc *m,
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struct mpc_intsrc *mp_irq)
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{
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mp_irq->dstapic = m->dstapic;
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mp_irq->type = m->type;
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mp_irq->irqtype = m->irqtype;
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mp_irq->irqflag = m->irqflag;
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mp_irq->srcbus = m->srcbus;
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mp_irq->srcbusirq = m->srcbusirq;
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mp_irq->dstirq = m->dstirq;
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}
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static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
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struct mpc_intsrc *m)
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{
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m->dstapic = mp_irq->dstapic;
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m->type = mp_irq->type;
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m->irqtype = mp_irq->irqtype;
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m->irqflag = mp_irq->irqflag;
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m->srcbus = mp_irq->srcbus;
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m->srcbusirq = mp_irq->srcbusirq;
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m->dstirq = mp_irq->dstirq;
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}
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static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
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struct mpc_intsrc *m)
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{
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if (mp_irq->dstapic != m->dstapic)
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return 1;
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if (mp_irq->type != m->type)
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return 2;
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if (mp_irq->irqtype != m->irqtype)
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return 3;
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if (mp_irq->irqflag != m->irqflag)
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return 4;
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if (mp_irq->srcbus != m->srcbus)
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return 5;
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if (mp_irq->srcbusirq != m->srcbusirq)
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return 6;
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if (mp_irq->dstirq != m->dstirq)
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return 7;
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return 0;
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}
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static void __init MP_intsrc_info(struct mpc_intsrc *m)
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{
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int i;
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print_MP_intsrc_info(m);
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for (i = 0; i < mp_irq_entries; i++) {
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if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
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return;
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}
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assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
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if (++mp_irq_entries == MAX_IRQ_SOURCES)
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panic("Max # of irq sources exceeded!!\n");
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}
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#else /* CONFIG_X86_IO_APIC */
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static inline void __init MP_bus_info(struct mpc_bus *m) {}
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static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
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static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
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#endif /* CONFIG_X86_IO_APIC */
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static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
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{
|
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apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
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|
@ -222,7 +147,6 @@ static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
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/*
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* Read/parse the MPC
|
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*/
|
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|
||||
static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
|
||||
{
|
||||
|
||||
|
@ -275,18 +199,6 @@ static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
|
|||
|
||||
void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
|
||||
|
||||
static void __init smp_register_lapic_address(unsigned long address)
|
||||
{
|
||||
mp_lapic_addr = address;
|
||||
|
||||
set_fixmap_nocache(FIX_APIC_BASE, address);
|
||||
if (boot_cpu_physical_apicid == -1U) {
|
||||
boot_cpu_physical_apicid = read_apic_id();
|
||||
apic_version[boot_cpu_physical_apicid] =
|
||||
GET_APIC_VERSION(apic_read(APIC_LVR));
|
||||
}
|
||||
}
|
||||
|
||||
static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
|
||||
{
|
||||
char str[16];
|
||||
|
@ -301,17 +213,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
|
|||
#ifdef CONFIG_X86_32
|
||||
generic_mps_oem_check(mpc, oem, str);
|
||||
#endif
|
||||
/* save the local APIC address, it might be non-default */
|
||||
/* Initialize the lapic mapping */
|
||||
if (!acpi_lapic)
|
||||
mp_lapic_addr = mpc->lapic;
|
||||
register_lapic_address(mpc->lapic);
|
||||
|
||||
if (early)
|
||||
return 1;
|
||||
|
||||
/* Initialize the lapic mapping */
|
||||
if (!acpi_lapic)
|
||||
smp_register_lapic_address(mpc->lapic);
|
||||
|
||||
if (mpc->oemptr)
|
||||
x86_init.mpparse.smp_read_mpc_oem(mpc);
|
||||
|
||||
|
@ -337,7 +245,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
|
|||
skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
|
||||
break;
|
||||
case MP_INTSRC:
|
||||
MP_intsrc_info((struct mpc_intsrc *)mpt);
|
||||
mp_save_irq((struct mpc_intsrc *)mpt);
|
||||
skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
|
||||
break;
|
||||
case MP_LINTSRC:
|
||||
|
@ -429,13 +337,13 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type)
|
|||
|
||||
intsrc.srcbusirq = i;
|
||||
intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
|
||||
MP_intsrc_info(&intsrc);
|
||||
mp_save_irq(&intsrc);
|
||||
}
|
||||
|
||||
intsrc.irqtype = mp_ExtINT;
|
||||
intsrc.srcbusirq = 0;
|
||||
intsrc.dstirq = 0; /* 8259A to INTIN0 */
|
||||
MP_intsrc_info(&intsrc);
|
||||
mp_save_irq(&intsrc);
|
||||
}
|
||||
|
||||
|
||||
|
@ -784,11 +692,11 @@ static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
|
|||
int i;
|
||||
|
||||
apic_printk(APIC_VERBOSE, "OLD ");
|
||||
print_MP_intsrc_info(m);
|
||||
print_mp_irq_info(m);
|
||||
|
||||
i = get_MP_intsrc_index(m);
|
||||
if (i > 0) {
|
||||
assign_to_mpc_intsrc(&mp_irqs[i], m);
|
||||
memcpy(m, &mp_irqs[i], sizeof(*m));
|
||||
apic_printk(APIC_VERBOSE, "NEW ");
|
||||
print_mp_irq_info(&mp_irqs[i]);
|
||||
return;
|
||||
|
@ -875,14 +783,14 @@ static int __init replace_intsrc_all(struct mpc_table *mpc,
|
|||
if (nr_m_spare > 0) {
|
||||
apic_printk(APIC_VERBOSE, "*NEW* found\n");
|
||||
nr_m_spare--;
|
||||
assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
|
||||
memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i]));
|
||||
m_spare[nr_m_spare] = NULL;
|
||||
} else {
|
||||
struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
|
||||
count += sizeof(struct mpc_intsrc);
|
||||
if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
|
||||
goto out;
|
||||
assign_to_mpc_intsrc(&mp_irqs[i], m);
|
||||
memcpy(m, &mp_irqs[i], sizeof(*m));
|
||||
mpc->length = count;
|
||||
mpt += sizeof(struct mpc_intsrc);
|
||||
}
|
||||
|
|
|
@ -66,7 +66,6 @@ static __init void early_get_boot_cpu_id(void)
|
|||
if (smp_found_config)
|
||||
early_get_smp_config();
|
||||
#endif
|
||||
early_init_lapic_mapping();
|
||||
}
|
||||
|
||||
int __init amd_get_nodes(struct bootnode *physnodes)
|
||||
|
|
|
@ -71,32 +71,6 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
|
|||
EXPORT_SYMBOL_GPL(sfi_mrtc_array);
|
||||
int sfi_mrtc_num;
|
||||
|
||||
static inline void assign_to_mp_irq(struct mpc_intsrc *m,
|
||||
struct mpc_intsrc *mp_irq)
|
||||
{
|
||||
memcpy(mp_irq, m, sizeof(struct mpc_intsrc));
|
||||
}
|
||||
|
||||
static inline int mp_irq_cmp(struct mpc_intsrc *mp_irq,
|
||||
struct mpc_intsrc *m)
|
||||
{
|
||||
return memcmp(mp_irq, m, sizeof(struct mpc_intsrc));
|
||||
}
|
||||
|
||||
static void save_mp_irq(struct mpc_intsrc *m)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < mp_irq_entries; i++) {
|
||||
if (!mp_irq_cmp(&mp_irqs[i], m))
|
||||
return;
|
||||
}
|
||||
|
||||
assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
|
||||
if (++mp_irq_entries == MAX_IRQ_SOURCES)
|
||||
panic("Max # of irq sources exceeded!!\n");
|
||||
}
|
||||
|
||||
/* parse all the mtimer info to a static mtimer array */
|
||||
static int __init sfi_parse_mtmr(struct sfi_table_header *table)
|
||||
{
|
||||
|
@ -130,7 +104,7 @@ static int __init sfi_parse_mtmr(struct sfi_table_header *table)
|
|||
mp_irq.srcbusirq = pentry->irq; /* IRQ */
|
||||
mp_irq.dstapic = MP_APIC_ALL;
|
||||
mp_irq.dstirq = pentry->irq;
|
||||
save_mp_irq(&mp_irq);
|
||||
mp_save_irq(&mp_irq);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -200,7 +174,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table)
|
|||
mp_irq.srcbusirq = pentry->irq; /* IRQ */
|
||||
mp_irq.dstapic = MP_APIC_ALL;
|
||||
mp_irq.dstirq = pentry->irq;
|
||||
save_mp_irq(&mp_irq);
|
||||
mp_save_irq(&mp_irq);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -34,17 +34,6 @@
|
|||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
static unsigned long sfi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
|
||||
|
||||
static void __init mp_sfi_register_lapic_address(unsigned long address)
|
||||
{
|
||||
mp_lapic_addr = address;
|
||||
|
||||
set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
|
||||
if (boot_cpu_physical_apicid == -1U)
|
||||
boot_cpu_physical_apicid = read_apic_id();
|
||||
|
||||
pr_info("Boot CPU = %d\n", boot_cpu_physical_apicid);
|
||||
}
|
||||
|
||||
/* All CPUs enumerated by SFI must be present and enabled */
|
||||
static void __cpuinit mp_sfi_register_lapic(u8 id)
|
||||
{
|
||||
|
@ -110,7 +99,7 @@ static int __init sfi_parse_ioapic(struct sfi_table_header *table)
|
|||
int __init sfi_platform_init(void)
|
||||
{
|
||||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
mp_sfi_register_lapic_address(sfi_lapic_addr);
|
||||
register_lapic_address(sfi_lapic_addr);
|
||||
sfi_table_parse(SFI_SIG_CPUS, NULL, NULL, sfi_parse_cpus);
|
||||
#endif
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
|
|
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