Staging: sxg: Receive code and data structure cleanups
* Cleanup in recevive buffer structure * Drop receive data buffer as its not needed with use of skbs * Fix error code paths in receive skb failures Signed-off-by: LinSysSoft Sahara Team <saharaproj@linsyssoft.com> Signed-off-by: Christopher Harrer <charrer@alacritech.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Родитель
cb636fe382
Коммит
d0128aa9dc
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@ -114,6 +114,9 @@ static bool sxg_mac_filter(struct adapter_t *adapter,
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static struct net_device_stats *sxg_get_stats(struct net_device *dev);
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#endif
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void SxgFreeResources(struct adapter_t *adapter);
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void SxgFreeRcvBlocks(struct adapter_t *adapter);
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#define XXXTODO 0
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static int sxg_mac_set_address(struct net_device *dev, void *ptr);
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@ -532,8 +535,8 @@ static int sxg_allocate_resources(struct adapter_t *adapter)
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SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE);
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/* Sanity check receive data structure format */
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ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) ||
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(adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE));
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/* ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) ||
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(adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); */
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ASSERT(sizeof(struct sxg_rcv_descriptor_block) ==
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SXG_RCV_DESCRIPTOR_BLOCK_SIZE);
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@ -544,7 +547,7 @@ static int sxg_allocate_resources(struct adapter_t *adapter)
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for (i = 0; i < SXG_INITIAL_RCV_DATA_BUFFERS;
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i += SXG_RCV_DESCRIPTORS_PER_BLOCK) {
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sxg_allocate_buffer_memory(adapter,
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SXG_RCV_BLOCK_SIZE(adapter->ReceiveBufferSize),
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SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE),
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SXG_BUFFER_TYPE_RCV);
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}
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/*
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@ -651,8 +654,6 @@ static void sxg_config_pci(struct pci_dev *pcidev)
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}
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}
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static unsigned char temp_mac_address[6] =
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{ 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 };
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/*
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* sxg_read_config
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* @adapter : Pointer to the adapter structure for the card
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@ -694,10 +695,11 @@ static inline int sxg_read_config(struct adapter_t *adapter)
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/* Config read from Flash succeeded */
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case SXG_CFG_LOAD_FLASH:
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/* Copy the MAC address to adapter structure */
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memcpy(temp_mac_address, data->MacAddr[0].MacAddr, 6);
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/* TODO: We are not doing the remaining part : FRU,
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* etc
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*/
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memcpy(adapter->macaddr, data->MacAddr[0].MacAddr,
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sizeof(struct sxg_config_mac));
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break;
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case SXG_CFG_TIMEOUT:
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case SXG_CFG_LOAD_INVALID:
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@ -1446,7 +1448,6 @@ static void sxg_complete_slow_send(struct adapter_t *adapter)
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer,
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TRACE_IMPORTANT, "DmSndCmp", skb, 0,
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0, 0);
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printk("ASK:sxg_complete_slow_send: freeing an skb [%p]\n", skb);
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ASSERT(adapter->Stats.XmtQLen);
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adapter->Stats.XmtQLen--;/* within XmtZeroLock */
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adapter->Stats.XmtOk++;
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@ -1484,19 +1485,16 @@ static void sxg_complete_slow_send(struct adapter_t *adapter)
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static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter,
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struct sxg_event *Event)
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{
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u32 BufferSize = adapter->ReceiveBufferSize;
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struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr;
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struct sk_buff *Packet;
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unsigned char*data;
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int i;
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char dstr[128];
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char *dptr = dstr;
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RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) Event->HostHandle;
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ASSERT(RcvDataBufferHdr);
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ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD);
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "SlowRcv", Event,
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RcvDataBufferHdr, RcvDataBufferHdr->State,
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RcvDataBufferHdr->VirtualAddress);
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/*RcvDataBufferHdr->VirtualAddress*/ 0);
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/* Drop rcv frames in non-running state */
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switch (adapter->State) {
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case SXG_STATE_RUNNING:
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@ -1510,11 +1508,6 @@ static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter,
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goto drop;
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}
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printk("ASK:sxg_slow_receive:event host handle %p\n", RcvDataBufferHdr);
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data = SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr);
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for (i = 0; i < 32; i++)
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dptr += sprintf(dptr, "%02x ", (unsigned)data[i]);
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printk("ASK:sxg_slow_receive: data %s\n", dstr);
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/*
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* memcpy(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr),
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* RcvDataBufferHdr->VirtualAddress, Event->Length);
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@ -1564,15 +1557,19 @@ static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter,
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Packet = RcvDataBufferHdr->SxgDumbRcvPacket;
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SXG_ADJUST_RCV_PACKET(Packet, RcvDataBufferHdr, Event);
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Packet->protocol = eth_type_trans(Packet, adapter->netdev);
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printk("ASK:sxg_slow_receive: protocol %x\n",
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(unsigned) Packet->protocol);
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumbRcv",
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RcvDataBufferHdr, Packet, Event->Length, 0);
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/* Lastly adjust the receive packet length. */
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RcvDataBufferHdr->SxgDumbRcvPacket = NULL;
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SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr);
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SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize);
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if (RcvDataBufferHdr->skb)
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{
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spin_lock(&adapter->RcvQLock);
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SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr);
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adapter->RcvBuffersOnCard ++;
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spin_unlock(&adapter->RcvQLock);
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}
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return (Packet);
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drop:
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@ -1917,13 +1914,19 @@ static void __devexit sxg_entry_remove(struct pci_dev *pcidev)
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unsigned int mmio_len = 0;
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struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev);
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set_bit(ADAPT_DOWN, &adapter->state);
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flush_scheduled_work();
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/* Deallocate Resources */
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SxgFreeResources(adapter);
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ASSERT(adapter);
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DBG_ERROR("sxg: %s ENTER dev[%p] adapter[%p]\n", __func__, dev,
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adapter);
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sxg_deregister_interrupt(adapter);
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sxg_unmap_mmio_space(adapter);
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DBG_ERROR("sxg: %s unregister_netdev\n", __func__);
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unregister_netdev(dev);
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mmio_start = pci_resource_start(pcidev, 0);
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mmio_len = pci_resource_len(pcidev, 0);
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@ -1932,9 +1935,23 @@ static void __devexit sxg_entry_remove(struct pci_dev *pcidev)
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mmio_start, mmio_len);
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release_mem_region(mmio_start, mmio_len);
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/*
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DBG_ERROR("sxg: %s iounmap dev->base_addr[%x]\n", __func__,
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(unsigned int)dev->base_addr);
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iounmap((char *)dev->base_addr);
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*/
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mmio_start = pci_resource_start(pcidev, 2);
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mmio_len = pci_resource_len(pcidev, 2);
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DBG_ERROR("sxg: %s rel_region(2) start[%x] len[%x]\n", __FUNCTION__,
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mmio_start, mmio_len);
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release_mem_region(mmio_start, mmio_len);
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iounmap((char *)dev->base_addr);
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unregister_netdev(dev);
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//pci_release_regions(pcidev);
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//free_netdev(dev);
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pci_disable_device(pcidev);
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DBG_ERROR("sxg: %s deallocate device\n", __func__);
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kfree(dev);
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@ -1957,7 +1974,12 @@ static int sxg_entry_halt(struct net_device *dev)
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DBG_ERROR("sxg: %s (%s) EXIT\n", __func__, dev->name);
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DBG_ERROR("sxg: %s EXIT\n", __func__);
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/* Disable interrupts */
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SXG_DISABLE_ALL_INTERRUPTS(adapter);
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spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags);
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return (STATUS_SUCCESS);
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}
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@ -2080,8 +2102,8 @@ static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb)
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{
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struct sxg_x64_sgl *pSgl;
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struct sxg_scatter_gather *SxgSgl;
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void *SglBuffer;
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u32 SglBufferLength;
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/* void *SglBuffer; */
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/* u32 SglBufferLength; */
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/*
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* The vast majority of work is done in the shared
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@ -2100,8 +2122,8 @@ static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb)
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return (STATUS_RESOURCES);
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}
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ASSERT(SxgSgl->adapter == adapter);
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SglBuffer = SXG_SGL_BUFFER(SxgSgl);
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SglBufferLength = SXG_SGL_BUF_SIZE;
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/*SglBuffer = SXG_SGL_BUFFER(SxgSgl);
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SglBufferLength = SXG_SGL_BUF_SIZE; */
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SxgSgl->VlanTag.VlanTci = 0;
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SxgSgl->VlanTag.VlanTpid = 0;
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SxgSgl->Type = SXG_SGL_DUMB;
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@ -2138,17 +2160,9 @@ static void sxg_dumb_sgl(struct sxg_x64_sgl *pSgl,
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/* unsigned int BufLen; */
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/* u32 SglOffset; */
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u64 phys_addr;
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unsigned char*data;
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int i;
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char dstr[128];
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char *dptr = dstr;
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSgl",
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pSgl, SxgSgl, 0, 0);
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data = skb->data;
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for (i = 0; i < 32; i++)
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dptr += sprintf(dptr, "%02x ", (unsigned)data[i]);
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printk("ASK:sxg_dumb_sgl: data %s\n", dstr);
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/* Set aside a pointer to the sgl */
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SxgSgl->pSgl = pSgl;
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@ -2215,7 +2229,6 @@ static void sxg_dumb_sgl(struct sxg_x64_sgl *pSgl,
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XmtCmd->Buffer.TotalLength = DataLength;
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XmtCmd->SgEntries = 1;
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XmtCmd->Flags = 0;
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printk("ASK:sxg_dumb_sgl: wrote to xmit register\n");
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/*
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* Advance transmit cmd descripter by 1.
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* NOTE - See comments in SxgTcpOutput where we write
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@ -3034,7 +3047,6 @@ static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address)
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static void sxg_mcast_set_list(struct net_device *dev)
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{
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struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev);
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int status = STATUS_SUCCESS;
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ASSERT(adapter);
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if (dev->flags & IFF_PROMISC) {
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@ -3055,8 +3067,56 @@ static void sxg_unmap_mmio_space(struct adapter_t *adapter)
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*/
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#endif
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}
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/*
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void SxgFreeRcvBlocks(struct adapter_t *adapter)
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{
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u32 i;
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struct list_entry *ple;
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struct sxg_rcv_block_hdr *Hdr;
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struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr;
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u32 FreeBuffers = 0, FreeBlocks = 0;
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FrRcvBlk",
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adapter, 0, 0, 0);
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ASSERT((adapter->State == SXG_STATE_INITIALIZING) ||
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(pAdapt->State == SXG_STATE_HALTING));
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for(i = 0; i < SXG_MAX_CPU; i++) {
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FreeBuffers += pAdapt->PerCpuResources[i].FreeReceiveBuffers.Count;
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FreeBlocks += pAdapt->PerCpuResources[i].FreeReceiveBlocks.Count;
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pAdapt->PerCpuResources[i].FreeReceiveBuffers.Count = 0;
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pAdapt->PerCpuResources[i].FreeReceiveBuffers.FreeList = NULL;
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pAdapt->PerCpuResources[i].FreeReceiveBlocks.Count = 0;
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pAdapt->PerCpuResources[i].FreeReceiveBlocks.FreeList = NULL;
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}
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FreeBuffers += pAdapt->GlobalResources.FreeReceiveBuffers.Count;
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FreeBlocks += pAdapt->GlobalResources.FreeReceiveBlocks.Count;
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pAdapt->GlobalResources.FreeReceiveBuffers.Count = 0;
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pAdapt->GlobalResources.FreeReceiveBuffers.FreeList = NULL;
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pAdapt->GlobalResources.FreeReceiveBlocks.Count = 0;
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pAdapt->GlobalResources.FreeReceiveBlocks.FreeList = NULL;
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ASSERT(FreeBlocks == pAdapt->AllRcvBlockCount); // See SXG_RCV_BLOCK
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ASSERT(FreeBuffers ==
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(pAdapt->AllRcvBlockCount * SXG_RCV_DESCRIPTORS_PER_BLOCK)); // See SXG_RCV_BLOCK
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while(!(IsListEmpty(&pAdapt->AllRcvBlocks))) {
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ple = RemoveHeadList(&pAdapt->AllRcvBlocks);
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Hdr = CONTAINING_RECORD(ple, SXG_RCV_BLOCK_HDR, AllList);
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NdisMFreeSharedMemory(pAdapt->MiniportHandle,
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SXG_RCV_BLOCK_SIZE(pAdapt->ReceiveBufferSize),
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TRUE,
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Hdr->VirtualAddress,
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Hdr->PhysicalAddress);
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pAdapt->AllRcvBlockCount--;
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}
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ASSERT(pAdapt->AllRcvBlockCount == 0);
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SLIC_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk",
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pAdapt, 0, 0, 0);
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}
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*/
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//#if XXXTODO
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#if XXXTODO
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/*
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* SxgFreeResources - Free everything allocated in SxgAllocateResources
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*
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@ -3069,13 +3129,11 @@ static void sxg_unmap_mmio_space(struct adapter_t *adapter)
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void SxgFreeResources(struct adapter_t *adapter)
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{
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u32 RssIds, IsrCount;
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PTCP_OBJECT TcpObject;
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u32 i;
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BOOLEAN TimerCancelled;
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/*
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FreeRes",
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adapter, adapter->MaxTcbs, 0, 0);
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*/
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RssIds = SXG_RSS_CPU_COUNT(adapter);
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IsrCount = adapter->MsiEnabled ? RssIds : 1;
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@ -3086,57 +3144,77 @@ void SxgFreeResources(struct adapter_t *adapter)
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*/
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return;
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}
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/*
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if (!(IsListEmpty(&adapter->AllRcvBlocks))) {
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SxgFreeRcvBlocks(adapter);
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}
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if (!(IsListEmpty(&adapter->AllSglBuffers))) {
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SxgFreeSglBuffers(adapter);
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}
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/* Free event queues. */
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if (adapter->EventRings) {
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pci_free_consistent(adapter->pcidev,
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sizeof(struct sxg_event_ring) * RssIds,
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adapter->EventRings, adapter->PEventRings);
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}
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if (adapter->Isr) {
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pci_free_consistent(adapter->pcidev,
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sizeof(u32) * IsrCount,
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adapter->Isr, adapter->PIsr);
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}
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*/
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if (adapter->XmtRingZeroIndex) {
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pci_free_consistent(adapter->pcidev,
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sizeof(u32),
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adapter->XmtRingZeroIndex,
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adapter->PXmtRingZeroIndex);
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}
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if (adapter->IndirectionTable) {
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pci_free_consistent(adapter->pcidev,
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SXG_MAX_RSS_TABLE_SIZE,
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adapter->IndirectionTable,
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adapter->PIndirectionTable);
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}
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printk("VSS Free Isr\n");
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if (adapter->Isr) {
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pci_free_consistent(adapter->pcidev,
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sizeof(u32) * IsrCount,
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adapter->Isr, adapter->PIsr);
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}
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printk("VSS Free EventRings\n");
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if (adapter->EventRings) {
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pci_free_consistent(adapter->pcidev,
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sizeof(struct sxg_event_ring) * RssIds,
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adapter->EventRings, adapter->PEventRings);
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}
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/*
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printk("VSS Free RcvRings\n");
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if (adapter->RcvRings) {
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pci_free_consistent(adapter->pcidev,
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sizeof(struct sxg_rcv_ring) * 4096,
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adapter->RcvRings,
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adapter->PRcvRings);
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adapter->RcvRings = NULL;
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}
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printk("VSS Free XmtRings\n");
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if(adapter->XmtRings) {
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pci_free_consistent(adapter->pcidev,
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sizeof(struct sxg_xmt_ring) * 4096,
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adapter->XmtRings,
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adapter->PXmtRings);
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adapter->XmtRings = NULL;
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}
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*/
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/*
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SXG_FREE_PACKET_POOL(adapter->PacketPoolHandle);
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SXG_FREE_BUFFER_POOL(adapter->BufferPoolHandle);
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*/
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/* Unmap register spaces */
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SxgUnmapResources(adapter);
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// SxgUnmapResources(adapter);
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/* Deregister DMA */
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if (adapter->DmaHandle) {
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/* if (adapter->DmaHandle) {
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SXG_DEREGISTER_DMA(adapter->DmaHandle);
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}
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/* Deregister interrupt */
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SxgDeregisterInterrupt(adapter);
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*/ /* Deregister interrupt */
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// SxgDeregisterInterrupt(adapter);
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/* Possibly free system info (5.2 only) */
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SXG_RELEASE_SYSTEM_INFO(adapter);
|
||||
// SXG_RELEASE_SYSTEM_INFO(adapter);
|
||||
|
||||
SxgDiagFreeResources(adapter);
|
||||
|
||||
SxgFreeMCastAddrs(adapter);
|
||||
//SxgDiagFreeResources(adapter);
|
||||
|
||||
// SxgFreeMCastAddrs(adapter);
|
||||
/*
|
||||
if (SXG_TIMER_ALLOCATED(adapter->ResetTimer)) {
|
||||
SXG_CANCEL_TIMER(adapter->ResetTimer, TimerCancelled);
|
||||
SXG_FREE_TIMER(adapter->ResetTimer);
|
||||
|
@ -3149,13 +3227,14 @@ void SxgFreeResources(struct adapter_t *adapter)
|
|||
SXG_CANCEL_TIMER(adapter->OffloadTimer, TimerCancelled);
|
||||
SXG_FREE_TIMER(adapter->OffloadTimer);
|
||||
}
|
||||
|
||||
*/
|
||||
adapter->BasicAllocations = FALSE;
|
||||
|
||||
SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFreeRes",
|
||||
/* SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFreeRes",
|
||||
adapter, adapter->MaxTcbs, 0, 0);
|
||||
*/
|
||||
}
|
||||
#endif
|
||||
// #endif
|
||||
|
||||
/*
|
||||
* sxg_allocate_complete -
|
||||
|
@ -3276,8 +3355,8 @@ static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter,
|
|||
u32 i;
|
||||
u32 BufferSize = adapter->ReceiveBufferSize;
|
||||
u64 Paddr;
|
||||
void *temp_RcvBlock;
|
||||
struct sxg_rcv_block_hdr *RcvBlockHdr;
|
||||
unsigned char *RcvDataBuffer;
|
||||
struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr;
|
||||
struct sxg_rcv_descriptor_block *RcvDescriptorBlock;
|
||||
struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr;
|
||||
|
@ -3290,51 +3369,33 @@ static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter,
|
|||
memset(RcvBlock, 0, Length);
|
||||
ASSERT((BufferSize == SXG_RCV_DATA_BUFFER_SIZE) ||
|
||||
(BufferSize == SXG_RCV_JUMBO_BUFFER_SIZE));
|
||||
ASSERT(Length == SXG_RCV_BLOCK_SIZE(BufferSize));
|
||||
ASSERT(Length == SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE));
|
||||
/*
|
||||
* First, initialize the contained pool of receive data buffers.
|
||||
* This initialization requires NBL/NB/MDL allocations, if any of them
|
||||
* fail, free the block and return without queueing the shared memory
|
||||
*/
|
||||
RcvDataBuffer = RcvBlock;
|
||||
#if 0
|
||||
for (i = 0, Paddr = *PhysicalAddress;
|
||||
i < SXG_RCV_DESCRIPTORS_PER_BLOCK;
|
||||
i++, Paddr.LowPart += BufferSize, RcvDataBuffer += BufferSize)
|
||||
#endif
|
||||
for (i = 0, Paddr = PhysicalAddress;
|
||||
i < SXG_RCV_DESCRIPTORS_PER_BLOCK;
|
||||
i++, Paddr += BufferSize, RcvDataBuffer += BufferSize) {
|
||||
//RcvDataBuffer = RcvBlock;
|
||||
temp_RcvBlock = RcvBlock;
|
||||
for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK;
|
||||
i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) {
|
||||
RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *)
|
||||
temp_RcvBlock;
|
||||
/* For FREE macro assertion */
|
||||
RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM;
|
||||
SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize);
|
||||
if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL)
|
||||
goto fail;
|
||||
|
||||
RcvDataBufferHdr =
|
||||
(struct sxg_rcv_data_buffer_hdr*) (RcvDataBuffer +
|
||||
SXG_RCV_DATA_BUFFER_HDR_OFFSET
|
||||
(BufferSize));
|
||||
RcvDataBufferHdr->VirtualAddress = RcvDataBuffer;
|
||||
/* For FREE macro assertion */
|
||||
RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM;
|
||||
RcvDataBufferHdr->Size =
|
||||
SXG_RCV_BUFFER_DATA_SIZE(BufferSize);
|
||||
|
||||
SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr);
|
||||
/* ASK hardcoded 2048 */
|
||||
RcvDataBufferHdr->PhysicalAddress =
|
||||
pci_map_single(adapter->pcidev,
|
||||
RcvDataBufferHdr->SxgDumbRcvPacket->data,
|
||||
2048,
|
||||
PCI_DMA_FROMDEVICE);
|
||||
if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL)
|
||||
goto fail;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Place this entire block of memory on the AllRcvBlocks queue so it
|
||||
* can be free later
|
||||
*/
|
||||
RcvBlockHdr =
|
||||
(struct sxg_rcv_block_hdr*) ((unsigned char *)RcvBlock +
|
||||
SXG_RCV_BLOCK_HDR_OFFSET(BufferSize));
|
||||
|
||||
RcvBlockHdr = (struct sxg_rcv_block_hdr *) ((unsigned char *)RcvBlock +
|
||||
SXG_RCV_BLOCK_HDR_OFFSET(SXG_RCV_DATA_HDR_SIZE));
|
||||
RcvBlockHdr->VirtualAddress = RcvBlock;
|
||||
RcvBlockHdr->PhysicalAddress = PhysicalAddress;
|
||||
spin_lock(&adapter->RcvQLock);
|
||||
|
@ -3344,13 +3405,13 @@ static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter,
|
|||
|
||||
/* Now free the contained receive data buffers that we
|
||||
* initialized above */
|
||||
RcvDataBuffer = RcvBlock;
|
||||
temp_RcvBlock = RcvBlock;
|
||||
for (i = 0, Paddr = PhysicalAddress;
|
||||
i < SXG_RCV_DESCRIPTORS_PER_BLOCK;
|
||||
i++, Paddr += BufferSize, RcvDataBuffer += BufferSize) {
|
||||
RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr*)
|
||||
(RcvDataBuffer + SXG_RCV_DATA_BUFFER_HDR_OFFSET
|
||||
(BufferSize));
|
||||
i++, Paddr += SXG_RCV_DATA_HDR_SIZE,
|
||||
temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) {
|
||||
RcvDataBufferHdr =
|
||||
(struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock;
|
||||
spin_lock(&adapter->RcvQLock);
|
||||
SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr);
|
||||
spin_unlock(&adapter->RcvQLock);
|
||||
|
@ -3360,11 +3421,11 @@ static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter,
|
|||
RcvDescriptorBlock =
|
||||
(struct sxg_rcv_descriptor_block *) ((unsigned char *)RcvBlock +
|
||||
SXG_RCV_DESCRIPTOR_BLOCK_OFFSET
|
||||
(BufferSize));
|
||||
(SXG_RCV_DATA_HDR_SIZE));
|
||||
RcvDescriptorBlockHdr =
|
||||
(struct sxg_rcv_descriptor_block_hdr *) ((unsigned char *)RcvBlock +
|
||||
SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET
|
||||
(BufferSize));
|
||||
(SXG_RCV_DATA_HDR_SIZE));
|
||||
RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock;
|
||||
RcvDescriptorBlockHdr->PhysicalAddress = Paddr;
|
||||
spin_lock(&adapter->RcvQLock);
|
||||
|
@ -3376,13 +3437,11 @@ static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter,
|
|||
fail:
|
||||
/* Free any allocated resources */
|
||||
if (RcvBlock) {
|
||||
RcvDataBuffer = RcvBlock;
|
||||
temp_RcvBlock = RcvBlock;
|
||||
for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK;
|
||||
i++, RcvDataBuffer += BufferSize) {
|
||||
i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) {
|
||||
RcvDataBufferHdr =
|
||||
(struct sxg_rcv_data_buffer_hdr *) (RcvDataBuffer +
|
||||
SXG_RCV_DATA_BUFFER_HDR_OFFSET
|
||||
(BufferSize));
|
||||
(struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock;
|
||||
SXG_FREE_RCV_PACKET(RcvDataBufferHdr);
|
||||
}
|
||||
pci_free_consistent(adapter->pcidev,
|
||||
|
@ -3438,8 +3497,6 @@ static void sxg_adapter_set_hwaddr(struct adapter_t *adapter)
|
|||
*
|
||||
* sxg_dbg_macaddrs(adapter);
|
||||
*/
|
||||
memcpy(adapter->macaddr, temp_mac_address,
|
||||
sizeof(struct sxg_config_mac));
|
||||
/* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n",
|
||||
* __FUNCTION__);
|
||||
*/
|
||||
|
@ -3651,12 +3708,6 @@ static int sxg_fill_descriptor_block(struct adapter_t *adapter,
|
|||
RcvDataBufferHdr->State = SXG_BUFFER_ONCARD;
|
||||
RcvDescriptorBlock->Descriptors[i].VirtualAddress =
|
||||
(void *)RcvDataBufferHdr;
|
||||
if (i == 0)
|
||||
printk("ASK:sxg_fill_descriptor_block: first virt \
|
||||
address %p\n", RcvDataBufferHdr);
|
||||
if (i == (SXG_RCV_DESCRIPTORS_PER_BLOCK - 1))
|
||||
printk("ASK:sxg_fill_descriptor_block: last virt \
|
||||
address %p\n", RcvDataBufferHdr);
|
||||
|
||||
RcvDescriptorBlock->Descriptors[i].PhysicalAddress =
|
||||
RcvDataBufferHdr->PhysicalAddress;
|
||||
|
@ -3709,12 +3760,10 @@ static void sxg_stock_rcv_buffers(struct adapter_t *adapter)
|
|||
(adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) &&
|
||||
(adapter->AllocationsPending == 0)) {
|
||||
sxg_allocate_buffer_memory(adapter,
|
||||
SXG_RCV_BLOCK_SIZE(adapter->
|
||||
ReceiveBufferSize),
|
||||
SXG_RCV_BLOCK_SIZE
|
||||
(SXG_RCV_DATA_HDR_SIZE),
|
||||
SXG_BUFFER_TYPE_RCV);
|
||||
}
|
||||
printk("ASK:sxg_stock_rcv_buffers: RcvBuffersOnCard %d\n",
|
||||
adapter->RcvBuffersOnCard);
|
||||
/* Now grab the RcvQLock lock and proceed */
|
||||
spin_lock(&adapter->RcvQLock);
|
||||
while (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) {
|
||||
|
|
|
@ -139,12 +139,14 @@ struct sxg_stats {
|
|||
/* Indications array size */
|
||||
#define SXG_RCV_ARRAYSIZE 64
|
||||
|
||||
#define SXG_ALLOCATE_RCV_PACKET(_pAdapt, _RcvDataBufferHdr) { \
|
||||
struct sk_buff * skb; \
|
||||
skb = netdev_alloc_skb(_pAdapt->netdev, 2048); \
|
||||
#define SXG_ALLOCATE_RCV_PACKET(_pAdapt, _RcvDataBufferHdr, BufferSize) {\
|
||||
struct sk_buff * skb; \
|
||||
skb = netdev_alloc_skb(_pAdapt->netdev, BufferSize); \
|
||||
if (skb) { \
|
||||
(_RcvDataBufferHdr)->skb = skb; \
|
||||
skb->next = NULL; \
|
||||
_RcvDataBufferHdr->PhysicalAddress = pci_map_single(adapter->pcidev,\
|
||||
_RcvDataBufferHdr->skb->data, BufferSize, PCI_DMA_FROMDEVICE); \
|
||||
} else { \
|
||||
(_RcvDataBufferHdr)->skb = NULL; \
|
||||
} \
|
||||
|
@ -212,8 +214,8 @@ struct sxg_stats {
|
|||
SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbRcv", \
|
||||
(_RcvDataBufferHdr), (_Packet), \
|
||||
(_Event)->Status, 0); \
|
||||
ASSERT((_Event)->Length <= (_RcvDataBufferHdr)->Size); \
|
||||
skb_put(Packet, (_Event)->Length); \
|
||||
/* ASSERT((_Event)->Length <= (_RcvDataBufferHdr)->Size); */ \
|
||||
skb_put(Packet, (_Event)->Length); \
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -236,7 +238,7 @@ struct sxg_stats {
|
|||
#define SXG_FREE_RCV_DATA_BUFFER(_pAdapt, _Hdr) { \
|
||||
SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RtnDHdr", \
|
||||
(_Hdr), (_pAdapt)->FreeRcvBufferCount, \
|
||||
(_Hdr)->State, (_Hdr)->VirtualAddress); \
|
||||
(_Hdr)->State, 0/*(_Hdr)->VirtualAddress*/); \
|
||||
/* SXG_RESTORE_MDL_OFFSET(_Hdr); */ \
|
||||
(_pAdapt)->FreeRcvBufferCount++; \
|
||||
ASSERT(((_pAdapt)->AllRcvBlockCount * SXG_RCV_DESCRIPTORS_PER_BLOCK) \
|
||||
|
|
|
@ -705,12 +705,8 @@ struct sxg_rcv_data_buffer_hdr {
|
|||
* Note - DO NOT USE the VirtualAddress field to locate data.
|
||||
* Use the sxg.h:SXG_RECEIVE_DATA_LOCATION macro instead.
|
||||
*/
|
||||
void *VirtualAddress; /* Start of buffer */
|
||||
u32 Size; /* Buffer size */
|
||||
struct sxg_rcv_data_buffer_hdr *Next; /* Fastpath data buffer queue */
|
||||
struct list_entry FreeList; /* Free queue of buffers */
|
||||
unsigned char State; /* See SXG_BUFFER state above */
|
||||
unsigned char Status; /* Event status (to log PUSH) */
|
||||
struct sk_buff * skb; /* Double mapped (nbl and pkt)*/
|
||||
};
|
||||
|
||||
|
@ -721,10 +717,11 @@ struct sxg_rcv_data_buffer_hdr {
|
|||
#define SxgDumbRcvPacket skb
|
||||
|
||||
/* Space for struct sxg_rcv_data_buffer_hdr */
|
||||
#define SXG_RCV_DATA_HDR_SIZE 256
|
||||
#define SXG_RCV_DATA_HDR_SIZE sizeof(struct sxg_rcv_data_buffer_hdr)
|
||||
/* Non jumbo = 2k including HDR */
|
||||
#define SXG_RCV_DATA_BUFFER_SIZE 2048
|
||||
#define SXG_RCV_JUMBO_BUFFER_SIZE 10240 /* jumbo = 10k including HDR */
|
||||
/* jumbo = 10k including HDR */
|
||||
#define SXG_RCV_JUMBO_BUFFER_SIZE 10240
|
||||
|
||||
/* Receive data descriptor */
|
||||
struct sxg_rcv_data_descriptor {
|
||||
|
@ -954,20 +951,26 @@ struct sxg_scatter_gather {
|
|||
((SxgSglPoolProperties[_Pool].SGEntries - 1) * \
|
||||
sizeof(struct sxg_x64_sge)))
|
||||
|
||||
/* Force NDIS to give us it's own buffer so we can reformat to our own */
|
||||
#define SXG_SGL_BUFFER(_SxgSgl) NULL //VSS change this value and test
|
||||
#define SXG_SGL_BUFFER_LENGTH(_SxgSgl) 0 //VSS change this value and test
|
||||
#define SXG_SGL_BUF_SIZE 0 //VSS change this value and test
|
||||
|
||||
/*
|
||||
#if defined(CONFIG_X86_64)
|
||||
#define SXG_SGL_BUFFER(_SxgSgl) (&_SxgSgl->Sgl)
|
||||
#define SXG_SGL_BUFFER_LENGTH(_SxgSgl) ((_SxgSgl)->Entries * \
|
||||
sizeof(struct sxg_x64_sge))
|
||||
#define SXG_SGL_BUF_SIZE sizeof(struct sxg_x64_sgl)
|
||||
#elif defined(CONFIG_X86)
|
||||
/* Force NDIS to give us it's own buffer so we can reformat to our own */
|
||||
// Force NDIS to give us it's own buffer so we can reformat to our own
|
||||
#define SXG_SGL_BUFFER(_SxgSgl) NULL
|
||||
#define SXG_SGL_BUFFER_LENGTH(_SxgSgl) 0
|
||||
#define SXG_SGL_BUF_SIZE 0
|
||||
#else
|
||||
#error staging: sxg: driver is for X86 only!
|
||||
#endif
|
||||
|
||||
*/
|
||||
/* Microcode statistics */
|
||||
struct sxg_ucode_stats {
|
||||
u32 RPDQOflow; /* PDQ overflow (unframed ie dq & drop 1st) */
|
||||
|
|
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