perf/x86/intel: Make cpuc allocations consistent
The cpuc data structure allocation is different between fake and real cpuc's; use the same code to init/free both. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Родитель
1c163f4c7b
Коммит
d01b1f96a8
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@ -1995,7 +1995,7 @@ static int x86_pmu_commit_txn(struct pmu *pmu)
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*/
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static void free_fake_cpuc(struct cpu_hw_events *cpuc)
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{
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kfree(cpuc->shared_regs);
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intel_cpuc_finish(cpuc);
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kfree(cpuc);
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}
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@ -2007,14 +2007,11 @@ static struct cpu_hw_events *allocate_fake_cpuc(void)
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cpuc = kzalloc(sizeof(*cpuc), GFP_KERNEL);
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if (!cpuc)
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return ERR_PTR(-ENOMEM);
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/* only needed, if we have extra_regs */
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if (x86_pmu.extra_regs) {
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cpuc->shared_regs = allocate_shared_regs(cpu);
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if (!cpuc->shared_regs)
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goto error;
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}
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cpuc->is_fake = 1;
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if (intel_cpuc_prepare(cpuc, cpu))
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goto error;
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return cpuc;
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error:
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free_fake_cpuc(cpuc);
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@ -3398,7 +3398,7 @@ ssize_t intel_event_sysfs_show(char *page, u64 config)
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return x86_event_sysfs_show(page, config, event);
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}
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struct intel_shared_regs *allocate_shared_regs(int cpu)
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static struct intel_shared_regs *allocate_shared_regs(int cpu)
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{
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struct intel_shared_regs *regs;
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int i;
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@ -3430,10 +3430,9 @@ static struct intel_excl_cntrs *allocate_excl_cntrs(int cpu)
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return c;
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}
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static int intel_pmu_cpu_prepare(int cpu)
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{
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struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
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int intel_cpuc_prepare(struct cpu_hw_events *cpuc, int cpu)
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{
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if (x86_pmu.extra_regs || x86_pmu.lbr_sel_map) {
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cpuc->shared_regs = allocate_shared_regs(cpu);
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if (!cpuc->shared_regs)
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@ -3443,7 +3442,7 @@ static int intel_pmu_cpu_prepare(int cpu)
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if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
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size_t sz = X86_PMC_IDX_MAX * sizeof(struct event_constraint);
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cpuc->constraint_list = kzalloc(sz, GFP_KERNEL);
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cpuc->constraint_list = kzalloc_node(sz, GFP_KERNEL, cpu_to_node(cpu));
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if (!cpuc->constraint_list)
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goto err_shared_regs;
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@ -3468,6 +3467,11 @@ err:
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return -ENOMEM;
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}
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static int intel_pmu_cpu_prepare(int cpu)
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{
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return intel_cpuc_prepare(&per_cpu(cpu_hw_events, cpu), cpu);
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}
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static void flip_smm_bit(void *data)
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{
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unsigned long set = *(unsigned long *)data;
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@ -3542,9 +3546,8 @@ static void intel_pmu_cpu_starting(int cpu)
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}
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}
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static void free_excl_cntrs(int cpu)
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static void free_excl_cntrs(struct cpu_hw_events *cpuc)
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{
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struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
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struct intel_excl_cntrs *c;
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c = cpuc->excl_cntrs;
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@ -3565,9 +3568,8 @@ static void intel_pmu_cpu_dying(int cpu)
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disable_counter_freeze();
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}
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static void intel_pmu_cpu_dead(int cpu)
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void intel_cpuc_finish(struct cpu_hw_events *cpuc)
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{
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struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
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struct intel_shared_regs *pc;
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pc = cpuc->shared_regs;
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@ -3577,7 +3579,12 @@ static void intel_pmu_cpu_dead(int cpu)
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cpuc->shared_regs = NULL;
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}
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free_excl_cntrs(cpu);
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free_excl_cntrs(cpuc);
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}
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static void intel_pmu_cpu_dead(int cpu)
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{
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intel_cpuc_finish(&per_cpu(cpu_hw_events, cpu));
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}
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static void intel_pmu_sched_task(struct perf_event_context *ctx,
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@ -4715,7 +4722,7 @@ static __init int fixup_ht_bug(void)
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hardlockup_detector_perf_restart();
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for_each_online_cpu(c)
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free_excl_cntrs(c);
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free_excl_cntrs(&per_cpu(cpu_hw_events, c));
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cpus_read_unlock();
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pr_info("PMU erratum BJ122, BV98, HSD29 workaround disabled, HT off\n");
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@ -889,7 +889,8 @@ struct event_constraint *
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x86_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
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struct perf_event *event);
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struct intel_shared_regs *allocate_shared_regs(int cpu);
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extern int intel_cpuc_prepare(struct cpu_hw_events *cpuc, int cpu);
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extern void intel_cpuc_finish(struct cpu_hw_events *cpuc);
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int intel_pmu_init(void);
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@ -1025,9 +1026,13 @@ static inline int intel_pmu_init(void)
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return 0;
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}
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static inline struct intel_shared_regs *allocate_shared_regs(int cpu)
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static inline int intel_cpuc_prepare(struct cpu_hw_event *cpuc, int cpu)
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{
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return 0;
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}
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static inline void intel_cpuc_finish(struct cpu_hw_event *cpuc)
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{
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return NULL;
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}
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static inline int is_ht_workaround_enabled(void)
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