drm/i915/gt: Apply sanitiization just before resume
Bring sanitization completely underneath the umbrella of intel_gt, and perform it exclusively after suspend and before the next resume. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191226111834.2545953-1-chris@chris-wilson.co.uk
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@ -38,8 +38,6 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
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void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt)
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{
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gt->ggtt = ggtt;
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intel_gt_sanitize(gt, false);
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}
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static void init_unused_ring(struct intel_gt *gt, u32 base)
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@ -77,10 +75,6 @@ int intel_gt_init_hw(struct intel_gt *gt)
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struct intel_uncore *uncore = gt->uncore;
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int ret;
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ret = intel_gt_terminally_wedged(gt);
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if (ret)
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return ret;
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gt->last_init_time = ktime_get();
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/* Double layer security blanket, see i915_gem_init() */
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@ -126,17 +126,7 @@ static bool reset_engines(struct intel_gt *gt)
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return __intel_gt_reset(gt, ALL_ENGINES) == 0;
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}
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/**
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* intel_gt_sanitize: called after the GPU has lost power
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* @gt: the i915 GT container
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* @force: ignore a failed reset and sanitize engine state anyway
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*
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* Anytime we reset the GPU, either with an explicit GPU reset or through a
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* PCI power cycle, the GPU loses state and we must reset our state tracking
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* to match. Note that calling intel_gt_sanitize() if the GPU has not
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* been reset results in much confusion!
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*/
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void intel_gt_sanitize(struct intel_gt *gt, bool force)
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static void gt_sanitize(struct intel_gt *gt, bool force)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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@ -189,6 +179,10 @@ int intel_gt_resume(struct intel_gt *gt)
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enum intel_engine_id id;
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int err;
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err = intel_gt_terminally_wedged(gt);
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if (err)
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return err;
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GT_TRACE(gt, "\n");
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/*
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@ -201,14 +195,14 @@ int intel_gt_resume(struct intel_gt *gt)
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intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
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intel_rc6_sanitize(>->rc6);
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gt_sanitize(gt, true);
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/* Only when the HW is re-initialised, can we replay the requests */
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err = intel_gt_init_hw(gt);
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if (err) {
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dev_err(gt->i915->drm.dev,
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"Failed to initialize GPU, declaring it wedged!\n");
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intel_gt_set_wedged(gt);
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goto err_fw;
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goto err_wedged;
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}
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intel_rps_enable(>->rps);
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@ -233,7 +227,7 @@ int intel_gt_resume(struct intel_gt *gt)
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dev_err(gt->i915->drm.dev,
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"Failed to restart %s (%d)\n",
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engine->name, err);
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break;
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goto err_wedged;
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}
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}
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@ -243,11 +237,14 @@ int intel_gt_resume(struct intel_gt *gt)
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user_forcewake(gt, false);
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err_fw:
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out_fw:
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intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
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intel_gt_pm_put(gt);
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return err;
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err_wedged:
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intel_gt_set_wedged(gt);
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goto out_fw;
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}
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static void wait_for_suspend(struct intel_gt *gt)
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@ -315,7 +312,7 @@ void intel_gt_suspend_late(struct intel_gt *gt)
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intel_llc_disable(>->llc);
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}
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intel_gt_sanitize(gt, false);
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gt_sanitize(gt, false);
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GT_TRACE(gt, "\n");
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}
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@ -51,8 +51,6 @@ void intel_gt_pm_init_early(struct intel_gt *gt);
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void intel_gt_pm_init(struct intel_gt *gt);
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void intel_gt_pm_fini(struct intel_gt *gt);
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void intel_gt_sanitize(struct intel_gt *gt, bool force);
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void intel_gt_suspend_prepare(struct intel_gt *gt);
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void intel_gt_suspend_late(struct intel_gt *gt);
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int intel_gt_resume(struct intel_gt *gt);
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@ -1817,8 +1817,6 @@ static int i915_drm_resume(struct drm_device *dev)
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disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
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intel_gt_sanitize(&dev_priv->gt, true);
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ret = i915_ggtt_enable_hw(dev_priv);
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if (ret)
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DRM_ERROR("failed to re-enable GGTT\n");
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@ -124,8 +124,6 @@ static void pm_resume(struct drm_i915_private *i915)
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* that runtime-pm just works.
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*/
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with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
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intel_gt_sanitize(&i915->gt, false);
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i915_gem_restore_gtt_mappings(i915);
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i915_gem_restore_fences(&i915->ggtt);
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