Merge branch 'fixes' into next/multiplatform
The 'fixes' branch contains d5d4fdd86f
("irqchip/versatile-fpga:
Fix PCI IRQ mapping on Versatile PB") that is required for booting
the versatile platform prior to the rework in this branch, but
including both causes a build-time error.
I'm doing an evil merge here to pull in the fixes branch so we have
that commit included but at the same time revert the trivial change.
This gives us a bisectable history.
* fixes: (22 commits)
fsl-ifc: add missing include on ARM64
ls2080a/dts: Add little endian property for GPIO IP block
dt-bindings: define little-endian property for QorIQ GPIO
ARM64: dts: ls2080a: fix eSDHC endianness
ARM: dts: vf610: use reset values for L2 cache latencies
ARM: pxa: use PWM lookup table for all machines
ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1
ARM: dts: berlin: correct BG2Q's sdhci2 2nd clock
ARM: dts: am4372: fix clock source for arm twd and global timers
ARM: at91: fix pinctrl driver selection
ARM: at91/dt: add always-on to 1.8V regulator
ARM: dts: vf610: fix clock definition for SAI2
ARM: imx: clk-vf610: fix SAI clock tree
ARM: ixp4xx: fix read{b,w,l} return types
irqchip/versatile-fpga: Fix PCI IRQ mapping on Versatile PB
ARM: OMAP2+: enable REGULATOR_FIXED_VOLTAGE
ARM: dts: add dm816x missing spi DT dma handles
ARM: dts: add dm816x missing #mbox-cells
cpufreq: s3c24xx: Do not mark s3c2410_plls_add as __init
bus: sunxi-rsb: unlock on error in sunxi_rsb_read()
...
This commit is contained in:
Коммит
d0b6342df0
|
@ -11,6 +11,10 @@ Required properties:
|
|||
0 = active high
|
||||
1 = active low
|
||||
|
||||
Optional properties:
|
||||
- little-endian : GPIO registers are used as little endian. If not
|
||||
present registers are used as big endian by default.
|
||||
|
||||
Example:
|
||||
|
||||
gpio0: gpio@1100 {
|
||||
|
|
|
@ -74,7 +74,7 @@
|
|||
reg = <0x48240200 0x100>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&dpll_mpu_m2_ck>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
||||
local_timer: timer@48240600 {
|
||||
|
@ -82,7 +82,7 @@
|
|||
reg = <0x48240600 0x100>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&dpll_mpu_m2_ck>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
||||
l2-cache-controller@48242000 {
|
||||
|
|
|
@ -259,6 +259,14 @@
|
|||
ti,invert-autoidle-bit;
|
||||
};
|
||||
|
||||
mpu_periphclk: mpu_periphclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&dpll_mpu_m2_ck>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <2>;
|
||||
};
|
||||
|
||||
dpll_ddr_ck: dpll_ddr_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,am3-dpll-clock";
|
||||
|
|
|
@ -184,6 +184,7 @@
|
|||
regulator-name = "VDD_SDHC_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -118,7 +118,8 @@
|
|||
sdhci0: sdhci@ab0000 {
|
||||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xab0000 0x200>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
|
||||
clock-names = "io", "core";
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -126,7 +127,8 @@
|
|||
sdhci1: sdhci@ab0800 {
|
||||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xab0800 0x200>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
|
||||
clock-names = "io", "core";
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -135,7 +137,7 @@
|
|||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xab1000 0x200>;
|
||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&chip_clk CLKID_NFC_ECC>, <&chip_clk CLKID_NFC>;
|
||||
clocks = <&chip_clk CLKID_NFC_ECC>, <&chip_clk CLKID_SDIO>;
|
||||
clock-names = "io", "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -218,6 +218,7 @@
|
|||
reg = <0x480c8000 0x2000>;
|
||||
interrupts = <77>;
|
||||
ti,hwmods = "mailbox";
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <12>;
|
||||
mbox_dsp: mbox_dsp {
|
||||
|
@ -279,8 +280,11 @@
|
|||
ti,spi-num-cs = <4>;
|
||||
ti,hwmods = "mcspi1";
|
||||
dmas = <&edma 16 &edma 17
|
||||
&edma 18 &edma 19>;
|
||||
dma-names = "tx0", "rx0", "tx1", "rx1";
|
||||
&edma 18 &edma 19
|
||||
&edma 20 &edma 21
|
||||
&edma 22 &edma 23>;
|
||||
dma-names = "tx0", "rx0", "tx1", "rx1",
|
||||
"tx2", "rx2", "tx3", "rx3";
|
||||
};
|
||||
|
||||
mmc1: mmc@48060000 {
|
||||
|
|
|
@ -83,6 +83,7 @@
|
|||
reg = <0x5d>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>; /* PA3 */
|
||||
touchscreen-swapped-x-y;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -18,8 +18,3 @@
|
|||
reg = <0x80000000 0x10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&L2 {
|
||||
arm,data-latency = <2 1 2>;
|
||||
arm,tag-latency = <3 2 3>;
|
||||
};
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
reg = <0x40006000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
arm,data-latency = <1 1 1>;
|
||||
arm,data-latency = <3 3 3>;
|
||||
arm,tag-latency = <2 2 2>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -178,8 +178,10 @@
|
|||
compatible = "fsl,vf610-sai";
|
||||
reg = <0x40031000 0x1000>;
|
||||
interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_SAI2>;
|
||||
clock-names = "sai";
|
||||
clocks = <&clks VF610_CLK_SAI2>,
|
||||
<&clks VF610_CLK_SAI2_DIV>,
|
||||
<&clks 0>, <&clks 0>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&edma0 0 21>,
|
||||
<&edma0 0 20>;
|
||||
|
|
|
@ -4,7 +4,6 @@ menuconfig ARCH_AT91
|
|||
select ARCH_REQUIRE_GPIOLIB
|
||||
select COMMON_CLK_AT91
|
||||
select PINCTRL
|
||||
select PINCTRL_AT91
|
||||
select SOC_BUS
|
||||
|
||||
if ARCH_AT91
|
||||
|
@ -17,6 +16,7 @@ config SOC_SAMA5D2
|
|||
select HAVE_AT91_USB_CLK
|
||||
select HAVE_AT91_H32MX
|
||||
select HAVE_AT91_GENERATED_CLK
|
||||
select PINCTRL_AT91PIO4
|
||||
help
|
||||
Select this if ou are using one of Atmel's SAMA5D2 family SoC.
|
||||
|
||||
|
@ -27,6 +27,7 @@ config SOC_SAMA5D3
|
|||
select HAVE_AT91_UTMI
|
||||
select HAVE_AT91_SMD
|
||||
select HAVE_AT91_USB_CLK
|
||||
select PINCTRL_AT91
|
||||
help
|
||||
Select this if you are using one of Atmel's SAMA5D3 family SoC.
|
||||
This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
|
||||
|
@ -40,6 +41,7 @@ config SOC_SAMA5D4
|
|||
select HAVE_AT91_SMD
|
||||
select HAVE_AT91_USB_CLK
|
||||
select HAVE_AT91_H32MX
|
||||
select PINCTRL_AT91
|
||||
help
|
||||
Select this if you are using one of Atmel's SAMA5D4 family SoC.
|
||||
|
||||
|
@ -50,6 +52,7 @@ config SOC_AT91RM9200
|
|||
select CPU_ARM920T
|
||||
select HAVE_AT91_USB_CLK
|
||||
select MIGHT_HAVE_PCI
|
||||
select PINCTRL_AT91
|
||||
select SOC_SAM_V4_V5
|
||||
select SRAM if PM
|
||||
help
|
||||
|
@ -65,6 +68,7 @@ config SOC_AT91SAM9
|
|||
select HAVE_AT91_UTMI
|
||||
select HAVE_FB_ATMEL
|
||||
select MEMORY
|
||||
select PINCTRL_AT91
|
||||
select SOC_SAM_V4_V5
|
||||
select SRAM if PM
|
||||
help
|
||||
|
|
|
@ -41,8 +41,10 @@
|
|||
* implementation should be moved down into the pinctrl driver and get
|
||||
* called as part of the generic suspend/resume path.
|
||||
*/
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
extern void at91_pinctrl_gpio_suspend(void);
|
||||
extern void at91_pinctrl_gpio_resume(void);
|
||||
#endif
|
||||
|
||||
static struct {
|
||||
unsigned long uhp_udp_mask;
|
||||
|
@ -151,8 +153,9 @@ static void at91_pm_suspend(suspend_state_t state)
|
|||
|
||||
static int at91_pm_enter(suspend_state_t state)
|
||||
{
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
at91_pinctrl_gpio_suspend();
|
||||
|
||||
#endif
|
||||
switch (state) {
|
||||
/*
|
||||
* Suspend-to-RAM is like STANDBY plus slow clock mode, so
|
||||
|
@ -192,7 +195,9 @@ static int at91_pm_enter(suspend_state_t state)
|
|||
error:
|
||||
target_state = PM_SUSPEND_ON;
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
at91_pinctrl_gpio_resume();
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -748,8 +748,12 @@ static void exynos5_powerdown_conf(enum sys_powerdown mode)
|
|||
void exynos_sys_powerdown_conf(enum sys_powerdown mode)
|
||||
{
|
||||
unsigned int i;
|
||||
const struct exynos_pmu_data *pmu_data;
|
||||
|
||||
const struct exynos_pmu_data *pmu_data = pmu_context->pmu_data;
|
||||
if (!pmu_context)
|
||||
return;
|
||||
|
||||
pmu_data = pmu_context->pmu_data;
|
||||
|
||||
if (pmu_data->powerdown_conf)
|
||||
pmu_data->powerdown_conf(mode);
|
||||
|
|
|
@ -143,7 +143,7 @@ static inline void __indirect_writesl(volatile void __iomem *bus_addr,
|
|||
writel(*vaddr++, bus_addr);
|
||||
}
|
||||
|
||||
static inline unsigned char __indirect_readb(const volatile void __iomem *p)
|
||||
static inline u8 __indirect_readb(const volatile void __iomem *p)
|
||||
{
|
||||
u32 addr = (u32)p;
|
||||
u32 n, byte_enables, data;
|
||||
|
@ -166,7 +166,7 @@ static inline void __indirect_readsb(const volatile void __iomem *bus_addr,
|
|||
*vaddr++ = readb(bus_addr);
|
||||
}
|
||||
|
||||
static inline unsigned short __indirect_readw(const volatile void __iomem *p)
|
||||
static inline u16 __indirect_readw(const volatile void __iomem *p)
|
||||
{
|
||||
u32 addr = (u32)p;
|
||||
u32 n, byte_enables, data;
|
||||
|
@ -189,7 +189,7 @@ static inline void __indirect_readsw(const volatile void __iomem *bus_addr,
|
|||
*vaddr++ = readw(bus_addr);
|
||||
}
|
||||
|
||||
static inline unsigned long __indirect_readl(const volatile void __iomem *p)
|
||||
static inline u32 __indirect_readl(const volatile void __iomem *p)
|
||||
{
|
||||
u32 addr = (__force u32)p;
|
||||
u32 data;
|
||||
|
@ -350,7 +350,7 @@ static inline void insl(u32 io_addr, void *p, u32 count)
|
|||
((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
|
||||
|
||||
#define ioread8(p) ioread8(p)
|
||||
static inline unsigned int ioread8(const void __iomem *addr)
|
||||
static inline u8 ioread8(const void __iomem *addr)
|
||||
{
|
||||
unsigned long port = (unsigned long __force)addr;
|
||||
if (__is_io_address(port))
|
||||
|
@ -378,7 +378,7 @@ static inline void ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
|
|||
}
|
||||
|
||||
#define ioread16(p) ioread16(p)
|
||||
static inline unsigned int ioread16(const void __iomem *addr)
|
||||
static inline u16 ioread16(const void __iomem *addr)
|
||||
{
|
||||
unsigned long port = (unsigned long __force)addr;
|
||||
if (__is_io_address(port))
|
||||
|
@ -407,7 +407,7 @@ static inline void ioread16_rep(const void __iomem *addr, void *vaddr,
|
|||
}
|
||||
|
||||
#define ioread32(p) ioread32(p)
|
||||
static inline unsigned int ioread32(const void __iomem *addr)
|
||||
static inline u32 ioread32(const void __iomem *addr)
|
||||
{
|
||||
unsigned long port = (unsigned long __force)addr;
|
||||
if (__is_io_address(port))
|
||||
|
|
|
@ -121,6 +121,7 @@ config ARCH_OMAP2PLUS_TYPICAL
|
|||
select NEON if CPU_V7
|
||||
select PM
|
||||
select REGULATOR
|
||||
select REGULATOR_FIXED_VOLTAGE
|
||||
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
|
||||
select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
|
||||
select VFP
|
||||
|
@ -201,7 +202,6 @@ config MACH_OMAP3_PANDORA
|
|||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
|
||||
config MACH_NOKIA_N810
|
||||
bool
|
||||
|
|
|
@ -889,6 +889,7 @@ static void __init e680_init(void)
|
|||
|
||||
pxa_set_keypad_info(&e680_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(e680_devices));
|
||||
}
|
||||
|
@ -956,6 +957,7 @@ static void __init a1200_init(void)
|
|||
|
||||
pxa_set_keypad_info(&a1200_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(a1200_devices));
|
||||
}
|
||||
|
@ -1148,6 +1150,7 @@ static void __init a910_init(void)
|
|||
platform_device_register(&a910_camera);
|
||||
}
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(a910_devices));
|
||||
}
|
||||
|
@ -1215,6 +1218,7 @@ static void __init e6_init(void)
|
|||
|
||||
pxa_set_keypad_info(&e6_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(e6_devices));
|
||||
}
|
||||
|
@ -1256,6 +1260,7 @@ static void __init e2_init(void)
|
|||
|
||||
pxa_set_keypad_info(&e2_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(e2_devices));
|
||||
}
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/cpu-freq-core.h>
|
||||
|
||||
static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = {
|
||||
static struct cpufreq_frequency_table s3c2440_plls_12[] = {
|
||||
{ .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */
|
||||
{ .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */
|
||||
{ .frequency = 90000000, .driver_data = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/cpu-freq-core.h>
|
||||
|
||||
static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = {
|
||||
static struct cpufreq_frequency_table s3c2440_plls_169344[] = {
|
||||
{ .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */
|
||||
{ .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */
|
||||
{ .frequency = 90115200, .driver_data = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */
|
||||
|
|
|
@ -269,6 +269,7 @@
|
|||
clock-frequency = <0>; /* Updated by bootloader */
|
||||
voltage-ranges = <1800 1800 3300 3300>;
|
||||
sdhci,auto-cmd12;
|
||||
little-endian;
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
|
@ -277,6 +278,7 @@
|
|||
reg = <0x0 0x2300000 0x0 0x10000>;
|
||||
interrupts = <0 36 0x4>; /* Level high type */
|
||||
gpio-controller;
|
||||
little-endian;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
@ -287,6 +289,7 @@
|
|||
reg = <0x0 0x2310000 0x0 0x10000>;
|
||||
interrupts = <0 36 0x4>; /* Level high type */
|
||||
gpio-controller;
|
||||
little-endian;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
@ -297,6 +300,7 @@
|
|||
reg = <0x0 0x2320000 0x0 0x10000>;
|
||||
interrupts = <0 37 0x4>; /* Level high type */
|
||||
gpio-controller;
|
||||
little-endian;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
@ -307,6 +311,7 @@
|
|||
reg = <0x0 0x2330000 0x0 0x10000>;
|
||||
interrupts = <0 37 0x4>; /* Level high type */
|
||||
gpio-controller;
|
||||
little-endian;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
|
|
@ -342,13 +342,13 @@ static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
|
|||
|
||||
ret = _sunxi_rsb_run_xfer(rsb);
|
||||
if (ret)
|
||||
goto out;
|
||||
goto unlock;
|
||||
|
||||
*buf = readl(rsb->regs + RSB_DATA);
|
||||
|
||||
unlock:
|
||||
mutex_unlock(&rsb->lock);
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -335,22 +335,22 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
|
|||
clk[VF610_CLK_SAI0_SEL] = imx_clk_mux("sai0_sel", CCM_CSCMR1, 0, 2, sai_sels, 4);
|
||||
clk[VF610_CLK_SAI0_EN] = imx_clk_gate("sai0_en", "sai0_sel", CCM_CSCDR1, 16);
|
||||
clk[VF610_CLK_SAI0_DIV] = imx_clk_divider("sai0_div", "sai0_en", CCM_CSCDR1, 0, 4);
|
||||
clk[VF610_CLK_SAI0] = imx_clk_gate2("sai0", "sai0_div", CCM_CCGR0, CCM_CCGRx_CGn(15));
|
||||
clk[VF610_CLK_SAI0] = imx_clk_gate2("sai0", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(15));
|
||||
|
||||
clk[VF610_CLK_SAI1_SEL] = imx_clk_mux("sai1_sel", CCM_CSCMR1, 2, 2, sai_sels, 4);
|
||||
clk[VF610_CLK_SAI1_EN] = imx_clk_gate("sai1_en", "sai1_sel", CCM_CSCDR1, 17);
|
||||
clk[VF610_CLK_SAI1_DIV] = imx_clk_divider("sai1_div", "sai1_en", CCM_CSCDR1, 4, 4);
|
||||
clk[VF610_CLK_SAI1] = imx_clk_gate2("sai1", "sai1_div", CCM_CCGR1, CCM_CCGRx_CGn(0));
|
||||
clk[VF610_CLK_SAI1] = imx_clk_gate2("sai1", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(0));
|
||||
|
||||
clk[VF610_CLK_SAI2_SEL] = imx_clk_mux("sai2_sel", CCM_CSCMR1, 4, 2, sai_sels, 4);
|
||||
clk[VF610_CLK_SAI2_EN] = imx_clk_gate("sai2_en", "sai2_sel", CCM_CSCDR1, 18);
|
||||
clk[VF610_CLK_SAI2_DIV] = imx_clk_divider("sai2_div", "sai2_en", CCM_CSCDR1, 8, 4);
|
||||
clk[VF610_CLK_SAI2] = imx_clk_gate2("sai2", "sai2_div", CCM_CCGR1, CCM_CCGRx_CGn(1));
|
||||
clk[VF610_CLK_SAI2] = imx_clk_gate2("sai2", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(1));
|
||||
|
||||
clk[VF610_CLK_SAI3_SEL] = imx_clk_mux("sai3_sel", CCM_CSCMR1, 6, 2, sai_sels, 4);
|
||||
clk[VF610_CLK_SAI3_EN] = imx_clk_gate("sai3_en", "sai3_sel", CCM_CSCDR1, 19);
|
||||
clk[VF610_CLK_SAI3_DIV] = imx_clk_divider("sai3_div", "sai3_en", CCM_CSCDR1, 12, 4);
|
||||
clk[VF610_CLK_SAI3] = imx_clk_gate2("sai3", "sai3_div", CCM_CCGR1, CCM_CCGRx_CGn(2));
|
||||
clk[VF610_CLK_SAI3] = imx_clk_gate2("sai3", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(2));
|
||||
|
||||
clk[VF610_CLK_NFC_SEL] = imx_clk_mux("nfc_sel", CCM_CSCMR1, 12, 2, nfc_sels, 4);
|
||||
clk[VF610_CLK_NFC_EN] = imx_clk_gate("nfc_en", "nfc_sel", CCM_CSCDR2, 9);
|
||||
|
|
|
@ -648,7 +648,7 @@ late_initcall(s3c_cpufreq_initcall);
|
|||
*
|
||||
* Register the given set of PLLs with the system.
|
||||
*/
|
||||
int __init s3c_plltab_register(struct cpufreq_frequency_table *plls,
|
||||
int s3c_plltab_register(struct cpufreq_frequency_table *plls,
|
||||
unsigned int plls_no)
|
||||
{
|
||||
struct cpufreq_frequency_table *vals;
|
||||
|
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/slab.h>
|
||||
|
|
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