Second Round of Renesas ARM Based SoC DT Updates for v4.3
* Add Audio MIX and CTU support to r8a779[01] SoCs * Correct IRQ sense for adv7511 on lager board * Add sound label to koelsch and lager boards * Add IIC support to emev2 SoC -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVsfDJAAoJENfPZGlqN0++97QP/3aAapMZDRh/JH6pwUZRuAFG Y++xqO8VacSmhw8MzvLrSd9st2aaje3KEM+z0a8Fs7BrWfcqBROJFHH2o6scotYS Q+d+SCv1zDAokJrmwtooXzn6q6JPd+GgBW1y+r3YmPy1zduMbcbHK0/lk9OyKFGD 7Ei/zVs1EBXVEALVvwAD1/fCX2htPh08/9pkHKXGMSRcMDaTzqA9JMKimxas4sH3 S0sv6fC6ZrinJf26VW3HHvnrCcaFwG69aTdd4mo/qTIlZEeEqbYLQ+Hr9I+G+xBR L+XZuyP9bJ2InbmQxMXPw86yrCiDckMHzXvL+FVfHGJmXc7i/xwDcSg5VCzZnBlc zm0+X/qKkhLY579eCresjhImg4GOodTKJgQaGjJom4SgjdzlU8vzwMK/6GIhFvVR 7DEIVatCVL2PsRUbhhgJFh1keLKgFJhbRDkE8jl2YvxA5nmSFoGGjSB6j9t/UiNH cKN4vVfUaD3mLcu2zoCtKHzFHdaxScNM/E84+NhEBQWj63Hi3b7osEeoHpgE96Dm +1aFpf/RAkY7gu86l16YfTV47R1J+SiNNHXPNRivCmwEvCesD07mqm8LIMu2TYIN zXdNwpv9Fj1DWLO6nt+iEvKRCh0SSkjkNq9TtG+33gM5+098JXLVOXw85HzgZP/g 1zGyFPYcQ6uNM5DX0BBL =wbDB -----END PGP SIGNATURE----- Merge tag 'renesas-dt2-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Second Round of Renesas ARM Based SoC DT Updates for v4.3 * Add Audio MIX and CTU support to r8a779[01] SoCs * Correct IRQ sense for adv7511 on lager board * Add sound label to koelsch and lager boards * Add IIC support to emev2 SoC * tag 'renesas-dt2-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: Add Audio MIX support on DTSI ARM: shmobile: r8a7791: Add Audio CTU support on DTSI ARM: shmobile: r8a7790: Add Audio MIX support on DTSI ARM: shmobile: r8a7790: Add Audio CTU support on DTSI ARM: shmobile: lager: Fix adv7511 IRQ sensing ARM: shmobile: koelsch: add sound label on DTS ARM: shmobile: lager: add sound label on DTS ARM: shmobile: emev2: kzm9d: enable IIC busses ARM: shmobile: emev2: add IIC cores to dtsi Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Коммит
d1005cc96b
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@ -95,6 +95,14 @@
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};
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};
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&iic0 {
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status = "okay";
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};
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&iic1 {
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status = "okay";
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};
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&pfc {
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uart1_pins: serial@e1030000 {
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renesas,groups = "uart1_ctrl", "uart1_data";
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@ -21,6 +21,8 @@
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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gpio4 = &gpio4;
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i2c0 = &iic0;
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i2c1 = &iic1;
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};
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cpus {
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@ -66,6 +68,30 @@
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clock-frequency = <32768>;
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#clock-cells = <0>;
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};
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iic0_sclkdiv: iic0_sclkdiv {
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compatible = "renesas,emev2-smu-clkdiv";
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reg = <0x624 0>;
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clocks = <&pll3_fo>;
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#clock-cells = <0>;
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};
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iic0_sclk: iic0_sclk {
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compatible = "renesas,emev2-smu-gclk";
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reg = <0x48c 1>;
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clocks = <&iic0_sclkdiv>;
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#clock-cells = <0>;
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};
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iic1_sclkdiv: iic1_sclkdiv {
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compatible = "renesas,emev2-smu-clkdiv";
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reg = <0x624 16>;
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clocks = <&pll3_fo>;
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#clock-cells = <0>;
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};
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iic1_sclk: iic1_sclk {
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compatible = "renesas,emev2-smu-gclk";
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reg = <0x490 1>;
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clocks = <&iic1_sclkdiv>;
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#clock-cells = <0>;
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};
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pll3_fo: pll3_fo {
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compatible = "fixed-factor-clock";
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clocks = <&c32ki>;
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@ -234,4 +260,26 @@
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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iic0: i2c@e0070000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-emev2";
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reg = <0xe0070000 0x28>;
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interrupts = <0 32 IRQ_TYPE_EDGE_RISING>;
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clocks = <&iic0_sclk>;
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clock-names = "sclk";
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status = "disabled";
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};
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iic1: i2c@e10a0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-emev2";
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reg = <0xe10a0000 0x28>;
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interrupts = <0 33 IRQ_TYPE_EDGE_RISING>;
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clocks = <&iic1_sclk>;
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clock-names = "sclk";
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status = "disabled";
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};
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};
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@ -174,7 +174,7 @@
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1800000 0>;
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};
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sound {
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rsnd_ak4643: sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "left_j";
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@ -548,7 +548,7 @@
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compatible = "adi,adv7511w";
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reg = <0x39>;
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interrupt-parent = <&gpio1>;
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interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
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interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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@ -1303,6 +1303,7 @@
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<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
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<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
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<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
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<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
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<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
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#clock-cells = <1>;
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@ -1312,6 +1313,7 @@
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R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
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R8A7790_CLK_SCU_ALL
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R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
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R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
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R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
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R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
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>;
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@ -1321,6 +1323,7 @@
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"ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
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"scu-all",
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"scu-dvc1", "scu-dvc0",
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"scu-ctu1-mix1", "scu-ctu0-mix0",
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"scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
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"scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
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};
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@ -1536,6 +1539,8 @@
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<&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
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<&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
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<&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
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<&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
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<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
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clock-names = "ssi-all",
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@ -1543,6 +1548,8 @@
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"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
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"src.9", "src.8", "src.7", "src.6", "src.5",
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"src.4", "src.3", "src.2", "src.1", "src.0",
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"ctu.0", "ctu.1",
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"mix.0", "mix.1",
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"dvc.0", "dvc.1",
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"clk_a", "clk_b", "clk_c", "clk_i";
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};
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};
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rcar_sound,mix {
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mix0: mix@0 { };
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mix1: mix@1 { };
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};
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rcar_sound,ctu {
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ctu00: ctu@0 { };
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ctu01: ctu@1 { };
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ctu02: ctu@2 { };
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ctu03: ctu@3 { };
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ctu10: ctu@4 { };
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ctu11: ctu@5 { };
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ctu12: ctu@6 { };
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ctu13: ctu@7 { };
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};
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rcar_sound,src {
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src0: src@0 {
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interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
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@ -242,7 +242,7 @@
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1800000 0>;
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};
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sound {
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rsnd_ak4643: sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "left_j";
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@ -1311,6 +1311,7 @@
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<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
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<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
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<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
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<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
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<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;
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#clock-cells = <1>;
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@ -1320,6 +1321,7 @@
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R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
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R8A7791_CLK_SCU_ALL
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R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
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R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0
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R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
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R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
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>;
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@ -1329,6 +1331,7 @@
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"ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
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"scu-all",
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"scu-dvc1", "scu-dvc0",
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"scu-ctu1-mix1", "scu-ctu0-mix0",
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"scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
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"scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
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};
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@ -1582,6 +1585,8 @@
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<&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
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<&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
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<&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
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<&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
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<&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
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<&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
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<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
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clock-names = "ssi-all",
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@ -1589,6 +1594,8 @@
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"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
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"src.9", "src.8", "src.7", "src.6", "src.5",
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"src.4", "src.3", "src.2", "src.1", "src.0",
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"ctu.0", "ctu.1",
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"mix.0", "mix.1",
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"dvc.0", "dvc.1",
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"clk_a", "clk_b", "clk_c", "clk_i";
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@ -1605,6 +1612,22 @@
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};
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};
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rcar_sound,mix {
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mix0: mix@0 { };
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mix1: mix@1 { };
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};
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rcar_sound,ctu {
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ctu00: ctu@0 { };
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ctu01: ctu@1 { };
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ctu02: ctu@2 { };
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ctu03: ctu@3 { };
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ctu10: ctu@4 { };
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ctu11: ctu@5 { };
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ctu12: ctu@6 { };
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ctu13: ctu@7 { };
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};
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rcar_sound,src {
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src0: src@0 {
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interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
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@ -144,6 +144,8 @@
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#define R8A7790_CLK_SCU_ALL 17
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#define R8A7790_CLK_SCU_DVC1 18
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#define R8A7790_CLK_SCU_DVC0 19
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#define R8A7790_CLK_SCU_CTU1_MIX1 20
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#define R8A7790_CLK_SCU_CTU0_MIX0 21
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#define R8A7790_CLK_SCU_SRC9 22
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#define R8A7790_CLK_SCU_SRC8 23
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#define R8A7790_CLK_SCU_SRC7 24
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@ -141,6 +141,8 @@
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#define R8A7791_CLK_SCU_ALL 17
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#define R8A7791_CLK_SCU_DVC1 18
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#define R8A7791_CLK_SCU_DVC0 19
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#define R8A7791_CLK_SCU_CTU1_MIX1 20
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#define R8A7791_CLK_SCU_CTU0_MIX0 21
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#define R8A7791_CLK_SCU_SRC9 22
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#define R8A7791_CLK_SCU_SRC8 23
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#define R8A7791_CLK_SCU_SRC7 24
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